altos/stmf0: Add casts to reduce -Wconversion warnings. Use AO_TICK_TYPE

[fw/altos] / src / stmf0 / ao_timer.c

diff --git a/src/stmf0/ao_timer.c b/src/stmf0/ao_timer.c
index 1def5f69f8e1c1d77d7a6a9d7344e4adcc1001fc..b7047e10b9e89ce240b52aabb0723d52dd7a7505 100644 (file)
--- a/src/stmf0/ao_timer.c
+++ b/src/stmf0/ao_timer.c
@@ -35,6 +35,22 @@ ao_time(void)
        return ao_tick_count;
 }
 
+uint64_t
+ao_time_ns(void)
+{
+       AO_TICK_TYPE    before, after;
+       uint32_t        cvr;
+
+       do {
+               before = ao_tick_count;
+               cvr = stm_systick.cvr;
+               after = ao_tick_count;
+       } while (before != after);
+
+       return (uint64_t) after * (1000000000ULL / AO_HERTZ) +
+               (uint64_t) cvr * (1000000000ULL / AO_SYSTICK);
+}
+
 #if AO_DATA_ALL
 volatile uint8_t       ao_data_interval = 1;
 volatile uint8_t       ao_data_count;
@@ -44,12 +60,9 @@ void stm_systick_isr(void)
 {
        if (stm_systick.csr & (1 << STM_SYSTICK_CSR_COUNTFLAG)) {
                ++ao_tick_count;
-#if HAS_TASK_QUEUE
-               if (ao_task_alarm_tick && (int16_t) (ao_tick_count - ao_task_alarm_tick) >= 0)
-                       ao_task_check_alarm((uint16_t) ao_tick_count);
-#endif
+               ao_task_check_alarm();
 #if AO_DATA_ALL
-               if (++ao_data_count == ao_data_interval) {
+               if (++ao_data_count == ao_data_interval && ao_data_interval) {
                        ao_data_count = 0;
 #if HAS_ADC
 #if HAS_FAKE_FLIGHT
@@ -170,7 +183,7 @@ ao_clock_normal_start(void)
 #if AO_HSE_BYPASS
        stm_rcc.cr |= (1 << STM_RCC_CR_HSEBYP);
 #else
-       stm_rcc.cr &= ~(1 << STM_RCC_CR_HSEBYP);
+       stm_rcc.cr &= ~(1UL << STM_RCC_CR_HSEBYP);
 #endif
        /* Enable HSE clock */
        stm_rcc.cr |= (1 << STM_RCC_CR_HSEON);
@@ -178,8 +191,8 @@ ao_clock_normal_start(void)
                asm("nop");
 
        /* Disable the PLL */
-       stm_rcc.cr &= ~(1 << STM_RCC_CR_PLLON);
-       while (stm_rcc.cr & (1 << STM_RCC_CR_PLLRDY))
+       stm_rcc.cr &= ~(1UL << STM_RCC_CR_PLLON);
+       while (stm_rcc.cr & (1UL << STM_RCC_CR_PLLRDY))
                asm("nop");
 
        /* Set multiplier */
@@ -188,7 +201,7 @@ ao_clock_normal_start(void)
        cfgr |= (AO_RCC_CFGR_PLLMUL << STM_RCC_CFGR_PLLMUL);
 
        /* PLL source */
-       cfgr &= ~(1 << STM_RCC_CFGR_PLLSRC);
+       cfgr &= ~(1UL << STM_RCC_CFGR_PLLSRC);
        cfgr |= (STM_RCC_CFGR_PLLSRC_TARGET_CLOCK  << STM_RCC_CFGR_PLLSRC);
        stm_rcc.cfgr = cfgr;
 
@@ -248,7 +261,7 @@ ao_clock_normal_switch(void)
        }
 #if !AO_HSI && !AO_NEED_HSI
        /* Turn off the HSI clock */
-       stm_rcc.cr &= ~(1 << STM_RCC_CR_HSION);
+       stm_rcc.cr &= ~(1UL << STM_RCC_CR_HSION);
 #endif
 #ifdef STM_PLLSRC
        /* USB PLL source */
@@ -278,9 +291,6 @@ ao_clock_init(void)
        /* Enable 1 wait state so the CPU can run at 48MHz */
        stm_flash.acr |= (STM_FLASH_ACR_LATENCY_1 << STM_FLASH_ACR_LATENCY);
 
-       /* Enable power interface clock */
-       stm_rcc.apb1enr |= (1 << STM_RCC_APB1ENR_PWREN);
-
        /* HCLK to 48MHz -> AHB prescaler = /1 */
        cfgr = stm_rcc.cfgr;
        cfgr &= ~(STM_RCC_CFGR_HPRE_MASK << STM_RCC_CFGR_HPRE);