Switch from GPLv2 to GPLv2+
[fw/altos] / src / stm / ao_spi_stm.c
index 2b6834fdd36a0fa4e12e7ec1b5853e72406336b8..6b1d33d098b7c380157dae97c4ce09e246c4a24f 100644 (file)
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -203,6 +204,38 @@ ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index)
        ao_spi_run(id, 3, len);
 }
 
+void
+ao_spi_start_bytes(uint8_t spi_index)
+{
+       uint8_t         id = AO_SPI_INDEX(spi_index);
+       struct stm_spi  *stm_spi = ao_spi_stm_info[id].stm_spi;
+
+       stm_spi->cr2 = ((0 << STM_SPI_CR2_TXEIE) |
+                       (0 << STM_SPI_CR2_RXNEIE) |
+                       (0 << STM_SPI_CR2_ERRIE) |
+                       (0 << STM_SPI_CR2_SSOE) |
+                       (0 << STM_SPI_CR2_TXDMAEN) |
+                       (0 << STM_SPI_CR2_RXDMAEN));
+       validate_spi(stm_spi, 5, 0xffff);
+}
+
+void
+ao_spi_stop_bytes(uint8_t spi_index)
+{
+       uint8_t         id = AO_SPI_INDEX(spi_index);
+       struct stm_spi  *stm_spi = ao_spi_stm_info[id].stm_spi;
+
+       while ((stm_spi->sr & (1 << STM_SPI_SR_TXE)) == 0)
+               ;
+       while (stm_spi->sr & (1 << STM_SPI_SR_BSY))
+               ;
+       /* Clear the OVR flag */
+       (void) stm_spi->dr;
+       (void) stm_spi->sr;
+       validate_spi(stm_spi, 6, 0xffff);
+       stm_spi->cr2 = 0;
+}
+
 void
 ao_spi_send_sync(const void *block, uint16_t len, uint8_t spi_index)
 {
@@ -315,44 +348,36 @@ ao_spi_disable_index(uint8_t spi_index)
 {
        /* Disable current config
         */
-       switch (AO_SPI_INDEX(spi_index)) {
-       case STM_SPI_INDEX(1):
-               switch (spi_index) {
-               case AO_SPI_1_PA5_PA6_PA7:
-                       stm_gpio_set(&stm_gpioa, 5, 1);
-                       stm_moder_set(&stm_gpioa, 5, STM_MODER_OUTPUT);
-                       stm_moder_set(&stm_gpioa, 6, STM_MODER_INPUT);
-                       stm_moder_set(&stm_gpioa, 7, STM_MODER_OUTPUT);
-                       break;
-               case AO_SPI_1_PB3_PB4_PB5:
-                       stm_gpio_set(&stm_gpiob, 3, 1);
-                       stm_moder_set(&stm_gpiob, 3, STM_MODER_OUTPUT);
-                       stm_moder_set(&stm_gpiob, 4, STM_MODER_INPUT);
-                       stm_moder_set(&stm_gpiob, 5, STM_MODER_OUTPUT);
-                       break;
-               case AO_SPI_1_PE13_PE14_PE15:
-                       stm_gpio_set(&stm_gpioe, 13, 1);
-                       stm_moder_set(&stm_gpioe, 13, STM_MODER_OUTPUT);
-                       stm_moder_set(&stm_gpioe, 14, STM_MODER_INPUT);
-                       stm_moder_set(&stm_gpioe, 15, STM_MODER_OUTPUT);
-                       break;
-               }
+       switch (spi_index) {
+       case AO_SPI_1_PA5_PA6_PA7:
+               stm_gpio_set(&stm_gpioa, 5, 1);
+               stm_moder_set(&stm_gpioa, 5, STM_MODER_OUTPUT);
+               stm_moder_set(&stm_gpioa, 6, STM_MODER_INPUT);
+               stm_moder_set(&stm_gpioa, 7, STM_MODER_OUTPUT);
                break;
-       case STM_SPI_INDEX(2):
-               switch (spi_index) {
-               case AO_SPI_2_PB13_PB14_PB15:
-                       stm_gpio_set(&stm_gpiob, 13, 1);
-                       stm_moder_set(&stm_gpiob, 13, STM_MODER_OUTPUT);
-                       stm_moder_set(&stm_gpiob, 14, STM_MODER_INPUT);
-                       stm_moder_set(&stm_gpiob, 15, STM_MODER_OUTPUT);
-                       break;
-               case AO_SPI_2_PD1_PD3_PD4:
-                       stm_gpio_set(&stm_gpiod, 1, 1);
-                       stm_moder_set(&stm_gpiod, 1, STM_MODER_OUTPUT);
-                       stm_moder_set(&stm_gpiod, 3, STM_MODER_INPUT);
-                       stm_moder_set(&stm_gpiod, 4, STM_MODER_OUTPUT);
-                       break;
-               }
+       case AO_SPI_1_PB3_PB4_PB5:
+               stm_gpio_set(&stm_gpiob, 3, 1);
+               stm_moder_set(&stm_gpiob, 3, STM_MODER_OUTPUT);
+               stm_moder_set(&stm_gpiob, 4, STM_MODER_INPUT);
+               stm_moder_set(&stm_gpiob, 5, STM_MODER_OUTPUT);
+               break;
+       case AO_SPI_1_PE13_PE14_PE15:
+               stm_gpio_set(&stm_gpioe, 13, 1);
+               stm_moder_set(&stm_gpioe, 13, STM_MODER_OUTPUT);
+               stm_moder_set(&stm_gpioe, 14, STM_MODER_INPUT);
+               stm_moder_set(&stm_gpioe, 15, STM_MODER_OUTPUT);
+               break;
+       case AO_SPI_2_PB13_PB14_PB15:
+               stm_gpio_set(&stm_gpiob, 13, 1);
+               stm_moder_set(&stm_gpiob, 13, STM_MODER_OUTPUT);
+               stm_moder_set(&stm_gpiob, 14, STM_MODER_INPUT);
+               stm_moder_set(&stm_gpiob, 15, STM_MODER_OUTPUT);
+               break;
+       case AO_SPI_2_PD1_PD3_PD4:
+               stm_gpio_set(&stm_gpiod, 1, 1);
+               stm_moder_set(&stm_gpiod, 1, STM_MODER_OUTPUT);
+               stm_moder_set(&stm_gpiod, 3, STM_MODER_INPUT);
+               stm_moder_set(&stm_gpiod, 4, STM_MODER_OUTPUT);
                break;
        }
 }
@@ -360,39 +385,33 @@ ao_spi_disable_index(uint8_t spi_index)
 static void
 ao_spi_enable_index(uint8_t spi_index)
 {
-       switch (AO_SPI_INDEX(spi_index)) {
-       case STM_SPI_INDEX(1):
-               switch (spi_index) {
-               case AO_SPI_1_PA5_PA6_PA7:
-                       stm_afr_set(&stm_gpioa, 5, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpioa, 6, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpioa, 7, STM_AFR_AF5);
-                       break;
-               case AO_SPI_1_PB3_PB4_PB5:
-                       stm_afr_set(&stm_gpiob, 3, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpiob, 4, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpiob, 5, STM_AFR_AF5);
-                       break;
-               case AO_SPI_1_PE13_PE14_PE15:
-                       stm_afr_set(&stm_gpioe, 13, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpioe, 14, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpioe, 15, STM_AFR_AF5);
-                       break;
-               }
+       /* Enable new config
+        */
+       switch (spi_index) {
+       case AO_SPI_1_PA5_PA6_PA7:
+               stm_afr_set(&stm_gpioa, 5, STM_AFR_AF5);
+               stm_afr_set(&stm_gpioa, 6, STM_AFR_AF5);
+               stm_afr_set(&stm_gpioa, 7, STM_AFR_AF5);
                break;
-       case STM_SPI_INDEX(2):
-               switch (spi_index) {
-               case AO_SPI_2_PB13_PB14_PB15:
-                       stm_afr_set(&stm_gpiob, 13, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpiob, 14, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpiob, 15, STM_AFR_AF5);
-                       break;
-               case AO_SPI_2_PD1_PD3_PD4:
-                       stm_afr_set(&stm_gpiod, 1, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpiod, 3, STM_AFR_AF5);
-                       stm_afr_set(&stm_gpiod, 4, STM_AFR_AF5);
-                       break;
-               }
+       case AO_SPI_1_PB3_PB4_PB5:
+               stm_afr_set(&stm_gpiob, 3, STM_AFR_AF5);
+               stm_afr_set(&stm_gpiob, 4, STM_AFR_AF5);
+               stm_afr_set(&stm_gpiob, 5, STM_AFR_AF5);
+               break;
+       case AO_SPI_1_PE13_PE14_PE15:
+               stm_afr_set(&stm_gpioe, 13, STM_AFR_AF5);
+               stm_afr_set(&stm_gpioe, 14, STM_AFR_AF5);
+               stm_afr_set(&stm_gpioe, 15, STM_AFR_AF5);
+               break;
+       case AO_SPI_2_PB13_PB14_PB15:
+               stm_afr_set(&stm_gpiob, 13, STM_AFR_AF5);
+               stm_afr_set(&stm_gpiob, 14, STM_AFR_AF5);
+               stm_afr_set(&stm_gpiob, 15, STM_AFR_AF5);
+               break;
+       case AO_SPI_2_PD1_PD3_PD4:
+               stm_afr_set(&stm_gpiod, 1, STM_AFR_AF5);
+               stm_afr_set(&stm_gpiod, 3, STM_AFR_AF5);
+               stm_afr_set(&stm_gpiod, 4, STM_AFR_AF5);
                break;
        }
 }