3cabcfe89960d53edfb06c24cc95f531a6e790a9
[fw/altos] / src / stm32f1 / ao_beep_stm.c
1 /*
2  * Copyright © 2012 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along
15  * with this program; if not, write to the Free Software Foundation, Inc.,
16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
17  */
18
19 #include "ao.h"
20 #include "ao_beep.h"
21
22 #if BEEPER_TIMER == 2
23 #define stm_beeper      stm_tim2
24 #define RCC_BEEPER      STM_RCC_APB1ENR_TIM2EN
25 #elif BEEPER_TIMER == 3
26 #define stm_beeper      stm_tim3
27 #define RCC_BEEPER      STM_RCC_APB1ENR_TIM3EN
28 #elif BEEPER_TIMER == 4
29 #define stm_beeper      stm_tim4
30 #define RCC_BEEPER      STM_RCC_APB1ENR_TIM4EN
31 #else
32 #error BEEPER_TIMER must be 2, 3 or 4
33 #endif
34
35 void
36 ao_beep(uint8_t beep)
37 {
38         if (beep == 0) {
39                 stm_beeper.cr1 = 0;
40                 stm_rcc.apb1enr &= ~(1UL << RCC_BEEPER);
41         } else {
42                 stm_rcc.apb1enr |= (1UL << RCC_BEEPER);
43
44                 stm_beeper.cr2 = ((0 << STM_TIM234_CR2_TI1S) |
45                                 (STM_TIM234_CR2_MMS_RESET << STM_TIM234_CR2_MMS) |
46                                 (0 << STM_TIM234_CR2_CCDS));
47
48                 /* Set prescaler to match cc1111 clocks
49                  */
50                 stm_beeper.psc = AO_TIM23467_CLK / 750000;
51
52                 /* 1. Select the counter clock (internal, external, prescaler).
53                  *
54                  * Setting SMCR to zero means use the internal clock
55                  */
56
57                 stm_beeper.smcr = 0;
58
59                 /* 2. Write the desired data in the TIMx_ARR and TIMx_CCRx registers. */
60                 stm_beeper.arr = beep;
61 #if BEEPER_CHANNEL == 1
62                 stm_beeper.ccr1 = beep;
63 #elif BEEPER_CHANNEL == 2
64                 stm_beeper.ccr2 = beep;
65 #elif BEEPER_CHANNEL == 3
66                 stm_beeper.ccr3 = beep;
67 #elif BEEPER_CHANNEL == 4
68                 stm_beeper.ccr4 = beep;
69 #else
70 #error invalid BEEPER_CHANNEL
71 #endif
72
73                 /* 3. Set the CCxIE and/or CCxDE bits if an interrupt and/or a
74                  * DMA request is to be generated.
75                  */
76                 /* don't want this */
77
78                 /* 4. Select the output mode. For example, you must write
79                  *  OCxM=011, OCxPE=0, CCxP=0 and CCxE=1 to toggle OCx output
80                  *  pin when CNT matches CCRx, CCRx preload is not used, OCx
81                  *  is enabled and active high.
82                  */
83
84 #define OC1M    (BEEPER_CHANNEL == 1 ? STM_TIM234_CCMR1_OC1M_TOGGLE : STM_TIM234_CCMR1_OC1M_FROZEN)
85 #define OC2M    (BEEPER_CHANNEL == 2 ? STM_TIM234_CCMR1_OC2M_TOGGLE : STM_TIM234_CCMR1_OC2M_FROZEN)
86 #define OC3M    (BEEPER_CHANNEL == 3 ? STM_TIM234_CCMR2_OC3M_TOGGLE : STM_TIM234_CCMR2_OC3M_FROZEN)
87 #define OC4M    (BEEPER_CHANNEL == 4 ? STM_TIM234_CCMR2_OC4M_TOGGLE : STM_TIM234_CCMR2_OC4M_FROZEN)
88
89 #define CCER(n) (BEEPER_CHANNEL == (n) ? 1 : 0)
90
91 #if BEEPER_CHANNEL == 1 || BEEPER_CHANNEL == 2
92                 stm_beeper.ccmr1 = ((0 << STM_TIM234_CCMR1_OC2CE) |
93                                     (OC2M << STM_TIM234_CCMR1_OC2M) |
94                                     (0 << STM_TIM234_CCMR1_OC2PE) |
95                                     (0 << STM_TIM234_CCMR1_OC2FE) |
96                                     (STM_TIM234_CCMR1_CC2S_OUTPUT << STM_TIM234_CCMR1_CC2S) |
97
98                                     (0 << STM_TIM234_CCMR1_OC1CE) |
99                                     (OC1M << STM_TIM234_CCMR1_OC1M) |
100                                     (0 << STM_TIM234_CCMR1_OC1PE) |
101                                     (0 << STM_TIM234_CCMR1_OC1FE) |
102                                     (STM_TIM234_CCMR1_CC1S_OUTPUT << STM_TIM234_CCMR1_CC1S));
103 #elif BEEPER_CHANNEL == 3 || BEEPER_CHANNEL == 4
104                 stm_beeper.ccmr2 = ((0 << STM_TIM234_CCMR2_OC4CE) |
105                                     (OC4M << STM_TIM234_CCMR2_OC4M) |
106                                     (0 << STM_TIM234_CCMR2_OC4PE) |
107                                     (0 << STM_TIM234_CCMR2_OC4FE) |
108                                     (STM_TIM234_CCMR2_CC4S_OUTPUT << STM_TIM234_CCMR2_CC4S) |
109
110                                     (0 << STM_TIM234_CCMR2_OC3CE) |
111                                     (OC3M << STM_TIM234_CCMR2_OC3M) |
112                                     (0 << STM_TIM234_CCMR2_OC3PE) |
113                                     (0 << STM_TIM234_CCMR2_OC3FE) |
114                                     (STM_TIM234_CCMR2_CC3S_OUTPUT << STM_TIM234_CCMR2_CC3S));
115 #else
116 #error invalid BEEPER_CHANNEL
117 #endif
118                 stm_beeper.ccer = ((0 << STM_TIM234_CCER_CC4NP) |
119                                    (0 << STM_TIM234_CCER_CC4P) |
120                                    (CCER(4) << STM_TIM234_CCER_CC4E) |
121                                    (0 << STM_TIM234_CCER_CC3NP) |
122                                    (0 << STM_TIM234_CCER_CC3P) |
123                                    (CCER(3) << STM_TIM234_CCER_CC3E) |
124                                    (0 << STM_TIM234_CCER_CC2NP) |
125                                    (0 << STM_TIM234_CCER_CC2P) |
126                                    (CCER(2) << STM_TIM234_CCER_CC2E) |
127                                    (0 << STM_TIM234_CCER_CC1NP) |
128                                    (0 << STM_TIM234_CCER_CC1P) |
129                                    (CCER(1) << STM_TIM234_CCER_CC1E));
130
131                 /* 5. Enable the counter by setting the CEN bit in the TIMx_CR1 register. */
132
133                 stm_beeper.cr1 = ((STM_TIM234_CR1_CKD_1 << STM_TIM234_CR1_CKD) |
134                                 (0 << STM_TIM234_CR1_ARPE) |
135                                 (STM_TIM234_CR1_CMS_EDGE << STM_TIM234_CR1_CMS) |
136                                 (0 << STM_TIM234_CR1_DIR) |
137                                 (0 << STM_TIM234_CR1_OPM) |
138                                 (0 << STM_TIM234_CR1_URS) |
139                                 (0 << STM_TIM234_CR1_UDIS) |
140                                 (1 << STM_TIM234_CR1_CEN));
141
142                 /* Update the values */
143                 stm_beeper.egr = (1 << STM_TIM234_EGR_UG);
144         }
145 }
146
147 void
148 ao_beep_for(uint8_t beep, AO_TICK_TYPE ticks)
149 {
150         ao_beep(beep);
151         ao_delay(ticks);
152         ao_beep(0);
153 }
154
155 void
156 ao_beep_init(void)
157 {
158         ao_enable_port(BEEPER_PORT);
159 #if BEEPER_TIMER == 2
160         if (BEEPER_PORT == &stm_gpioa) {
161                 switch (BEEPER_PIN) {
162                 case 0:
163                 case 1:
164                 case 2:
165                 case 3:
166                         stm_set_afio_mapr(STM_AFIO_MAPR_TIM2_REMAP,
167                                           STM_AFIO_MAPR_TIM2_REMAP_PA0_PA1_PA2_PA3,
168                                           STM_AFIO_MAPR_TIM2_REMAP_MASK);
169                         break;
170                 default:
171                         ao_panic(AO_PANIC_CRASH);
172                         break;
173                 }
174         }
175 #elif BEEPER_TIMER == 3
176         if (BEEPER_PORT == &stm_gpioa) {
177                 switch (BEEPER_PIN) {
178                 case 6:
179                 case 7:
180                         stm_set_afio_mapr(STM_AFIO_MAPR_TIM3_REMAP,
181                                           STM_AFIO_MAPR_TIM3_REMAP_PA6_PA7_PB0_PB1,
182                                           STM_AFIO_MAPR_TIM3_REMAP_MASK);
183                         break;
184                 default:
185                         ao_panic(AO_PANIC_CRASH);
186                         break;
187                 }
188         } else if (BEEPER_PORT == &stm_gpiob) {
189                 switch (BEEPER_PIN) {
190                 case 4:
191                 case 5:
192                 case 0:
193                 case 1:
194                         stm_set_afio_mapr(STM_AFIO_MAPR_TIM3_REMAP,
195                                           STM_AFIO_MAPR_TIM3_REMAP_PB4_PB5_PB0_PB1,
196                                           STM_AFIO_MAPR_TIM3_REMAP_MASK);
197                         break;
198                 default:
199                         ao_panic(AO_PANIC_CRASH);
200                         break;
201                 }
202         } else if (BEEPER_PORT == &stm_gpioc) {
203                 switch (BEEPER_PIN) {
204                 case 6:
205                 case 7:
206                 case 8:
207                 case 9:
208                         stm_set_afio_mapr(STM_AFIO_MAPR_TIM3_REMAP,
209                                           STM_AFIO_MAPR_TIM3_REMAP_PC6_PC7_PC8_PC9,
210                                           STM_AFIO_MAPR_TIM3_REMAP_MASK);
211                         break;
212                 default:
213                         ao_panic(AO_PANIC_CRASH);
214                         break;
215                 }
216         }
217 #elif BEEPER_TIMER == 4
218         ao_panic(AO_PANIC_CRASH);
219 #endif
220         stm_gpio_conf(BEEPER_PORT, BEEPER_PIN,
221                       STM_GPIO_CR_MODE_OUTPUT_2MHZ,
222                       STM_GPIO_CR_CNF_OUTPUT_AF_PUSH_PULL);
223
224         /* Leave the timer off until requested */
225         stm_rcc.apb1enr &= ~(1UL << RCC_BEEPER);
226 }