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fixup for interleave
[fw/altos] / src / lpc / ao_serial_lpc.c
1 /*
2  * Copyright © 2013 Keith Packard <keithp@keithp.com>
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2 of the License, or
7  * (at your option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
12  * General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License along
15  * with this program; if not, write to the Free Software Foundation, Inc.,
16  * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
17  */
18
19 #include <ao.h>
20 #include <ao_serial.h>
21
22 struct ao_fifo  ao_usart_rx_fifo;
23 struct ao_fifo  ao_usart_tx_fifo;
24 uint8_t         ao_usart_tx_avail;
25 uint8_t         ao_usart_tx_avail_min;
26
27 #define LPC_USART_TX_FIFO_SIZE  16
28
29 void
30 ao_debug_out(char c)
31 {
32         if (c == '\n')
33                 ao_debug_out('\r');
34         while (!(lpc_usart.lsr & (1 << LPC_USART_LSR_TEMT)))
35                 ;
36         lpc_usart.rbr_thr = c;
37 }
38
39 static void
40 _ao_serial_tx_start(void)
41 {
42         if (!ao_fifo_empty(ao_usart_tx_fifo) && ao_usart_tx_avail) {
43                 ao_usart_tx_avail--;
44                 if (ao_usart_tx_avail < ao_usart_tx_avail_min)
45                         ao_usart_tx_avail_min = ao_usart_tx_avail;
46                 ao_fifo_remove(ao_usart_tx_fifo, lpc_usart.rbr_thr);
47         }
48 }
49
50 void
51 lpc_usart_isr(void)
52 {
53         uint8_t wake_input = 0;
54         (void) lpc_usart.iir_fcr;
55
56         while (lpc_usart.lsr & (1 << LPC_USART_LSR_RDR)) {
57                 char c = lpc_usart.rbr_thr;
58                 if (!ao_fifo_full(ao_usart_rx_fifo))
59                         ao_fifo_insert(ao_usart_rx_fifo, c);
60                 wake_input = 1;
61         }
62         if (lpc_usart.lsr & (1 << LPC_USART_LSR_THRE)) {
63                 ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
64                 _ao_serial_tx_start();
65                 ao_wakeup(&ao_usart_tx_fifo);
66         }
67         if (wake_input) {
68                 ao_wakeup(&ao_usart_rx_fifo);
69                 if (stdin)
70                         ao_wakeup(&ao_stdin_ready);
71         }
72 }
73
74 int
75 _ao_serial0_pollchar(void)
76 {
77         int     c;
78         
79         if (ao_fifo_empty(ao_usart_rx_fifo))
80                 c = AO_READ_AGAIN;
81         else {
82                 uint8_t u;
83                 ao_fifo_remove(ao_usart_rx_fifo,u);
84                 c = u;
85         }
86         return c;
87 }
88
89 char
90 ao_serial0_getchar(void)
91 {
92         int c;
93         ao_arch_block_interrupts();
94         while ((c = _ao_serial0_pollchar()) == AO_READ_AGAIN)
95                 ao_sleep(&ao_usart_rx_fifo);
96         ao_arch_release_interrupts();
97         return (char) c;
98 }
99
100 void
101 ao_serial0_putchar(char c)
102 {
103         ao_arch_block_interrupts();
104         while (ao_fifo_full(ao_usart_tx_fifo))
105                 ao_sleep(&ao_usart_tx_fifo);
106         ao_fifo_insert(ao_usart_tx_fifo, c);
107         _ao_serial_tx_start();
108         ao_arch_release_interrupts();
109 }
110
111 void
112 ao_serial0_drain(void)
113 {
114         ao_arch_block_interrupts();
115         while (!ao_fifo_empty(ao_usart_tx_fifo))
116                 ao_sleep(&ao_usart_tx_fifo);
117         ao_arch_release_interrupts();
118 }
119
120 #include "ao_serial_lpc.h"
121
122 void
123 ao_serial0_set_speed(uint8_t speed)
124 {
125         if (speed > AO_SERIAL_SPEED_115200)
126                 return;
127
128         /* Flip to allow access to divisor latches */
129         lpc_usart.lcr |= (1 << LPC_USART_LCR_DLAB);
130
131         /* DL LSB */
132         lpc_usart.rbr_thr = ao_usart_speeds[speed].dl & 0xff;
133         
134         /* DL MSB */
135         lpc_usart.ier = (ao_usart_speeds[speed].dl >> 8) & 0xff;
136
137         lpc_usart.fdr = ((ao_usart_speeds[speed].divaddval << LPC_USART_FDR_DIVADDVAL) |
138                          (ao_usart_speeds[speed].mulval << LPC_USART_FDR_MULVAL));
139
140         /* Turn access to divisor latches back off */
141         lpc_usart.lcr &= ~(1 << LPC_USART_LCR_DLAB);
142 }
143
144 void
145 ao_serial_init(void)
146 {
147 #if SERIAL_0_18_19
148         lpc_ioconf.pio0_18 = ((LPC_IOCONF_FUNC_PIO0_18_RXD << LPC_IOCONF_FUNC) |
149                               (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
150                               (0 << LPC_IOCONF_HYS) |
151                               (0 << LPC_IOCONF_INV) |
152                               (0 << LPC_IOCONF_OD));
153         lpc_ioconf.pio0_19 = ((LPC_IOCONF_FUNC_PIO0_19_TXD << LPC_IOCONF_FUNC) |
154                               (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
155                               (0 << LPC_IOCONF_HYS) |
156                               (0 << LPC_IOCONF_INV) |
157                               (0 << LPC_IOCONF_OD));
158 #endif
159
160         /* Turn on the USART */
161         lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_USART);
162
163         /* Turn on the USART clock */
164         lpc_scb.uartclkdiv = AO_LPC_CLKOUT / AO_LPC_USARTCLK;
165
166         /* Configure USART */
167
168         /* Enable FIFOs, reset fifo contents, interrupt on 1 received char */
169         lpc_usart.iir_fcr = ((1 << LPC_USART_FCR_FIFOEN) |
170                          (1 << LPC_USART_FCR_RXFIFORES) |
171                          (1 << LPC_USART_FCR_TXFIFORES) |
172                          (LPC_USART_FCR_RXTL_1 << LPC_USART_FCR_RXTL));
173
174         ao_usart_tx_avail = LPC_USART_TX_FIFO_SIZE;
175         ao_usart_tx_avail_min = LPC_USART_TX_FIFO_SIZE;
176
177         /* 8 n 1 */
178         lpc_usart.lcr = ((LPC_USART_LCR_WLS_8 << LPC_USART_LCR_WLS) |
179                          (LPC_USART_LCR_SBS_1 << LPC_USART_LCR_SBS) |
180                          (0 << LPC_USART_LCR_PE) |
181                          (LPC_USART_LCR_PS_ODD << LPC_USART_LCR_PS) |
182                          (0 << LPC_USART_LCR_BC) |
183                          (0 << LPC_USART_LCR_DLAB));
184
185         /* Disable flow control */
186         lpc_usart.mcr = ((0 << LPC_USART_MCR_DTRCTRL) |
187                          (0 << LPC_USART_MCR_RTSCTRL) |
188                          (0 << LPC_USART_MCR_LMS) |
189                          (0 << LPC_USART_MCR_RTSEN) |
190                          (0 << LPC_USART_MCR_CTSEN));
191
192         /* 16x oversampling */
193         lpc_usart.osr = ((0 << LPC_USART_OSR_OSFRAC) |
194                          ((16 - 1) << LPC_USART_OSR_OSINT) |
195                          (0 << LPC_USART_OSR_FDINT));
196
197         /* Full duplex */
198         lpc_usart.hden = ((0 << LPC_USART_HDEN_HDEN));
199
200         /* Set baud rate */
201         ao_serial0_set_speed(AO_SERIAL_SPEED_9600);
202
203         /* Enable interrupts */
204         lpc_usart.ier = ((1 << LPC_USART_IER_RBRINTEN) |
205                          (1 << LPC_USART_IER_THREINTEN));
206
207         lpc_nvic_set_enable(LPC_ISR_USART_POS);
208         lpc_nvic_set_priority(LPC_ISR_USART_POS, 0);
209 #if USE_SERIAL_0_STDIN
210         ao_add_stdio(_ao_serial0_pollchar,
211                      ao_serial0_putchar,
212                      NULL);
213 #endif
214 }