2 * Copyright © 2013 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
25 lpc_ct32b1.tcr = ((0 << LPC_CT32B_TCR_CEN) |
26 (1 << LPC_CT32B_TCR_CRST));
27 lpc_scb.sysahbclkctrl &= ~(1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
29 lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
31 /* Set prescaler to match cc1111 clocks
33 lpc_ct32b1.pr = AO_LPC_SYSCLK / 750000 - 1;
35 /* Write the desired data in the match registers */
37 /* Reset after two time units */
38 lpc_ct32b1.mr[0] = beep << 1;
40 /* PWM width is half of that */
41 lpc_ct32b1.mr[1] = beep;
43 /* Flip output 1 on PWM match */
44 lpc_ct32b1.emr = (LPC_CT32B_EMR_EMC_TOGGLE << LPC_CT32B_EMR_EMC1);
46 /* Reset on match 0 */
47 lpc_ct32b1.mcr = (1 << LPC_CT32B_MCR_MR0R);
50 lpc_ct32b1.pwmc = (1 << LPC_CT32B_PWMC_PWMEN1);
55 /* And turn the timer on */
56 lpc_ct32b1.tcr = ((1 << LPC_CT32B_TCR_CEN) |
57 (0 << LPC_CT32B_TCR_CRST));
62 ao_beep_for(uint8_t beep, uint16_t ticks) __reentrant
72 /* Our beeper is on c32b1_mat1
73 * which is on pin pio0_14
76 lpc_ioconf.pio0_14 = ((LPC_IOCONF_FUNC_PIO0_14_CT32B1_MAT1 << LPC_IOCONF_FUNC) |
77 (LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE) |
78 (0 << LPC_IOCONF_HYS) |
79 (0 << LPC_IOCONF_INV) |
80 (1 << LPC_IOCONF_ADMODE) |
81 (0 << LPC_IOCONF_OD));
83 lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_CT32B1);
85 /* Disable the counter and reset the value */
86 lpc_ct32b1.tcr = ((0 << LPC_CT32B_TCR_CEN) |
87 (1 << LPC_CT32B_TCR_CRST));