2 * Copyright © 2013 Keith Packard <keithp@keithp.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
19 #ifndef _AO_ARCH_FUNCS_H_
20 #define _AO_ARCH_FUNCS_H_
22 #define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
23 #define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
25 #define ao_enable_port(port) (lpc_scb.sysahbclkctrl |= (1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
26 #define ao_disable_port(port) (lpc_scb.sysahbclkctrl &= ~(1 << LPC_SCB_SYSAHBCLKCTRL_GPIO))
28 #define lpc_all_bit(port,bit) (((port) << 5) | (bit))
30 #define ao_gpio_set(port, bit, pin, v) (lpc_gpio.byte[lpc_all_bit(port,bit)] = (v))
32 #define ao_gpio_get(port, bit, pin) (lpc_gpio.byte[lpc_all_bit(port,bit)])
34 #define PORT0_JTAG_REGS ((1 << 11) | (1 << 12) | (1 << 14))
36 static inline void lpc_set_gpio(int port, int bit) {
37 if (port == 0 && (1 << bit) & (PORT0_JTAG_REGS)) {
38 vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit));
40 *_ioconf = (*_ioconf & ~LPC_IOCONF_FUNC_MASK) | LPC_IOCONF_FUNC_PIO0_11;
44 #define ao_enable_output(port,bit,pin,v) do { \
45 ao_enable_port(port); \
46 lpc_set_gpio(port,bit); \
47 ao_gpio_set(port, bit, pin, v); \
48 lpc_gpio.dir[port] |= (1 << bit); \
51 #define ao_gpio_set_mode(port,bit,mode) do { \
52 vuint32_t *_ioconf = &lpc_ioconf.pio0_0 + ((port)*24+(bit)); \
54 if (mode == AO_EXTI_MODE_PULL_UP) \
55 _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
56 else if (mode == AO_EXTI_MODE_PULL_DOWN) \
57 _mode = LPC_IOCONF_MODE_PULL_UP << LPC_IOCONF_MODE; \
59 _mode = LPC_IOCONF_MODE_INACTIVE << LPC_IOCONF_MODE; \
60 *_ioconf = ((*_ioconf & ~(LPC_IOCONF_MODE_MASK << LPC_IOCONF_MODE)) | \
62 (1 << LPC_IOCONF_ADMODE)); \
65 #define ao_enable_input(port,bit,mode) do { \
66 ao_enable_port(port); \
67 lpc_set_gpio(port,bit); \
68 lpc_gpio.dir[port] &= ~(1 << bit); \
69 ao_gpio_set_mode(port,bit,mode); \
72 #define lpc_token_paster_2(x,y) x ## y
73 #define lpc_token_evaluator_2(x,y) lpc_token_paster_2(x,y)
74 #define lpc_token_paster_3(x,y,z) x ## y ## z
75 #define lpc_token_evaluator_3(x,y,z) lpc_token_paster_3(x,y,z)
76 #define lpc_token_paster_4(w,x,y,z) w ## x ## y ## z
77 #define lpc_token_evaluator_4(w,x,y,z) lpc_token_paster_4(w,x,y,z)
78 #define analog_reg(port,bit) lpc_token_evaluator_4(pio,port,_,bit)
79 #define analog_func(id) lpc_token_evaluator_2(LPC_IOCONF_FUNC_AD,id)
81 #define ao_enable_analog(port,bit,id) do { \
82 ao_enable_port(port); \
83 lpc_gpio.dir[port] &= ~(1 << bit); \
84 lpc_ioconf.analog_reg(port,bit) = ((analog_func(id) << LPC_IOCONF_FUNC) | \
85 (0 << LPC_IOCONF_ADMODE)); \
88 #define ARM_PUSH32(stack, val) (*(--(stack)) = (val))
90 static inline uint32_t
91 ao_arch_irqsave(void) {
93 asm("mrs %0,primask" : "=&r" (primask));
94 ao_arch_block_interrupts();
99 ao_arch_irqrestore(uint32_t primask) {
100 asm("msr primask,%0" : : "r" (primask));
104 ao_arch_memory_barrier() {
105 asm volatile("" ::: "memory");
110 ao_arch_init_stack(struct ao_task *task, void *start)
112 uint32_t *sp = (uint32_t *) (task->stack + AO_STACK_SIZE);
113 uint32_t a = (uint32_t) start;
116 /* Return address (goes into LR) */
119 /* Clear register values r0-r7 */
127 /* PRIMASK with interrupts enabled */
133 static inline void ao_arch_save_regs(void) {
134 /* Save general registers */
135 asm("push {r0-r7,lr}\n");
142 asm("mrs r0,primask");
146 static inline void ao_arch_save_stack(void) {
148 asm("mov %0,sp" : "=&r" (sp) );
149 ao_cur_task->sp = (sp);
150 if ((uint8_t *) sp < &ao_cur_task->stack[0])
151 ao_panic (AO_PANIC_STACK);
154 static inline void ao_arch_restore_stack(void) {
156 sp = (uint32_t) ao_cur_task->sp;
159 asm("mov sp, %0" : : "r" (sp) );
161 /* Restore PRIMASK */
163 asm("msr primask,r0");
167 asm("msr apsr_nczvq,r0");
169 /* Restore general registers and return */
170 asm("pop {r0-r7,pc}\n");
173 #define ao_arch_isr_stack()
175 #endif /* HAS_TASK */
177 #define ao_arch_wait_interrupt() do { \
179 ao_arch_release_interrupts(); \
180 asm(".global ao_idle_loc\n\nao_idle_loc:"); \
181 ao_arch_block_interrupts(); \
184 #define ao_arch_critical(b) do { \
185 uint32_t __mask = ao_arch_irqsave(); \
186 do { b } while (0); \
187 ao_arch_irqrestore(__mask); \
194 #define ao_spi_set_cs(port,mask) (lpc_gpio.clr[port] = (mask))
195 #define ao_spi_clr_cs(port,mask) (lpc_gpio.set[port] = (mask))
197 #define ao_spi_get_mask(port,mask,bus,speed) do { \
198 ao_spi_get(bus, speed); \
199 ao_spi_set_cs(port, mask); \
202 #define ao_spi_put_mask(reg,mask,bus) do { \
203 ao_spi_clr_cs(reg,mask); \
207 #define ao_spi_get_bit(reg,bit,pin,bus,speed) ao_spi_get_mask(reg,(1<<bit),bus,speed)
208 #define ao_spi_put_bit(reg,bit,pin,bus) ao_spi_put_mask(reg,(1<<bit),bus)
211 ao_spi_get(uint8_t spi_index, uint32_t speed);
214 ao_spi_put(uint8_t spi_index);
217 ao_spi_send(const void *block, uint16_t len, uint8_t spi_index);
220 ao_spi_send_fixed(uint8_t value, uint16_t len, uint8_t spi_index);
223 ao_spi_recv(void *block, uint16_t len, uint8_t spi_index);
226 ao_spi_duplex(const void *out, void *in, uint16_t len, uint8_t spi_index);
232 ao_spi_send_sync(const void *block, uint16_t len, uint8_t spi_index)
234 ao_spi_send(block, len, spi_index);
237 static inline void ao_spi_send_byte(uint8_t byte, uint8_t spi_index)
239 struct lpc_ssp *lpc_ssp;
249 while ((lpc_ssp->sr & (1 << LPC_SSP_SR_RNE)) == 0);
253 #define ao_spi_init_cs(port, mask) do { \
255 for (__bit__ = 0; __bit__ < 32; __bit__++) { \
256 if (mask & (1 << __bit__)) \
257 ao_enable_output(port, __bit__, PIN, 1); \
261 #define HAS_ARCH_START_SCHEDULER 1
263 static inline void ao_arch_start_scheduler(void) {
267 asm("mrs %0,msp" : "=&r" (sp));
268 asm("msr psp,%0" : : "r" (sp));
269 asm("mrs %0,control" : "=&r" (control));
271 asm("msr control,%0" : : "r" (control));
275 #endif /* _AO_ARCH_FUNCS_H_ */