add muffin label generation, clean up some attributes

[hw/telemega] / Makefile

diff --git a/Makefile b/Makefile
index b8fc1ac73d987121ea31adc5633871b41b3b3f62..1d4c6bfb64264654da00e6dc28825600fd465d15 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -1,3 +1,6 @@
+AM=../altusmetrum
+SCHEME=$(AM)/scheme
+
 # intentionally want to rebuild drc and bom on every invocation
 all:   drc partslist partslist.csv pcb
 
@@ -11,7 +14,7 @@ partslist:    telemega.sch Makefile
        rm -f telemega.unsorted
 
 partslist.csv: telemega.sch Makefile
-       gnetlist -L ../altusmetrum/scheme -g partslistgag \
+       gnetlist -L $(SCHEME) -g partslistgag \
                -o telemega.unsorted telemega.sch
        head -n1 telemega.unsorted > partslist.csv
        tail -n+2 telemega.unsorted | sort -t \, -k 8 >> partslist.csv
@@ -65,3 +68,8 @@ clean:
        rm -f *.net *.xy *.cmd *.png partslist partslist.csv *.ger *.xln
        rm -f *.partslist *.new.pcb *.unsorted telemega.xls
 
+muffins: partslist.csv $(AM)/glabels/muffin-short-5267.glabels
+       glabels-3-batch $(AM)/glabels/muffin-short-5267.glabels \
+               -i partslist.csv -o muffin-5267.ps >/dev/null && \
+               ps2pdf muffin-5267.ps && rm muffin-5267.ps
+