Add footprint for USB bare wires

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/Makefile b/Makefile
index c1998bc833bf7be9f3c40bea71514d139a6b25d1..88bf839b2000671d326da89b98a49c2870a18b8f 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -40,7 +40,7 @@ telelco.xy:   telelco.pcb
 telelco.back.gbr:      telelco.pcb
        pcb -x gerber telelco.pcb
 
-zip:   telelco.back.gbr telelco.backmask.gbr telelco.fab.gbr telelco.front.gbr telelco.frontmask.gbr telelco.frontpaste.gbr telelco.frontsilk.gbr telelco.plated-drill.cnc telelco.xy  Makefile # telelco.xls
+zip:   telelco.bottom.gbr telelco.bottommask.gbr telelco.fab.gbr telelco.top.gbr telelco.topmask.gbr telelco.toppaste.gbr telelco.topsilk.gbr telelco.plated-drill.cnc telelco.xy  Makefile # telelco.xls
        zip telelco.zip telelco.*.gbr telelco.*.cnc telelco.xy # telelco.xls
 
 clean:

diff --git a/packages/usbcable.fp b/packages/usbcable.fp
new file mode 100644 (file)
index 0000000..b779134
--- /dev/null
+++ b/packages/usbcable.fp
@@ -0,0 +1,10 @@
+# USB Cable, Molex 0887283400
+Element[0x00000000 "USB Cable" "J0" "" 0 0 125 -30 0 100 0x00000000]
+(
+# Pin args:  X Y Thickness Clearance Mask DrillHole
+       Pin[    0 0 6250 3000 6850 3800 "1" "1" 0x04000101]
+       Pin[ 7500 0 6250 3000 6850 3800 "2" "2" 0x04000001]
+       Pin[15000 0 6250 3000 6850 3800 "3" "3" 0x04000001]
+       Pin[22500 0 6250 3000 6850 3800 "4" "4" 0x04000001]
+       Pin[31500 0 8700 3000 9300 6250 "5" "5" 0x04000001]
+)

diff --git a/telelco.pcb b/telelco.pcb
index 1e17282daf8d1d99f257a04116b3266ecdba7d21..aa5926376ead16af3f5599aed7106b2102e2a276 100644 (file)
--- a/telelco.pcb
+++ b/telelco.pcb
@@ -6,7 +6,7 @@ FileVersion[20070407]
 PCB["TeleLco" 1150000 450000]
 
 Grid[100.0 0 0 0]
-Cursor[0 0 0.000000]
+Cursor[301300 231700 0.000000]
 PolyArea[200000000.000000]
 Thermal[0.500000]
 DRC[500 1000 500 500 1500 650]
@@ -1007,38 +1007,6 @@ Element["onsolder" "LCD-S101D14TR" "U22" "unknown" 375000 125000 -125 -30 2 100
 
        )
 
-Element["onsolder" "PEC11L" "S2" "unknown" 79800 329900 -125 -30 2 100 "auto"]
-(
-       Pin[9850 29500 6500 2000 7500 3900 "terminal A" "A" "edge2"]
-       Pin[0 29500 6500 2000 7500 3900 "common" "C" "edge2,thermal(1X)"]
-       Pin[-9850 29500 6500 2000 7500 3900 "terminal B" "B" "edge2"]
-       Pin[9850 -29500 6500 2000 7500 3900 "1" "" "edge2"]
-       Pin[-9850 -29500 6500 2000 7500 3900 "2" "" "edge2"]
-       Pin[25200 0 13100 13600 14100 10500 "Left" "" "edge2"]
-       Pin[-25200 0 13100 13600 14100 10500 "Right" "" "edge2"]
-       ElementLine [-23250 -23600 23250 -23600 1000]
-       ElementLine [-23250 -23600 -23250 23600 1000]
-       ElementLine [-23250 23600 23250 23600 1000]
-       ElementLine [23250 -23600 23250 23600 1000]
-
-       )
-
-Element["onsolder" "PEC11L" "S1" "unknown" 307500 330000 -125 -30 2 100 "auto"]
-(
-       Pin[9850 29500 6500 2000 7500 3900 "terminal A" "A" "edge2"]
-       Pin[0 29500 6500 2000 7500 3900 "common" "C" "edge2,thermal(1X)"]
-       Pin[-9850 29500 6500 2000 7500 3900 "terminal B" "B" "edge2"]
-       Pin[9850 -29500 6500 2000 7500 3900 "1" "" "edge2"]
-       Pin[-9850 -29500 6500 2000 7500 3900 "2" "" "edge2"]
-       Pin[25200 0 13100 13600 14100 10500 "Left" "" "edge2"]
-       Pin[-25200 0 13100 13600 14100 10500 "Right" "" "edge2"]
-       ElementLine [-23250 -23600 23250 -23600 1000]
-       ElementLine [-23250 -23600 -23250 23600 1000]
-       ElementLine [-23250 23600 23250 23600 1000]
-       ElementLine [23250 -23600 23250 23600 1000]
-
-       )
-
 Element["" "0-215079-4" "J6" "Debug" 54911 5387 -16724 -3898 0 100 ""]
 (
        Pin[0 10000 6299 1200 7299 3150 "1" "1" "square,edge2,thermal(1t)"]
@@ -1889,6 +1857,44 @@ Element["" "B2B-PH" "B1" "LiPo" 563500 164900 0 0 0 100 ""]
        ElementLine [23228 17717 23228 0 600]
        ElementLine [23228 0 0 0 600]
 
+       )
+
+Element["" "usbcable" "J1" "unknown" 750200 300300 125 -30 0 100 ""]
+(
+       Pin[0 0 6250 3000 6850 3800 "1" "1" "square,edge2"]
+       Pin[7500 0 6250 3000 6850 3800 "2" "2" "edge2"]
+       Pin[15000 0 6250 3000 6850 3800 "3" "3" "edge2"]
+       Pin[22500 0 6250 3000 6850 3800 "4" "4" "edge2"]
+       Pin[31500 0 8700 3000 9300 6250 "5" "5" "edge2"]
+
+       )
+
+Element["" "PEC11" "S2" "unknown" 751900 368600 125 -30 0 100 ""]
+(
+       Pin[-9850 29500 6500 2000 7500 3900 "terminal A" "A" "edge2"]
+       Pin[0 29500 6500 2000 7500 3900 "common" "C" "edge2"]
+       Pin[9850 29500 6500 2000 7500 3900 "terminal B" "B" "edge2"]
+       Pin[-25200 0 13100 13600 14100 10500 "Left" "" "edge2"]
+       Pin[25200 0 13100 13600 14100 10500 "Right" "" "edge2"]
+       ElementLine [-23250 -23600 23250 -23600 1000]
+       ElementLine [23250 -23600 23250 23600 1000]
+       ElementLine [23250 23600 -23250 23600 1000]
+       ElementLine [-23250 23600 -23250 -23600 1000]
+
+       )
+
+Element["" "PEC11" "S1" "unknown" 866100 367300 125 -30 0 100 ""]
+(
+       Pin[-9850 29500 6500 2000 7500 3900 "terminal A" "A" "edge2"]
+       Pin[0 29500 6500 2000 7500 3900 "common" "C" "edge2"]
+       Pin[9850 29500 6500 2000 7500 3900 "terminal B" "B" "edge2"]
+       Pin[-25200 0 13100 13600 14100 10500 "Left" "" "edge2"]
+       Pin[25200 0 13100 13600 14100 10500 "Right" "" "edge2"]
+       ElementLine [-23250 -23600 23250 -23600 1000]
+       ElementLine [23250 -23600 23250 23600 1000]
+       ElementLine [23250 23600 -23250 23600 1000]
+       ElementLine [-23250 23600 -23250 -23600 1000]
+
        )
 Rat[87800 126700 1 159300 135007 0  ""]
 Rat[168950 82950 0 162800 85700 0  ""]
@@ -1917,16 +1923,19 @@ Rat[414450 25400 1 424450 25400 1  ""]
 Rat[69911 5387 1 58200 77900 0  ""]
 Rat[64911 15387 1 61000 85200 1  ""]
 Rat[479600 397300 1 191327 210627 0  ""]
-Rat[354748 292107 0 416500 298258 1  ""]
-Rat[354748 292107 0 307500 359500 1  ""]
-Rat[307500 359500 1 257978 292207 0  ""]
-Rat[416500 298258 1 525926 325007 0  ""]
-Rat[525926 325007 0 549526 312107 0  ""]
+Rat[571177 175924 1 549526 312107 0  ""]
+Rat[549526 312107 0 525926 325007 0  ""]
 Rat[549526 312107 0 598326 317807 0  ""]
 Rat[598326 317807 0 616826 318007 0  ""]
 Rat[525926 325007 0 548000 386800 1  ""]
 Rat[616826 318007 0 655300 377400 0  ""]
 Rat[548000 386800 1 479600 437300 1  ""]
+Rat[655300 377400 0 751900 398100 1  ""]
+Rat[751900 398100 1 772700 300300 1  ""]
+Rat[525926 325007 0 416500 298258 1  ""]
+Rat[416500 298258 1 354748 292107 0  ""]
+Rat[354748 292107 0 257978 292207 0  ""]
+Rat[751900 398100 1 866100 396800 1  ""]
 Rat[257978 292207 0 263908 166600 0  ""]
 Rat[263908 163254 0 220900 155500 1  ""]
 Rat[220900 155500 0 204600 157100 1  ""]
@@ -1955,13 +1964,12 @@ Rat[304300 52200 1 356700 105500 0  ""]
 Rat[379200 109800 0 385300 126307 0  ""]
 Rat[389600 126700 0 417600 123200 1  ""]
 Rat[66100 152900 0 68500 245000 1  ""]
+Rat[68500 245000 1 35500 245000 1  ""]
 Rat[68500 245000 1 101500 245000 1  ""]
 Rat[101500 245000 1 134500 245000 1  ""]
-Rat[68500 245000 1 35500 245000 1  ""]
 Rat[134500 245000 1 131848 292033 0  ""]
 Rat[35500 245000 1 31526 292107 0  ""]
-Rat[31526 292107 0 79800 359400 1  ""]
-Rat[79800 359400 1 38100 435100 1  ""]
+Rat[31526 292107 0 38100 435100 1  ""]
 Rat[128700 292033 0 122900 292033 0  ""]
 Rat[128700 292033 0 157227 126573 0  ""]
 Rat[34674 292107 0 40126 292107 0  ""]
@@ -2021,13 +2029,13 @@ Rat[49500 25400 1 39500 25400 1  ""]
 Rat[563000 376800 1 222822 88188 0  ""]
 Rat[558000 386800 1 239900 98100 1  ""]
 Rat[342300 292107 0 336548 292107 0  ""]
-Rat[336548 292107 0 317350 359500 1  ""]
+Rat[342300 292107 0 856250 396800 1  ""]
 Rat[278426 292107 0 271874 292207 0  ""]
-Rat[278426 292107 0 297650 359500 1  ""]
+Rat[278426 292107 0 875950 396800 1  ""]
 Rat[119752 292033 0 111574 292107 0  ""]
-Rat[111574 292107 0 89650 359400 1  ""]
+Rat[119752 292033 0 742050 398100 1  ""]
 Rat[48426 292107 0 43274 292107 0  ""]
-Rat[48426 292107 0 69950 359400 1  ""]
+Rat[48426 292107 0 761750 398100 1  ""]
 Rat[124500 245000 1 279400 89700 0  ""]
 Rat[91500 245000 1 281400 114700 0  ""]
 Rat[58500 245000 1 279400 139700 0  ""]
@@ -2037,11 +2045,15 @@ Rat[598226 361280 0 659200 377400 0  ""]
 Rat[619974 318007 0 659200 387200 0  ""]
 Rat[594880 361280 0 564526 325007 0  ""]
 Rat[598226 367776 0 529074 325007 0  ""]
+Rat[757700 300300 1 429469 133835 0  ""]
+Rat[765200 300300 1 429469 131277 0  ""]
+Rat[579051 175924 1 552674 312107 0  ""]
 Rat[552674 312107 0 581400 336400 1  ""]
 Rat[581400 336400 1 651400 377400 0  ""]
 Rat[385400 120500 0 621400 336400 1  ""]
 Rat[601474 317807 0 567674 325007 0  ""]
 Rat[601474 317807 0 651400 387200 0  ""]
+Rat[651400 387200 0 750200 300300 1  ""]
 Rat[567674 325007 0 427598 136394 0  ""]
 Layer(1 "top")
 (

diff --git a/telelco.sch b/telelco.sch
index 601d93bbda80719d1890a8fa2042c4c1bb26a1b5..2bee42477a56de7b1b3d0f5bccdfa9752490ceb8 100644 (file)
--- a/telelco.sch
+++ b/telelco.sch
@@ -1567,7 +1567,7 @@ refdes=S1
 T 77400 67925 5 10 1 1 0 0 1
 description=Box Selector
 T 76500 66000 5 10 0 0 0 0 1
-footprint=PEC11L
+footprint=PEC11
 }
 C 85500 66000 1 0 0 rotary-switch.sym
 {
@@ -1576,7 +1576,7 @@ refdes=S2
 T 86500 67875 5 10 1 1 0 0 1
 description=Pad Selector
 T 85500 66000 5 10 0 0 0 0 1
-footprint=PEC11L
+footprint=PEC11
 }
 C 75550 67200 1 0 0 resistor.sym
 {
@@ -2217,6 +2217,8 @@ C 47300 65800 1 0 0 conn-4.sym
 {
 T 47600 67400 5 10 1 1 0 0 1
 refdes=J1
+T 47300 65800 5 10 0 0 0 0 1
+footprint=usbcable
 }
 N 47300 67100 46000 67100 4
 {