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Bdale Garbee [Sun, 3 Jan 2010 06:09:08 +0000 (23:09 -0700)]
pull ends of traces used to clear milled corners in from board edge 10 mils
Bdale Garbee [Sun, 3 Jan 2010 03:25:33 +0000 (20:25 -0700)]
use traces at board outline to force bottom layer plane away from
notched corners .. can't think of a better way to do it right now?
Bdale Garbee [Sun, 3 Jan 2010 03:15:57 +0000 (20:15 -0700)]
added an outline layer, shoved various things around to fit better
Bdale Garbee [Sun, 3 Jan 2010 00:49:33 +0000 (17:49 -0700)]
attribute updates
Bdale Garbee [Thu, 31 Dec 2009 05:16:43 +0000 (00:16 -0500)]
add serial number silkscreen patch and move back side copyright text
Bdale Garbee [Sun, 20 Dec 2009 03:50:40 +0000 (20:50 -0700)]
reasonable draft completion of TeleDongle PCB
Bdale Garbee [Sun, 13 Dec 2009 18:55:43 +0000 (11:55 -0700)]
route complete, copyrights and so forth added to silk
some drc issues remain, and still silk needs major cleanup
Bdale Garbee [Sun, 13 Dec 2009 17:45:21 +0000 (10:45 -0700)]
snapshot before moving usb connector
Bdale Garbee [Sun, 13 Dec 2009 17:09:52 +0000 (10:09 -0700)]
fully routed, some drc violations, not happy with connector locations yet
Bdale Garbee [Sat, 12 Dec 2009 16:54:48 +0000 (11:54 -0500)]
snapshot initial work on dedicated teledongle board derived from telemetrum
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