pull ends of traces used to clear milled corners in from board edge 10 mils

diff --git a/teledongle.pcb b/teledongle.pcb
index cf1fc8ce36612c9ae7229a6947740469f2ca5abc..97cbdb4ba5a939e9d749a6a48a1df3fca4810eec 100644 (file)
--- a/teledongle.pcb
+++ b/teledongle.pcb
@@ -1569,10 +1569,10 @@ Layer(2 "bottom")
        Line[8600 75000 4600 71000 1000 2000 "clearline"]
        Line[4600 71000 4600 50100 1000 2000 "clearline"]
        Line[4600 50100 11200 43500 1000 2000 "clearline"]
-       Line[88400 0 88400 9750 600 2000 "clearline"]
-       Line[100250 21600 110000 21600 600 2000 "clearline"]
-       Line[21600 110000 21600 100250 600 2000 "clearline"]
-       Line[9750 88400 0 88400 600 2000 "clearline"]
+       Line[88400 1000 88400 9750 600 2000 "clearline"]
+       Line[100250 21600 109000 21600 600 2000 "clearline"]
+       Line[21600 109000 21600 100250 600 2000 "clearline"]
+       Line[9750 88400 1000 88400 600 2000 "clearline"]
        Arc[100250 9750 11800 11800 600 2000 0 90 "clearline"]
        Arc[9750 100250 11800 11800 600 2000 180 90 "clearline"]
        Polygon("clearpoly")