# release: pcb 20100929
-# date: Mon Apr 18 02:18:44 2011
+# date: Mon Apr 18 02:27:55 2011
# user: bdale (Bdale Garbee,KB0G)
# host: rover
Via[196500 70500 3000 2000 0 1500 "" "thermal(0S)"]
Via[205500 70500 3000 2000 0 1500 "" ""]
Via[205500 91900 3000 2000 0 1500 "" ""]
-Via[259400 95200 3000 2000 0 1500 "" ""]
+Via[259300 96300 3000 2000 0 1500 "" ""]
Via[229200 101000 3000 2000 0 1500 "" ""]
Via[208100 62600 3000 2000 0 1500 "" ""]
Via[209900 99700 3000 2000 0 1500 "" ""]
)
-Element["onsolder" "0402" "R5" "5k" 259300 91074 2756 -3267 3 100 "auto"]
+Element["onsolder" "0402" "R5" "5k" 259300 91574 2756 -3267 3 100 "auto"]
(
Pad[-393 1574 393 1574 1968 2000 2568 "1" "1" "onsolder,square"]
Pad[-393 -1574 393 -1574 1968 2000 2568 "2" "2" "onsolder,square"]
)
-Element["" "PNswitchDPDT" "S1" "On/OFF" 272402 99097 -3302 14801 0 100 ""]
+Element["" "PNswitchDPDT" "S1" "On/OFF" 272399 103802 -3302 14801 0 100 ""]
(
Pin[4901 -9802 7874 3937 8661 3504 "1" "1" "square"]
Pin[4901 0 7874 3937 8661 3504 "2" "2" ""]
Line[248100 121900 250500 121900 1000 2000 "clearline"]
Line[242626 127000 242626 124226 1000 2000 "clearline"]
Line[242626 124226 244952 121900 1000 2000 "clearline"]
- Line[267500 99097 267500 99100 2500 2000 "clearline"]
- Line[267500 99100 260800 105800 2500 2000 "clearline"]
+ Line[220912 45412 219400 43900 1000 2000 "clearline"]
+ Line[267397 103702 260800 105800 2500 2000 "clearline"]
Line[260800 105800 260800 111500 2500 2000 "clearline"]
Line[260800 111500 255500 116800 2500 2000 "clearline"]
Line[250500 117209 250909 116800 2500 2000 "clearline"]
Line[246900 97800 248700 99600 1000 2000 "clearline"]
Line[246900 93900 246900 97800 1000 2000 "clearline"]
Line[251026 91800 250969 91857 1000 2000 "clearline"]
- Line[267500 89295 267495 89295 2500 2000 "clearline"]
- Line[267495 89295 264500 86300 2500 2000 "clearline"]
- Line[264500 86300 254400 86300 2500 2000 "clearline"]
- Line[254400 86300 251100 89600 2500 2000 "clearline"]
- Line[251100 89600 251100 91726 2500 2000 "clearline"]
+ Line[51500 73600 51500 81171 1000 2000 "clearline"]
+ Line[220912 52675 220912 45412 1000 2000 "clearline"]
+ Line[60200 64900 51500 73600 1000 2000 "clearline"]
+ Line[142900 78700 129100 64900 1000 2000 "clearline"]
+ Line[159700 78700 142900 78700 1000 2000 "clearline"]
Line[251100 91726 250969 91857 2500 2000 "clearline"]
Line[250969 91857 248943 91857 1000 2000 "clearline"]
Line[248943 91857 246900 93900 1000 2000 "clearline"]
Line[256252 97152 254800 95700 1000 2000 "clearline"]
Line[259400 99700 259400 92748 1000 2000 "clearline"]
Line[259400 92748 259300 92648 1000 2000 "clearline"]
- Line[259300 89500 259300 86500 1000 2000 "clearline"]
+ Line[129100 64900 60200 64900 1000 2000 "clearline"]
Line[237300 99700 242726 99700 1000 2000 "clearline"]
Line[242726 99700 242769 99657 1000 2000 "clearline"]
Line[242601 113008 237592 113008 1000 2000 "clearline"]
Line[73700 68800 66500 76000 1000 2000 "clearline"]
Line[66500 76000 66500 81170 1000 2000 "clearline"]
Line[66500 81170 66324 81346 1000 2000 "clearline"]
- Line[159700 78700 142900 78700 1000 2000 "clearline"]
- Line[142900 78700 129100 64900 1000 2000 "clearline"]
- Line[129100 64900 60200 64900 1000 2000 "clearline"]
- Line[60200 64900 51500 73600 1000 2000 "clearline"]
- Line[51500 73600 51500 81171 1000 2000 "clearline"]
- Line[220912 52675 220912 45412 1000 2000 "clearline"]
- Line[220912 45412 219400 43900 1000 2000 "clearline"]
+ Line[267497 94000 267497 93897 2500 2000 "clearline"]
+ Line[267497 93897 263000 89400 2500 2000 "clearline"]
+ Line[263000 89400 253426 89400 2500 2000 "clearline"]
+ Line[253426 89400 250969 91857 2500 2000 "clearline"]
)
Layer(3 "outline")
(