we're using more than just the lpc11u14, rename directory to lpc11u1x
authorBdale Garbee <bdale@gag.com>
Wed, 4 Aug 2021 08:31:09 +0000 (02:31 -0600)
committerBdale Garbee <bdale@gag.com>
Wed, 4 Aug 2021 08:31:09 +0000 (02:31 -0600)
datasheets/nxp/lpc11u14/LPCXpresso_Getting_Started_Guide.pdf [deleted file]
datasheets/nxp/lpc11u14/bios [deleted file]
datasheets/nxp/lpc11u14/cortex_m0_r0p0_trm.pdf [deleted file]
datasheets/nxp/lpc11u14/lpc11u1x-datasheet.pdf [deleted file]
datasheets/nxp/lpc11u14/lpc11u1x-user-manual.pdf [deleted file]
datasheets/nxp/lpc11u1x/LPCXpresso_Getting_Started_Guide.pdf [new file with mode: 0644]
datasheets/nxp/lpc11u1x/bios [new file with mode: 0644]
datasheets/nxp/lpc11u1x/cortex_m0_r0p0_trm.pdf [new file with mode: 0644]
datasheets/nxp/lpc11u1x/lpc11u1x-datasheet.pdf [new file with mode: 0644]
datasheets/nxp/lpc11u1x/lpc11u1x-user-manual.pdf [new file with mode: 0644]

diff --git a/datasheets/nxp/lpc11u14/LPCXpresso_Getting_Started_Guide.pdf b/datasheets/nxp/lpc11u14/LPCXpresso_Getting_Started_Guide.pdf
deleted file mode 100644 (file)
index 7342885..0000000
Binary files a/datasheets/nxp/lpc11u14/LPCXpresso_Getting_Started_Guide.pdf and /dev/null differ
diff --git a/datasheets/nxp/lpc11u14/bios b/datasheets/nxp/lpc11u14/bios
deleted file mode 100644 (file)
index 7764060..0000000
+++ /dev/null
@@ -1,4175 +0,0 @@
-LPC11U14 BIOS
-
-Interrupt vectors (we assume)
-
-0x1fff0000:    0x10000ffc      0x1fff0041      0x1fff00e1      0x1fff00e3
-0x1fff0010:    0x1fff00e5      0x1fff00e7      0x1fff00e9      0xffffffff
-0x1fff0020:    0xffffffff      0xffffffff      0xffffffff      0x1fff00eb
-0x1fff0030:    0x1fff00ed      0xffffffff      0x1fff00ef      0x1fff00f1
-
-
-Call graph
-1fff0040
-       1fff0048        Load CRP value to SCB register
-               1fff0350        Checks the pins PIN0_1 for ISP force
-                       1fff0348
-                               1fff02f6        Validate application and jump
-                                       
-                                       Unless something is weird, you'll get to here. This
-                                       checksums the first bit of the application interrupt table
-                                       and jumps to the application if it's ok.
-
-                                       1fff008c        jump to other system
-                               1fff02e4
-
-                                       This looks like the ISP bits, which we're going to ignore
-
-                                       1fff02b0        setup clocks
-                                       1fff0264
-                                               1fff022c
-                                               1fff0e54
-                                               1fff019c
-                                               1fff0d9c        setup_serial
-                                               1fff0e04
-                                               1fff0d9c        setup_serial
-                                               1fff00f4
-
-
-boot:
-
-       boot() {
-               start();
-       }
-
-
-   0x1fff0040: ldr     r2, [pc, #0]    ; (0x1fff0044)  1fff0049
-   0x1fff0042: bx      r2
-
-0x1fff0040:    0x47104a00      0x1fff0049      0x4b1b4a1a      0x4d1c681b
-
-   0x1fff0044: lsls    r1, r1, #1
-   0x1fff0046: subs    r7, r7, #7
-
-start:
-
-       Check Code Read Protection values
-
-   0x1fff0048: ldr     r2, [pc, #104]  ; (0x1fff00b4)  400483f0
-   0x1fff004a: ldr     r3, [pc, #108]  ; (0x1fff00b8)  1fff00c8
-   0x1fff004c: ldr     r3, [r3, #0]                    000002fc
-   0x1fff004e: ldr     r5, [pc, #112]  ; (0x1fff00c0)  1fff00d0
-   0x1fff0050: ldr     r5, [r5, #0]                    43218765        CRP3
-   0x1fff0052: ldr     r6, [pc, #112]  ; (0x1fff00c4)  1fff00d4
-   0x1fff0054: ldr     r6, [r6, #0]                    12345678        CRP1
-   0x1fff0056: ldr     r4, [r3, #0]                    (000002fc)      CRP
-
-       if CRP == CRP3
-
-   0x1fff0058: cmp     r4, r5
-   0x1fff005a: beq.n   0x1fff0060
-
-       if CRP == CRP1
-
-=> 0x1fff005c: cmp     r4, r6
-   0x1fff005e: bne.n   0x1fff0064
-
-       if (r4 == r5 || r4 == r6) {
-
-   0x1fff0060: ldr     r4, [pc, #88]   ; (0x1fff00bc)  1fff00cc
-   0x1fff0062: ldr     r4, [r4, #0]                    87654321        CRP2
-
-               r4 = 0x87654321;
-       }
-
-
-       Write the resulting CRP value to the SCB register
-
-   0x1fff0064: str     r4, [r2, #0]                                    SCB register before DEVICE_ID
-
-       This pretty clearly changes the memory mapping so that low
-       addresses (higher than the interrupt vector) come from rom
-
-   0x1fff0066: ldr     r2, [pc, #52]   ; (0x1fff009c)  4003c000        FLASHCFG
-   0x1fff0068: ldr     r3, [r2, #0]
-   0x1fff006a: movs    r4, #64 ; 0x40
-   0x1fff006c: orrs    r3, r4
-   0x1fff006e: str     r3, [r2, #0]
-
-       Check and see if the memory mapping changes worked
-
-   0x1fff0070: ldr     r3, [pc, #44]   ; (0x1fff00a0)  0000043c
-   0x1fff0072: ldr     r2, [r3, #0]
-   0x1fff0074: ldr     r4, [pc, #44]   ; (0x1fff00a4)  000005d0
-   0x1fff0076: ldr     r4, [r4, #0]
-   0x1fff0078: ldr     r5, [pc, #44]   ; (0x1fff00a8)  1fff00dc
-   0x1fff007a: ldr     r5, [r5, #0]                    3456abcd
-   0x1fff007c: cmp     r4, r5
-   0x1fff007e: beq.n   0x1fff0084
-
-       Initialize stack
-
-   0x1fff0080: ldr     r2, [pc, #40]   ; (0x1fff00ac)  1fff00d8
-   0x1fff0082: ldr     r2, [r2, #0]                    10000fff
-   0x1fff0084: subs    r2, #31
-   0x1fff0086: mov     sp, r2
-
-       Jump to main function
-
-   0x1fff0088: ldr     r2, [pc, #36]   ; (0x1fff00b0)  1fff0351
-   0x1fff008a: bx      r2
-
-       Load stack/pc from address pointed at by r0 and jump
-
-   0x1fff008c: ldr     r1, [r0, #0]
-   0x1fff008e: mov     sp, r1
-   0x1fff0090: ldr     r1, [r0, #4]
-   0x1fff0092: bx      r1
-
-       This is the same.
-
-   0x1fff0094: ldr     r1, [r0, #0]
-   0x1fff0096: mov     sp, r1
-   0x1fff0098: ldr     r1, [r0, #4]
-   0x1fff009a: bx      r1
-
-0x1fff0090:    0x47086841      0x468d6801      0x47086841      0x4003c000
-0x1fff00a0:    0x0000043c      0x000005d0      0x1fff00dc      0x1fff00d8
-0x1fff00b0:    0x1fff0351      0x400483f0      0x1fff00c8      0x1fff00cc
-0x1fff00c0:    0x1fff00d0      0x1fff00d4      0x000002fc      0x87654321
-0x1fff00d0:    0x43218765      0x12345678      0x10000fff      0x3456abcd
-0x1fff00e0:    0xe7fe4770      0xe7fee7fe      0x4770e7fe      0x47704770
-0x1fff00f0:    0xffff4770      0x4eddb51c      0x4dde4fdd      0x48dd2401
-0x1fff0100:    0x2146aa01      0xf0003898      0x2800fe7d      0x217ad1f7
-
-   0x1fff009c: stmia   r0!, {}
-   0x1fff009e: ands    r3, r0
-   0x1fff00a0: lsls    r4, r7, #16
-   0x1fff00a2: movs    r0, r0
-   0x1fff00a4: lsls    r0, r2, #23
-   0x1fff00a6: movs    r0, r0
-   0x1fff00a8: lsls    r4, r3, #3
-   0x1fff00aa: subs    r7, r7, #7
-   0x1fff00ac: lsls    r0, r3, #3
-   0x1fff00ae: subs    r7, r7, #7
-   0x1fff00b0: lsls    r1, r2, #13
-   0x1fff00b2: subs    r7, r7, #7
-   0x1fff00b4: strh    r0, [r6, #30]
-   0x1fff00b6: ands    r4, r0
-   0x1fff00b8: lsls    r0, r1, #3
-   0x1fff00ba: subs    r7, r7, #7
-   0x1fff00bc: lsls    r4, r1, #3
-   0x1fff00be: subs    r7, r7, #7
-   0x1fff00c0: lsls    r0, r2, #3
-   0x1fff00c2: subs    r7, r7, #7
-   0x1fff00c4: lsls    r4, r2, #3
-   0x1fff00c6: subs    r7, r7, #7
-   0x1fff00c8: lsls    r4, r7, #11
-   0x1fff00ca: movs    r0, r0
-   0x1fff00cc: orrs    r1, r4
-   0x1fff00ce: strh    r5, [r4, #58]   ; 0x3a
-   0x1fff00d0: strh    r5, [r4, #58]   ; 0x3a
-   0x1fff00d2: orrs    r1, r4
-   0x1fff00d4: ldrsb   r0, [r7, r1]
-   0x1fff00d6: asrs    r4, r6, #8
-   0x1fff00d8: lsrs    r7, r7, #31
-   0x1fff00da: asrs    r0, r0, #32
-   0x1fff00dc: add     r3, sp, #820    ; 0x334
-   0x1fff00de: adds    r4, #86 ; 0x56
-   0x1fff00e0: bx      lr
-   0x1fff00e2: b.n     0x1fff00e2
-   0x1fff00e4: b.n     0x1fff00e4
-   0x1fff00e6: b.n     0x1fff00e6
-   0x1fff00e8: b.n     0x1fff00e8
-   0x1fff00ea: bx      lr
-   0x1fff00ec: bx      lr
-   0x1fff00ee: bx      lr
-   0x1fff00f0: bx      lr
-   0x1fff00f2: vsli.32 d27, d12, #31
-
-
-
-   0x1fff00f4: push    {r2, r3, r4, lr}
-   0x1fff00f6: ldr     r6, [pc, #884]  ; (0x1fff046c)
-   0x1fff00f8: ldr     r7, [pc, #884]  ; (0x1fff0470)
-   0x1fff00fa: ldr     r5, [pc, #888]  ; (0x1fff0474)
-   0x1fff00fc: movs    r4, #1
-   0x1fff00fe: ldr     r0, [pc, #884]  ; (0x1fff0474)
-   0x1fff0100: add     r2, sp, #4
-   0x1fff0102: movs    r1, #70 ; 0x46
-   0x1fff0104: subs    r0, #152        ; 0x98
-   0x1fff0106: bl      0x1fff0e04
-   0x1fff010a: cmp     r0, #0
-   0x1fff010c: bne.n   0x1fff00fe
-   0x1fff010e: movs    r1, #122        ; 0x7a
-   0x1fff0110: lsls    r2, r0, #2
-   0x1fff0112: ldr     r2, [r5, r2]
-   0x1fff0114: adds    r0, r0, #1
-   0x1fff0116: strb    r1, [r2, #0]
-   0x1fff0118: cmp     r0, #5
-   0x1fff011a: blt.n   0x1fff0110
-   0x1fff011c: movs    r0, #15
-   0x1fff011e: ldr     r2, [pc, #852]  ; (0x1fff0474)
-   0x1fff0120: str     r0, [sp, #0]
-   0x1fff0122: mov     r0, r2
-   0x1fff0124: movs    r3, #5
-   0x1fff0126: subs    r0, #152        ; 0x98
-   0x1fff0128: ldr     r1, [sp, #4]
-   0x1fff012a: bl      0x1fff0fd8
-   0x1fff012e: cmp     r0, #0
-   0x1fff0130: beq.n   0x1fff00fe
-   0x1fff0132: ldr     r1, [r5, #0]
-   0x1fff0134: ldrb    r1, [r1, #0]
-   0x1fff0136: cmp     r1, #82 ; 0x52
-   0x1fff0138: beq.n   0x1fff0184
-   0x1fff013a: cmp     r1, #84 ; 0x54
-   0x1fff013c: beq.n   0x1fff0184
-   0x1fff013e: cmp     r1, #71 ; 0x47
-   0x1fff0140: beq.n   0x1fff0184
-   0x1fff0142: cmp     r1, #77 ; 0x4d
-   0x1fff0144: beq.n   0x1fff0184
-   0x1fff0146: movs    r2, #0
-   0x1fff0148: cmp     r1, #87 ; 0x57
-   0x1fff014a: beq.n   0x1fff0188
-   0x1fff014c: cmp     r1, #67 ; 0x43
-   0x1fff014e: beq.n   0x1fff0188
-   0x1fff0150: movs    r4, #0
-   0x1fff0152: ldr     r1, [pc, #804]  ; (0x1fff0478)
-   0x1fff0154: ldr     r3, [r6, #0]
-   0x1fff0156: ldr     r1, [r1, #8]
-   0x1fff0158: cmp     r1, r3
-   0x1fff015a: beq.n   0x1fff016a
-   0x1fff015c: ldr     r3, [r7, #0]
-   0x1fff015e: cmp     r1, r3
-   0x1fff0160: beq.n   0x1fff016a
-   0x1fff0162: ldr     r3, [pc, #792]  ; (0x1fff047c)
-   0x1fff0164: ldr     r3, [r3, #0]
-   0x1fff0166: cmp     r1, r3
-   0x1fff0168: bne.n   0x1fff016e
-   0x1fff016a: cmp     r2, #1
-   0x1fff016c: beq.n   0x1fff018c
-   0x1fff016e: ldr     r2, [r6, #0]
-   0x1fff0170: cmp     r1, r2
-   0x1fff0172: beq.n   0x1fff017a
-   0x1fff0174: ldr     r2, [r7, #0]
-   0x1fff0176: cmp     r1, r2
-   0x1fff0178: bne.n   0x1fff017e
-   0x1fff017a: cmp     r4, #1
-   0x1fff017c: beq.n   0x1fff018c
-   0x1fff017e: bl      0x1fff0bcc
-   0x1fff0182: b.n     0x1fff00fe
-   0x1fff0184: movs    r2, #1
-   0x1fff0186: b.n     0x1fff0152
-   0x1fff0188: movs    r4, #1
-   0x1fff018a: b.n     0x1fff0152
-   0x1fff018c: movs    r2, #15
-   0x1fff018e: movs    r0, #19
-   0x1fff0190: ldr     r1, [r5, #4]
-   0x1fff0192: bl      0x1fff1064
-   0x1fff0196: bl      0x1ff0d9c       setup_serial
-   0x1fff019a: b.n     0x1fff00fe
-
-
-
-   0x1fff019c: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff019e: ldr     r6, [pc, #736]  ; (0x1fff0480)
-   0x1fff01a0: ldr     r7, [pc, #736]  ; (0x1fff0484)
-   0x1fff01a2: ldr     r4, [pc, #740]  ; (0x1fff0488)
-   0x1fff01a4: movs    r5, #1
-   0x1fff01a6: movs    r0, #2
-   0x1fff01a8: str     r0, [r7, #4]
-   0x1fff01aa: ldr     r0, [r6, #0]
-   0x1fff01ac: lsls    r0, r0, #13
-   0x1fff01ae: bmi.n   0x1fff01aa
-   0x1fff01b0: ldr     r0, [r6, #0]
-   0x1fff01b2: lsls    r0, r0, #13
-   0x1fff01b4: bpl.n   0x1fff01b0
-   0x1fff01b6: str     r5, [r7, #4]
-   0x1fff01b8: ldr     r0, [r6, #0]
-   0x1fff01ba: lsls    r0, r0, #13
-   0x1fff01bc: bmi.n   0x1fff01b8
-   0x1fff01be: ldr     r0, [r6, #0]
-   0x1fff01c0: lsls    r0, r0, #13
-   0x1fff01c2: bpl.n   0x1fff01be
-   0x1fff01c4: movs    r0, #0
-   0x1fff01c6: str     r0, [r7, #4]
-   0x1fff01c8: ldr     r0, [r7, #8]
-   0x1fff01ca: movs    r1, #208        ; 0xd0
-   0x1fff01cc: bl      0x1fff11d4
-   0x1fff01d0: movs    r2, #0
-   0x1fff01d2: movs    r1, #3
-   0x1fff01d4: bl      0x1fff0d28
-   0x1fff01d8: ldr     r0, [r4, #8]
-   0x1fff01da: lsrs    r0, r0, #3
-   0x1fff01dc: lsls    r0, r0, #3
-   0x1fff01de: str     r0, [r4, #8]
-   0x1fff01e0: ldr     r0, [r4, #8]
-   0x1fff01e2: orrs    r0, r5
-   0x1fff01e4: str     r0, [r4, #8]
-   0x1fff01e6: ldr     r0, [r4, #12]
-   0x1fff01e8: lsrs    r0, r0, #3
-   0x1fff01ea: lsls    r0, r0, #3
-   0x1fff01ec: str     r0, [r4, #12]
-   0x1fff01ee: ldr     r0, [r4, #12]
-   0x1fff01f0: orrs    r0, r5
-   0x1fff01f2: str     r0, [r4, #12]
-   0x1fff01f4: ldr     r0, [pc, #660]  ; (0x1fff048c)
-   0x1fff01f6: bl      0x1ff0d9c       setup_serial
-   0x1fff01fa: bl      0x1fff0de2
-   0x1fff01fe: ldr     r0, [pc, #628]  ; (0x1fff0474)
-   0x1fff0200: movs    r2, #0
-   0x1fff0202: movs    r1, #70 ; 0x46
-   0x1fff0204: subs    r0, #152        ; 0x98
-   0x1fff0206: bl      0x1fff0e04
-   0x1fff020a: ldr     r0, [pc, #616]  ; (0x1fff0474)
-   0x1fff020c: ldr     r1, [pc, #636]  ; (0x1fff048c)
-   0x1fff020e: subs    r0, #152        ; 0x98
-   0x1fff0210: bl      0x1fff0fb8
-   0x1fff0214: cmp     r0, #0
-   0x1fff0216: beq.n   0x1fff022a
-   0x1fff0218: ldr     r0, [r4, #8]
-   0x1fff021a: lsrs    r0, r0, #3
-   0x1fff021c: lsls    r0, r0, #3
-   0x1fff021e: str     r0, [r4, #8]
-   0x1fff0220: ldr     r0, [r4, #12]
-   0x1fff0222: lsrs    r0, r0, #3
-   0x1fff0224: lsls    r0, r0, #3
-   0x1fff0226: str     r0, [r4, #12]
-   0x1fff0228: b.n     0x1fff01a6
-   0x1fff022a: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff022c: ldr     r0, [pc, #608]  ; (0x1fff0490)
-   0x1fff022e: ldr     r1, [r0, #0]
-   0x1fff0230: movs    r2, #1
-   0x1fff0232: lsls    r2, r2, #12
-   0x1fff0234: orrs    r1, r2
-   0x1fff0236: str     r1, [r0, #0]
-   0x1fff0238: movs    r1, #1
-   0x1fff023a: str     r1, [r0, #24]
-   0x1fff023c: ldr     r1, [pc, #596]  ; (0x1fff0494)
-   0x1fff023e: movs    r0, #133        ; 0x85
-   0x1fff0240: str     r0, [r1, #40]   ; 0x28
-   0x1fff0242: ldr     r0, [pc, #596]  ; (0x1fff0498)
-   0x1fff0244: ldr     r1, [r0, #0]
-   0x1fff0246: lsls    r2, r2, #6
-   0x1fff0248: bics    r1, r2
-   0x1fff024a: str     r1, [r0, #0]
-   0x1fff024c: ldr     r0, [pc, #568]  ; (0x1fff0488)
-   0x1fff024e: ldr     r1, [r0, #8]
-   0x1fff0250: lsrs    r1, r1, #3
-   0x1fff0252: lsls    r1, r1, #3
-   0x1fff0254: str     r1, [r0, #8]
-   0x1fff0256: ldr     r1, [r0, #8]
-   0x1fff0258: str     r1, [r0, #8]
-   0x1fff025a: ldr     r0, [pc, #576]  ; (0x1fff049c)
-   0x1fff025c: ldr     r1, [r0, #0]
-   0x1fff025e: bics    r1, r2
-   0x1fff0260: str     r1, [r0, #0]
-   0x1fff0262: bx      lr
-
-
-       {
-
-   0x1fff0264: bl      0x1fff022c
-   0x1fff0268: movs    r0, #1
-   0x1fff026a: bl      0x1fff0e54
-   0x1fff026e: bl      0x1fff019c
-   0x1fff0272: ldr     r0, [pc, #556]  ; (0x1fff04a0)  1fff1f24
-   0x1fff0274: bl      0x1ff0d9c       setup_serial
-
-
-   0x1fff0278: ldr     r0, [pc, #504]  ; (0x1fff0474)  100000f8
-   0x1fff027a: movs    r2, #0
-   0x1fff027c: movs    r1, #70 ; 0x46
-   0x1fff027e: subs    r0, #152        ; 0x98
-   0x1fff0280: bl      0x1fff0e04
-   0x1fff0284: ldr     r4, [pc, #496]  ; (0x1fff0478)
-   0x1fff0286: ldr     r0, [pc, #540]  ; (0x1fff04a4)
-   0x1fff0288: str     r0, [r4, #0]
-   0x1fff028a: ldr     r0, [pc, #532]  ; (0x1fff04a0)
-   0x1fff028c: bl      0x1ff0d9c       setup_serial
-   0x1fff0290: movs    r0, #1
-   0x1fff0292: ldr     r1, [pc, #480]  ; (0x1fff0474)
-   0x1fff0294: str     r0, [r4, #4]
-   0x1fff0296: ldr     r0, [pc, #476]  ; (0x1fff0474)
-   0x1fff0298: subs    r1, #80 ; 0x50
-   0x1fff029a: str     r1, [r0, #0]
-   0x1fff029c: adds    r1, #16
-   0x1fff029e: str     r1, [r0, #4]
-   0x1fff02a0: adds    r1, #16
-   0x1fff02a2: str     r1, [r0, #8]
-   0x1fff02a4: adds    r1, #16
-   0x1fff02a6: str     r1, [r0, #12]
-   0x1fff02a8: adds    r1, #16
-   0x1fff02aa: str     r1, [r0, #16]
-   0x1fff02ac: bl      0x1fff00f4
-
-       }
-
-
-Set up clocks
-
-       {
-
-   0x1fff02b0: ldr     r0, [pc, #476]  ; (0x1fff0490)  40048080        SYSAHBCLKCTRL
-   0x1fff02b2: subs    r0, #64 ; 0x40                                  SYSPLLCLKSEL
-   0x1fff02b4: ldr     r3, [r0, #48]   ; 0x30                          MAINCLKSEL
-
-       R1 = 0
-       R1 = 1
-       R3 = 0
-
-   0x1fff02b6: movs    r1, #0
-   0x1fff02b8: movs    r2, #1
-   0x1fff02ba: cmp     r3, #0
-   0x1fff02bc: beq.n   0x1fff02c4
-
-       {
-
-               Switch to IRC osc
-
-   0x1fff02be: str     r1, [r0, #48]   ; 0x30                          MAINCLKSEL
-   0x1fff02c0: str     r1, [r0, #52]   ; 0x34                          MAINCLKUEN
-   0x1fff02c2: str     r2, [r0, #52]   ; 0x34                          MAINCLKUEN
-
-       }
-
-               SYSAHBCLKDIV = 1
-
-   0x1fff02c4: str     r2, [r0, #56]   ; 0x38                          SYSAHBCLKDIV
-
-       SYSAHBCLKCTRL |= 0x02010040
-
-   0x1fff02c6: ldr     r0, [pc, #456]  ; (0x1fff0490)  40048080        SYSAHBCLKCTRL
-   0x1fff02c8: ldr     r2, [r0, #0]
-   0x1fff02ca: ldr     r3, [pc, #476]  ; (0x1fff04a8)  02010040
-   0x1fff02cc: orrs    r2, r3
-   0x1fff02ce: str     r2, [r0, #0]
-
-       CT32B1
-               Prescale = 0
-               Prescale counter = 0
-               CTCR |= 0xc;
-
-
-   0x1fff02d0: ldr     r0, [pc, #432]  ; (0x1fff0484)  40018000        CT32B1
-   0x1fff02d2: str     r1, [r0, #12]
-   0x1fff02d4: str     r1, [r0, #16]
-   0x1fff02d6: ldr     r0, [pc, #428]  ; (0x1fff0484)  40018000        CT32B1
-   0x1fff02d8: adds    r0, #64 ; 0x40
-   0x1fff02da: ldr     r1, [r0, #48]   ; 0x30
-   0x1fff02dc: movs    r2, #12
-   0x1fff02de: ands    r1, r2
-   0x1fff02e0: str     r1, [r0, #48]   ; 0x30
-   0x1fff02e2: bx      lr
-
-       }
-       {
-
-   0x1fff02e4: ldr     r0, [pc, #452]  ; (0x1fff04ac)  1fff00c8
-   0x1fff02e6: ldr     r1, [pc, #400]  ; (0x1fff0478)  10000050
-   0x1fff02e8: ldr     r0, [r0, #0]                    000002fc
-   0x1fff02ea: ldr     r0, [r0, #0]
-   0x1fff02ec: str     r0, [r1, #8]
-   0x1fff02ee: bl      0x1fff02b0      ; Set up clocks
-   0x1fff02f2: bl      0x1fff0264
-
-       }
-       
-       {
-
-   0x1fff02f6: push    {r4, r5, r6, lr}
-
-       Mash flash controller to change memory mapping around again
-   
-   0x1fff02f8: ldr     r1, [pc, #436]  ; (0x1fff04b0)  4003c000        flash controller
-   0x1fff02fa: ldr     r0, [r1, #0]
-   0x1fff02fc: movs    r2, #64 ; 0x40
-   0x1fff02fe: orrs    r0, r2
-   0x1fff0300: str     r0, [r1, #0]
-   0x1fff0302: ldr     r0, [pc, #432]  ; (0x1fff04b4)  00000458
-   0x1fff0304: ldr     r5, [pc, #392]  ; (0x1fff0490)  40048080        system control block + 0x80
-   0x1fff0306: movs    r3, #2
-   0x1fff0308: subs    r5, #128        ; 0x80                          system control block
-   0x1fff030a: ldr     r4, [r0, #0]                    (00000458)
-   0x1fff030c: str     r3, [r5, #0]                    scb[0]          system memory remap
-   0x1fff030e: ldr     r3, [pc, #424]  ; (0x1fff04b8)  000005fc
-   0x1fff0310: ldr     r0, [r0, #0]                    (00000458)
-   0x1fff0312: ldr     r3, [r3, #0]                    (000005fc)
-
-
-       Mash flash controller to revert memory mapping change
-
-   0x1fff0314: ldr     r6, [r1, #0]                    (4003c000)
-   0x1fff0316: bics    r6, r2
-   0x1fff0318: str     r6, [r1, #0]
-
-
-       Compute the application checksum
-
-       sum = 0
-       for (i = 0; i < 8; i++) {
-               v = addr[i];
-               sum += v;
-       }
-
-   0x1fff031a: movs    r2, #0
-   0x1fff031c: mov     r1, r2
-   0x1fff031e: lsls    r6, r1, #2
-   0x1fff0320: ldr     r6, [r0, r6]
-   0x1fff0322: adds    r1, r1, #1
-   0x1fff0324: adds    r2, r6, r2
-   0x1fff0326: cmp     r1, #8
-   0x1fff0328: blt.n   0x1fff031e
-
-       Check and see if the application checksum is zero
-
-   0x1fff032a: cmp     r2, #0
-   0x1fff032c: beq.n   0x1fff0334
-   0x1fff032e: movs    r0, #0
-   0x1fff0330: str     r0, [r5, #0]
-
-       Bail if the application isn't valid
-
-       return;
-
-   0x1fff0332: pop     {r4, r5, r6, pc}
-
-
-       Go start the application
-       
-   0x1fff0334: ldr     r0, [pc, #388]  ; (0x1fff04bc)  1fff1ff8
-   0x1fff0336: ldr     r0, [r0, #0]                    1fff1f54
-   0x1fff0338: ldr     r0, [r0, #12]                   (1fff1f60)      1fff1f34
-   0x1fff033a: ldr     r1, [r0, #8]                    1fff13dd
-   0x1fff033c: mov     r0, r3
-   0x1fff033e: blx     r1
-   0x1fff0340: mov     r0, r4
-   0x1fff0342: bl      0x1fff008c
-   0x1fff0346: pop     {r4, r5, r6, pc}
-
-       }
-
-   0x1fff0348: bl      0x1fff02f6
-   0x1fff034c: bl      0x1fff02e4
-
-called from 1fff0088. Appears to be the main entry, called
-after the memory system and stack are set up
-
-main() {
-}
-
-   0x1fff0350: push    {r0, r1, r2, r3, r4, lr}
-
-       Mash the flash cfg again to change memory mapping around
-
-   0x1fff0352: ldr     r4, [pc, #348]  ; (0x1fff04b0)  4003c000
-   0x1fff0354: ldr     r0, [r4, #0]
-   0x1fff0356: movs    r5, #64 ; 0x40
-   0x1fff0358: bics    r0, r5
-   0x1fff035a: str     r0, [r4, #0]
-
-
-   0x1fff035c: ldr     r0, [pc, #332]  ; (0x1fff04ac)  1fff00c8
-   0x1fff035e: ldr     r0, [r0, #0]                    000005ec
-   0x1fff0360: ldr     r1, [r0, #0]
-   0x1fff0362: ldr     r0, [pc, #276]  ; (0x1fff0478)  10000050
-   0x1fff0364: str     r1, [r0, #8]
-   0x1fff0366: ldr     r0, [r4, #0]
-   0x1fff0368: orrs    r0, r5
-   0x1fff036a: str     r0, [r4, #0]
-   0x1fff036c: ldr     r0, [pc, #336]  ; (0x1fff04c0)  000005d0
-   0x1fff036e: ldr     r1, [pc, #340]  ; (0x1fff04c4)  3456abcd
-   0x1fff0370: ldr     r0, [r0, #0]
-   0x1fff0372: cmp     r0, r1
-   0x1fff0374: beq.n   0x1fff037e
-   0x1fff0376: ldr     r0, [r4, #0]
-   0x1fff0378: bics    r0, r5
-   0x1fff037a: str     r0, [r4, #0]
-   0x1fff037c: b.n     0x1fff037c
-
-
-   0x1fff037e: ldr     r0, [pc, #328]  ; (0x1fff04c8)  000005ec
-   0x1fff0380: ldr     r6, [pc, #268]  ; (0x1fff0490)  40048080
-   0x1fff0382: ldr     r0, [r0, #0]
-   0x1fff0384: ldr     r1, [pc, #324]  ; (0x1fff04cc)  534b4950
-   0x1fff0386: ldr     r7, [pc, #328]  ; (0x1fff04d0)  400483c0
-   0x1fff0388: adds    r6, #192        ; 0xc0
-   0x1fff038a: cmp     r0, r1
-   0x1fff038c: bne.n   0x1fff039e
-   0x1fff038e: ldr     r0, [pc, #324]  ; (0x1fff04d4)  12345678
-   0x1fff0390: str     r0, [r7, #16]
-   0x1fff0392: ldr     r0, [pc, #324]  ; (0x1fff04d8)  000005e8
-   0x1fff0394: ldr     r0, [r0, #0]
-   0x1fff0396: str     r0, [r6, #32]
-   0x1fff0398: movs    r0, #0
-   0x1fff039a: str     r0, [r7, #16]
-   0x1fff039c: b.n     0x1fff03be
-       {
-
-   0x1fff039e: movs    r1, #12
-   0x1fff03a0: ldr     r0, [pc, #312]  ; (0x1fff04dc)  000005f0
-   0x1fff03a2: str     r1, [sp, #0]
-   0x1fff03a4: ldr     r0, [r0, #0]
-   0x1fff03a6: str     r0, [sp, #4]
-   0x1fff03a8: ldr     r0, [pc, #272]  ; (0x1fff04bc)  1fff1ff8
-   0x1fff03aa: str     r1, [sp, #8]
-   0x1fff03ac: ldr     r0, [r0, #0]                    1fff1f54
-   0x1fff03ae: add     r1, sp, #12
-   0x1fff03b0: ldr     r0, [r0, #12]                   1fff1f34
-   0x1fff03b2: ldr     r2, [r0, #4]                    1fff161d        
-   0x1fff03b4: mov     r0, sp
-   0x1fff03b6: blx     r2
-   0x1fff03b8: ldr     r0, [r4, #0]
-   0x1fff03ba: orrs    r0, r5
-   0x1fff03bc: str     r0, [r4, #0]
-       }
-
-
-   0x1fff03be: ldr     r0, [pc, #288]  ; (0x1fff04e0)
-   0x1fff03c0: ldr     r0, [r0, #0]
-   0x1fff03c2: str     r0, [r7, #56]   ; 0x38
-   0x1fff03c4: ldr     r0, [pc, #284]  ; (0x1fff04e4)
-   0x1fff03c6: ldr     r0, [r0, #0]
-   0x1fff03c8: str     r0, [r7, #60]   ; 0x3c
-   0x1fff03ca: ldr     r0, [pc, #284]  ; (0x1fff04e8)
-   0x1fff03cc: movs    r1, #0
-   0x1fff03ce: ldr     r0, [r0, #0]
-   0x1fff03d0: mvns    r1, r1
-   0x1fff03d2: subs    r0, #63 ; 0x3f
-   0x1fff03d4: str     r1, [r0, #60]   ; 0x3c
-   0x1fff03d6: ldr     r2, [pc, #276]  ; (0x1fff04ec)
-   0x1fff03d8: ldr     r1, [pc, #180]  ; (0x1fff0490)
-   0x1fff03da: ldr     r0, [r2, #0]
-   0x1fff03dc: str     r0, [r1, #0]
-   0x1fff03de: ldr     r0, [pc, #272]  ; (0x1fff04f0)
-   0x1fff03e0: ldr     r0, [r0, #0]
-   0x1fff03e2: str     r0, [r6, #20]
-   0x1fff03e4: ldr     r0, [pc, #268]  ; (0x1fff04f4)
-   0x1fff03e6: ldr     r6, [pc, #168]  ; (0x1fff0490)
-   0x1fff03e8: ldr     r0, [r0, #0]
-   0x1fff03ea: subs    r6, #128        ; 0x80
-   0x1fff03ec: str     r0, [r6, #40]   ; 0x28
-   0x1fff03ee: ldr     r0, [r2, #0]
-   0x1fff03f0: lsls    r3, r0, #20
-   0x1fff03f2: movs    r0, #1
-   0x1fff03f4: cmp     r3, #0
-   0x1fff03f6: bge.n   0x1fff03fa
-   0x1fff03f8: str     r0, [r1, #20]
-   0x1fff03fa: ldr     r3, [r2, #0]
-   0x1fff03fc: lsls    r3, r3, #19
-   0x1fff03fe: bpl.n   0x1fff0402
-   0x1fff0400: str     r0, [r1, #24]
-   0x1fff0402: ldr     r1, [r2, #0]
-   0x1fff0404: lsls    r3, r1, #17
-   0x1fff0406: ldr     r1, [pc, #240]  ; (0x1fff04f8)
-   0x1fff0408: bpl.n   0x1fff040c
-   0x1fff040a: str     r0, [r1, #8]
-   0x1fff040c: ldr     r2, [r2, #0]
-   0x1fff040e: lsls    r2, r2, #16
-   0x1fff0410: bpl.n   0x1fff0414
-   0x1fff0412: str     r0, [r1, #24]
-   0x1fff0414: ldr     r0, [pc, #228]  ; (0x1fff04fc)  000005c8
-   0x1fff0416: ldr     r2, [r4, #0]
-   0x1fff0418: ldr     r1, [r0, #0]                    
-   0x1fff041a: ldr     r0, [pc, #228]  ; (0x1fff0500)  000005cc
-   0x1fff041c: ldr     r0, [r0, #0]
-   0x1fff041e: bics    r2, r5
-   0x1fff0420: str     r2, [r4, #0]
-   0x1fff0422: ldr     r2, [pc, #224]  ; (0x1fff0504)  20080620
-   0x1fff0424: cmp     r1, r2
-   0x1fff0426: bne.n   0x1fff042c
-   0x1fff0428: bl      0x1fff0094      ; set sp to r0[0], jump to r0[4]
-
-   0x1fff042c: ldr     r0, [r6, #48]   ; 0x30
-   0x1fff042e: lsls    r0, r0, #29
-   0x1fff0430: bmi.n   0x1fff0450
-
-       {
-
-   0x1fff0432: ldr     r0, [pc, #76]   ; (0x1fff0480)  50002100        GPIO PIN0 register
-   0x1fff0434: ldr     r0, [r0, #0]
-   0x1fff0436: lsls    r0, r0, #30
-   0x1fff0438: bmi.n   0x1fff0450
-   0x1fff043a: ldr     r0, [pc, #60]   ; (0x1fff0478)
-   0x1fff043c: ldr     r1, [pc, #48]   ; (0x1fff0470)
-   0x1fff043e: ldr     r0, [r0, #8]
-   0x1fff0440: ldr     r1, [r1, #0]
-   0x1fff0442: cmp     r0, r1
-   0x1fff0444: beq.n   0x1fff0450
-   0x1fff0446: ldr     r1, [pc, #192]  ; (0x1fff0508)
-   0x1fff0448: cmp     r0, r1
-   0x1fff044a: beq.n   0x1fff0450
-   0x1fff044c: bl      0x1fff02e4
-
-       }
-
-   0x1fff0450: bl      0x1fff0348
-   0x1fff0454: ldr     r2, [pc, #44]   ; (0x1fff0484)
-   0x1fff0456: movs    r3, #2
-   0x1fff0458: str     r3, [r2, #4]
-   0x1fff045a: movs    r3, #1
-   0x1fff045c: str     r3, [r2, #4]
-   0x1fff045e: muls    r1, r0
-   0x1fff0460: ldr     r0, [r2, #8]
-   0x1fff0462: cmp     r0, r1
-   0x1fff0464: bcc.n   0x1fff0460
-   0x1fff0466: movs    r0, #0
-   0x1fff0468: str     r0, [r2, #4]
-   0x1fff046a: bx      lr
-
-0x1fff0460:    0x42886890      0x2000d3fc      0x47706050      0x1fff00cc
-0x1fff0470:    0x1fff00d0      0x100000f8      0x10000050      0x1fff00d4
-0x1fff0480:    0x50002100      0x40018000      0x40044040      0x1fff1f10
-0x1fff0490:    0x40048080      0x40008000      0x50002400      0x50002000
-0x1fff04a0:    0x1fff1f24      0x00002ee0      0x02010440      0x1fff00c8
-0x1fff04b0:    0x4003c000      0x00000458      0x000005fc      0x1fff1ff8
-0x1fff04c0:    0x000005d0      0x3456abcd      0x000005ec      0x534b4950
-0x1fff04d0:    0x400483c0      0x12345678      0x000005e8      0x000005f0
-0x1fff04e0:    0x00000430      0x000005e0      0x0000043c      0x000005b0
-0x1fff04f0:    0x000005b4      0x000005bc      0x400480c0      0x000005c8
-0x1fff0500:    0x000005cc      0x20080620      0x4e697370      0x4dffb57f
-0x1fff0510:    0x68a82264      0x9b004669      0xfdc5f000      0x0e240604
-0x1fff0520:    0x6868d11d      0xa9012267      0xf0009b00      0x0604fdbc
-0x1fff0530:    0xd1140e24      0x22692300      0x68e8a902      0xfdb3f000
-0x1fff0540:    0x9802b2c4      0xd0012808      0xe008240c      0xd1062c00
-0x1fff0550:    0x22692300      0x6928a903      0xfda5f000      0x220fb2c4
-
-   0x1fff046c: lsls    r4, r1, #3
-   0x1fff046e: subs    r7, r7, #7
-   0x1fff0470: lsls    r0, r2, #3
-   0x1fff0472: subs    r7, r7, #7
-   0x1fff0474: lsls    r0, r7, #3
-   0x1fff0476: asrs    r0, r0, #32
-   0x1fff0478: lsls    r0, r2, #1
-   0x1fff047a: asrs    r0, r0, #32
-   0x1fff047c: lsls    r4, r2, #3
-   0x1fff047e: subs    r7, r7, #7
-   0x1fff0480: movs    r1, #0
-   0x1fff0482: str     r0, [r0, r0]
-   0x1fff0484: strh    r0, [r0, #0]
-   0x1fff0486: ands    r1, r0
-   0x1fff0488: eors    r0, r0
-   0x1fff048a: ands    r4, r0
-   0x1fff048c: subs    r0, r2, #4
-   0x1fff048e: subs    r7, r7, #7
-   0x1fff0490: strh    r0, [r0, #4]
-   0x1fff0492: ands    r4, r0
-   0x1fff0494: strh    r0, [r0, #0]
-   0x1fff0496: ands    r0, r0
-   0x1fff0498: movs    r4, #0
-   0x1fff049a: str     r0, [r0, r0]
-   0x1fff049c: movs    r0, #0
-   0x1fff049e: str     r0, [r0, r0]
-   0x1fff04a0: subs    r4, r4, #4
-   0x1fff04a2: subs    r7, r7, #7
-   0x1fff04a4: cmp     r6, #224        ; 0xe0
-   0x1fff04a6: movs    r0, r0
-   0x1fff04a8: lsls    r0, r0, #17
-   0x1fff04aa: lsls    r1, r0, #8
-   0x1fff04ac: lsls    r0, r1, #3
-   0x1fff04ae: subs    r7, r7, #7
-   0x1fff04b0: stmia   r0!, {}
-   0x1fff04b2: ands    r3, r0
-   0x1fff04b4: lsls    r0, r3, #17
-   0x1fff04b6: movs    r0, r0
-   0x1fff04b8: lsls    r4, r7, #23
-   0x1fff04ba: movs    r0, r0
-   0x1fff04bc: subs    r0, r7, #7
-   0x1fff04be: subs    r7, r7, #7
-   0x1fff04c0: lsls    r0, r2, #23
-   0x1fff04c2: movs    r0, r0
-   0x1fff04c4: add     r3, sp, #820    ; 0x334
-   0x1fff04c6: adds    r4, #86 ; 0x56
-   0x1fff04c8: lsls    r4, r5, #23
-   0x1fff04ca: movs    r0, r0
-   0x1fff04cc: ldr     r1, [pc, #320]  ; (0x1fff0610)
-   0x1fff04ce: strh    r3, [r1, r5]
-   0x1fff04d0: strh    r0, [r0, #30]
-   0x1fff04d2: ands    r4, r0
-   0x1fff04d4: ldrsb   r0, [r7, r1]
-   0x1fff04d6: asrs    r4, r6, #8
-   0x1fff04d8: lsls    r0, r5, #23
-   0x1fff04da: movs    r0, r0
-   0x1fff04dc: lsls    r0, r6, #23
-   0x1fff04de: movs    r0, r0
-   0x1fff04e0: lsls    r0, r6, #16
-   0x1fff04e2: movs    r0, r0
-   0x1fff04e4: lsls    r0, r4, #23
-   0x1fff04e6: movs    r0, r0
-   0x1fff04e8: lsls    r4, r7, #16
-   0x1fff04ea: movs    r0, r0
-   0x1fff04ec: lsls    r0, r6, #22
-   0x1fff04ee: movs    r0, r0
-   0x1fff04f0: lsls    r4, r6, #22
-   0x1fff04f2: movs    r0, r0
-   0x1fff04f4: lsls    r4, r7, #22
-   0x1fff04f6: movs    r0, r0
-   0x1fff04f8: strh    r0, [r0, #6]
-   0x1fff04fa: ands    r4, r0
-   0x1fff04fc: lsls    r0, r1, #23
-   0x1fff04fe: movs    r0, r0
-   0x1fff0500: lsls    r4, r1, #23
-   0x1fff0502: movs    r0, r0
-   0x1fff0504: lsls    r0, r4, #24
-   0x1fff0506: movs    r0, #8
-   0x1fff0508: strb    r0, [r6, #13]
-   0x1fff050a: ldr     r6, [pc, #420]  ; (0x1fff06b0)
-
-       {
-
-
-   0x1fff050c: push    {r0, r1, r2, r3, r4, r5, r6, lr}
-   0x1fff050e: ldr     r5, [pc, #1020] ; (0x1fff090c)
-   0x1fff0510: movs    r2, #100        ; 0x64
-   0x1fff0512: ldr     r0, [r5, #8]
-   0x1fff0514: mov     r1, sp
-   0x1fff0516: ldr     r3, [sp, #0]
-   0x1fff0518: bl      0x1fff10a6
-   0x1fff051c: lsls    r4, r0, #24
-   0x1fff051e: lsrs    r4, r4, #24
-   0x1fff0520: bne.n   0x1fff055e
-   0x1fff0522: ldr     r0, [r5, #4]
-   0x1fff0524: movs    r2, #103        ; 0x67
-   0x1fff0526: add     r1, sp, #4
-   0x1fff0528: ldr     r3, [sp, #0]
-   0x1fff052a: bl      0x1fff10a6
-   0x1fff052e: lsls    r4, r0, #24
-   0x1fff0530: lsrs    r4, r4, #24
-   0x1fff0532: bne.n   0x1fff055e
-   0x1fff0534: movs    r3, #0
-   0x1fff0536: movs    r2, #105        ; 0x69
-   0x1fff0538: add     r1, sp, #8
-   0x1fff053a: ldr     r0, [r5, #12]
-   0x1fff053c: bl      0x1fff10a6
-   0x1fff0540: uxtb    r4, r0
-   0x1fff0542: ldr     r0, [sp, #8]
-   0x1fff0544: cmp     r0, #8
-   0x1fff0546: beq.n   0x1fff054c
-   0x1fff0548: movs    r4, #12
-   0x1fff054a: b.n     0x1fff055e
-   0x1fff054c: cmp     r4, #0
-   0x1fff054e: bne.n   0x1fff055e
-   0x1fff0550: movs    r3, #0
-   0x1fff0552: movs    r2, #105        ; 0x69
-   0x1fff0554: add     r1, sp, #12
-   0x1fff0556: ldr     r0, [r5, #16]
-   0x1fff0558: bl      0x1fff10a6
-   0x1fff055c: uxtb    r4, r0
-   0x1fff055e: movs    r2, #15
-   0x1fff0560: mov     r0, r4
-   0x1fff0562: ldr     r1, [r5, #0]
-   0x1fff0564: bl      0x1fff1064
-   0x1fff0568: bl      0x1ff0d9c       setup_serial
-   0x1fff056c: ldr     r0, [pc, #928]  ; (0x1fff0910)
-   0x1fff056e: cmp     r4, #0
-   0x1fff0570: bne.n   0x1fff05a2
-   0x1fff0572: b.n     0x1fff059c
-   0x1fff0574: ldr     r1, [sp, #12]
-   0x1fff0576: cmp     r1, #0
-   0x1fff0578: beq.n   0x1fff0586
-   0x1fff057a: ldr     r1, [r0, #4]
-   0x1fff057c: lsls    r1, r1, #23
-   0x1fff057e: bpl.n   0x1fff057a
-   0x1fff0580: ldr     r1, [r0, #4]
-   0x1fff0582: lsls    r1, r1, #23
-   0x1fff0584: bmi.n   0x1fff0580
-   0x1fff0586: ldr     r1, [sp, #8]
-   0x1fff0588: cmp     r1, #8
-   0x1fff058a: bne.n   0x1fff059c
-   0x1fff058c: ldr     r2, [r0, #4]
-   0x1fff058e: ldr     r1, [sp, #4]
-   0x1fff0590: strb    r2, [r1, #0]
-   0x1fff0592: adds    r1, r1, #1
-   0x1fff0594: str     r1, [sp, #4]
-   0x1fff0596: ldr     r1, [sp, #0]
-   0x1fff0598: subs    r1, r1, #1
-   0x1fff059a: str     r1, [sp, #0]
-   0x1fff059c: ldr     r1, [sp, #0]
-   0x1fff059e: cmp     r1, #0
-   0x1fff05a0: bne.n   0x1fff0574
-   0x1fff05a2: pop     {r0, r1, r2, r3, r4, r5, r6, pc}
-
-       }
-
-
-   0x1fff05a4: push    {r4, r5, r6, lr}
-   0x1fff05a6: ldr     r5, [pc, #868]  ; (0x1fff090c)
-   0x1fff05a8: ldr     r6, [pc, #872]  ; (0x1fff0914)
-   0x1fff05aa: movs    r3, #0
-   0x1fff05ac: movs    r2, #105        ; 0x69
-   0x1fff05ae: adds    r1, r6, #4
-   0x1fff05b0: ldr     r0, [r5, #4]
-   0x1fff05b2: bl      0x1fff10a6
-   0x1fff05b6: mov     r4, r6
-   0x1fff05b8: adds    r4, #20
-   0x1fff05ba: str     r0, [r4, #0]
-   0x1fff05bc: cmp     r0, #0
-   0x1fff05be: bne.n   0x1fff05f4
-   0x1fff05c0: mov     r1, r4
-   0x1fff05c2: movs    r3, #0
-   0x1fff05c4: movs    r2, #105        ; 0x69
-   0x1fff05c6: subs    r1, #12
-   0x1fff05c8: ldr     r0, [r5, #8]
-   0x1fff05ca: bl      0x1fff10a6
-   0x1fff05ce: str     r0, [r4, #0]
-   0x1fff05d0: cmp     r0, #0
-   0x1fff05d2: bne.n   0x1fff05f4
-   0x1fff05d4: mov     r1, r4
-   0x1fff05d6: movs    r3, #0
-   0x1fff05d8: movs    r2, #105        ; 0x69
-   0x1fff05da: subs    r1, #8
-   0x1fff05dc: ldr     r0, [r5, #12]
-   0x1fff05de: bl      0x1fff10a6
-   0x1fff05e2: str     r0, [r4, #0]
-   0x1fff05e4: cmp     r0, #0
-   0x1fff05e6: bne.n   0x1fff05f4
-   0x1fff05e8: movs    r0, #56 ; 0x38
-   0x1fff05ea: str     r0, [r6, #0]
-   0x1fff05ec: mov     r1, r4
-   0x1fff05ee: mov     r0, r6
-   0x1fff05f0: bl      0x1fff1ff0
-   0x1fff05f4: ldr     r1, [r5, #4]
-   0x1fff05f6: movs    r2, #15
-   0x1fff05f8: ldr     r0, [r4, #0]
-   0x1fff05fa: bl      0x1fff1064
-   0x1fff05fe: bl      0x1ff0d9c       setup_serial
-   0x1fff0602: ldr     r0, [r4, #0]
-   0x1fff0604: cmp     r0, #10
-   0x1fff0606: bne.n   0x1fff0616
-   0x1fff0608: ldr     r1, [r5, #4]
-   0x1fff060a: movs    r2, #15
-   0x1fff060c: ldr     r0, [r4, #4]
-   0x1fff060e: bl      0x1fff1064
-   0x1fff0612: bl      0x1ff0d9c       setup_serial
-   0x1fff0616: pop     {r4, r5, r6, pc}
-
-
-
-   0x1fff0618: push    {r4, r5, r6, lr}
-   0x1fff061a: ldr     r5, [pc, #752]  ; (0x1fff090c)
-   0x1fff061c: ldr     r6, [pc, #756]  ; (0x1fff0914)
-   0x1fff061e: movs    r3, #0
-   0x1fff0620: movs    r2, #105        ; 0x69
-   0x1fff0622: adds    r1, r6, #4
-   0x1fff0624: ldr     r0, [r5, #4]
-   0x1fff0626: bl      0x1fff10a6
-   0x1fff062a: mov     r4, r6
-   0x1fff062c: adds    r4, #20
-   0x1fff062e: str     r0, [r4, #0]
-   0x1fff0630: cmp     r0, #0
-   0x1fff0632: bne.n   0x1fff0654
-   0x1fff0634: mov     r1, r4
-   0x1fff0636: movs    r3, #0
-   0x1fff0638: movs    r2, #105        ; 0x69
-   0x1fff063a: subs    r1, #12
-   0x1fff063c: ldr     r0, [r5, #8]
-   0x1fff063e: bl      0x1fff10a6
-   0x1fff0642: str     r0, [r4, #0]
-   0x1fff0644: cmp     r0, #0
-   0x1fff0646: bne.n   0x1fff0654
-   0x1fff0648: movs    r0, #53 ; 0x35
-   0x1fff064a: str     r0, [r6, #0]
-   0x1fff064c: mov     r1, r4
-   0x1fff064e: mov     r0, r6
-   0x1fff0650: bl      0x1fff1ff0
-   0x1fff0654: ldr     r1, [r5, #4]
-   0x1fff0656: movs    r2, #15
-   0x1fff0658: ldr     r0, [r4, #0]
-   0x1fff065a: bl      0x1fff1064
-   0x1fff065e: bl      0x1ff0d9c       setup_serial
-   0x1fff0662: ldr     r0, [r4, #0]
-   0x1fff0664: cmp     r0, #8
-   0x1fff0666: bne.n   0x1fff06a6
-   0x1fff0668: ldr     r0, [pc, #684]  ; (0x1fff0918)
-   0x1fff066a: ldr     r1, [pc, #688]  ; (0x1fff091c)
-   0x1fff066c: ldr     r0, [r0, #0]
-   0x1fff066e: ldr     r1, [r1, #0]
-   0x1fff0670: cmp     r0, r1
-   0x1fff0672: beq.n   0x1fff0684
-   0x1fff0674: ldr     r1, [pc, #680]  ; (0x1fff0920)
-   0x1fff0676: ldr     r1, [r1, #0]
-   0x1fff0678: cmp     r0, r1
-   0x1fff067a: beq.n   0x1fff0684
-   0x1fff067c: ldr     r1, [pc, #676]  ; (0x1fff0924)
-   0x1fff067e: ldr     r1, [r1, #0]
-   0x1fff0680: cmp     r0, r1
-   0x1fff0682: bne.n   0x1fff068a
-   0x1fff0684: movs    r0, #0
-   0x1fff0686: str     r0, [r4, #4]
-   0x1fff0688: str     r0, [r4, #8]
-   0x1fff068a: ldr     r1, [r5, #4]
-   0x1fff068c: movs    r2, #15
-   0x1fff068e: ldr     r0, [r4, #4]
-   0x1fff0690: bl      0x1fff1064
-   0x1fff0694: bl      0x1ff0d9c       setup_serial
-   0x1fff0698: ldr     r1, [r5, #4]
-   0x1fff069a: movs    r2, #15
-   0x1fff069c: ldr     r0, [r4, #8]
-   0x1fff069e: bl      0x1fff1064
-   0x1fff06a2: bl      0x1ff0d9c       setup_serial
-   0x1fff06a6: pop     {r4, r5, r6, pc}
-
-
-
-   0x1fff06a8: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff06aa: ldr     r0, [pc, #636]  ; (0x1fff0928)
-   0x1fff06ac: ldr     r1, [pc, #604]  ; (0x1fff090c)
-   0x1fff06ae: ldr     r2, [r0, #0]
-   0x1fff06b0: ldr     r0, [r1, #4]
-   0x1fff06b2: cmp     r2, #1
-   0x1fff06b4: beq.n   0x1fff06ce
-   0x1fff06b6: ldr     r4, [pc, #604]  ; (0x1fff0914)
-   0x1fff06b8: movs    r3, #0
-   0x1fff06ba: movs    r2, #105        ; 0x69
-   0x1fff06bc: adds    r1, r4, #4
-   0x1fff06be: bl      0x1fff10a6
-   0x1fff06c2: mov     r5, r4
-   0x1fff06c4: adds    r5, #20
-   0x1fff06c6: str     r0, [r5, #0]
-   0x1fff06c8: cmp     r0, #0
-   0x1fff06ca: beq.n   0x1fff06d6
-   0x1fff06cc: b.n     0x1fff06e8
-   0x1fff06ce: movs    r2, #15
-   0x1fff06d0: mov     r1, r0
-   0x1fff06d2: mov     r0, r2
-   0x1fff06d4: b.n     0x1fff0784
-   0x1fff06d6: ldr     r0, [pc, #564]  ; (0x1fff090c)
-   0x1fff06d8: ldr     r1, [pc, #568]  ; (0x1fff0914)
-   0x1fff06da: ldr     r0, [r0, #8]
-   0x1fff06dc: movs    r3, #0
-   0x1fff06de: movs    r2, #105        ; 0x69
-   0x1fff06e0: adds    r1, #8
-   0x1fff06e2: bl      0x1fff10a6
-   0x1fff06e6: str     r0, [r5, #0]
-   0x1fff06e8: ldr     r0, [pc, #556]  ; (0x1fff0918)
-   0x1fff06ea: ldr     r1, [pc, #560]  ; (0x1fff091c)
-   0x1fff06ec: ldr     r0, [r0, #0]
-   0x1fff06ee: ldr     r1, [r1, #0]
-   0x1fff06f0: movs    r2, #19
-   0x1fff06f2: ldr     r6, [pc, #568]  ; (0x1fff092c)
-   0x1fff06f4: movs    r7, #64 ; 0x40
-   0x1fff06f6: cmp     r0, r1
-   0x1fff06f8: beq.n   0x1fff0702
-   0x1fff06fa: ldr     r1, [pc, #548]  ; (0x1fff0920)
-   0x1fff06fc: ldr     r1, [r1, #0]
-   0x1fff06fe: cmp     r0, r1
-   0x1fff0700: bne.n   0x1fff071c
-   0x1fff0702: ldr     r0, [r6, #0]
-   0x1fff0704: orrs    r0, r7
-   0x1fff0706: str     r0, [r6, #0]
-   0x1fff0708: ldr     r0, [r4, #4]
-   0x1fff070a: cmp     r0, #0
-   0x1fff070c: bne.n   0x1fff0718
-   0x1fff070e: ldr     r0, [pc, #544]  ; (0x1fff0930)
-   0x1fff0710: ldr     r1, [r4, #8]
-   0x1fff0712: ldr     r0, [r0, #0]
-   0x1fff0714: cmp     r1, r0
-   0x1fff0716: beq.n   0x1fff0730
-   0x1fff0718: str     r2, [r5, #0]
-   0x1fff071a: b.n     0x1fff0730
-   0x1fff071c: ldr     r1, [pc, #516]  ; (0x1fff0924)
-   0x1fff071e: ldr     r1, [r1, #0]
-   0x1fff0720: cmp     r0, r1
-   0x1fff0722: bne.n   0x1fff0736
-   0x1fff0724: ldr     r0, [r6, #0]
-   0x1fff0726: orrs    r0, r7
-   0x1fff0728: str     r0, [r6, #0]
-   0x1fff072a: ldr     r0, [r4, #4]
-   0x1fff072c: cmp     r0, #0
-   0x1fff072e: beq.n   0x1fff070e
-   0x1fff0730: ldr     r0, [r6, #0]
-   0x1fff0732: bics    r0, r7
-   0x1fff0734: str     r0, [r6, #0]
-   0x1fff0736: ldr     r0, [r5, #0]
-   0x1fff0738: cmp     r0, #0
-   0x1fff073a: bne.n   0x1fff0750
-   0x1fff073c: movs    r0, #52 ; 0x34
-   0x1fff073e: str     r0, [r4, #0]
-   0x1fff0740: ldr     r0, [pc, #496]  ; (0x1fff0934)
-   0x1fff0742: ldr     r1, [pc, #464]  ; (0x1fff0914)
-   0x1fff0744: ldr     r0, [r0, #0]
-   0x1fff0746: str     r0, [r4, #12]
-   0x1fff0748: adds    r1, #20
-   0x1fff074a: ldr     r0, [pc, #456]  ; (0x1fff0914)
-   0x1fff074c: bl      0x1fff1ff0
-   0x1fff0750: ldr     r0, [r6, #0]
-   0x1fff0752: orrs    r0, r7
-   0x1fff0754: str     r0, [r6, #0]
-   0x1fff0756: ldr     r0, [r4, #4]
-   0x1fff0758: cmp     r0, #0
-   0x1fff075a: bne.n   0x1fff0776
-   0x1fff075c: ldr     r0, [pc, #464]  ; (0x1fff0930)
-   0x1fff075e: ldr     r1, [r4, #8]
-   0x1fff0760: ldr     r0, [r0, #0]
-   0x1fff0762: cmp     r1, r0
-   0x1fff0764: bne.n   0x1fff0776
-   0x1fff0766: ldr     r0, [r6, #0]
-   0x1fff0768: bics    r0, r7
-   0x1fff076a: str     r0, [r6, #0]
-   0x1fff076c: ldr     r0, [pc, #456]  ; (0x1fff0938)
-   0x1fff076e: ldr     r0, [r0, #0]
-   0x1fff0770: ldr     r1, [r0, #0]
-   0x1fff0772: ldr     r0, [pc, #420]  ; (0x1fff0918)
-   0x1fff0774: str     r1, [r0, #0]
-   0x1fff0776: ldr     r0, [r6, #0]
-   0x1fff0778: bics    r0, r7
-   0x1fff077a: str     r0, [r6, #0]
-   0x1fff077c: ldr     r0, [pc, #396]  ; (0x1fff090c)
-   0x1fff077e: movs    r2, #15
-   0x1fff0780: ldr     r1, [r0, #4]
-   0x1fff0782: ldr     r0, [r5, #0]
-   0x1fff0784: bl      0x1fff1064
-   0x1fff0788: bl      0x1ff0d9c       setup_serial
-   0x1fff078c: pop     {r3, r4, r5, r6, r7, pc}
-
-
-
-   0x1fff078e: push    {r4, r5, r6, lr}
-   0x1fff0790: ldr     r0, [pc, #404]  ; (0x1fff0928)
-   0x1fff0792: ldr     r5, [pc, #376]  ; (0x1fff090c)
-   0x1fff0794: ldr     r1, [r0, #0]
-   0x1fff0796: ldr     r0, [r5, #4]
-   0x1fff0798: cmp     r1, #1
-   0x1fff079a: beq.n   0x1fff07b4
-   0x1fff079c: ldr     r4, [pc, #372]  ; (0x1fff0914)
-   0x1fff079e: movs    r3, #0
-   0x1fff07a0: movs    r2, #105        ; 0x69
-   0x1fff07a2: adds    r1, r4, #4
-   0x1fff07a4: bl      0x1fff10a6
-   0x1fff07a8: mov     r6, r4
-   0x1fff07aa: adds    r6, #20
-   0x1fff07ac: str     r0, [r6, #0]
-   0x1fff07ae: cmp     r0, #0
-   0x1fff07b0: beq.n   0x1fff07bc
-   0x1fff07b2: b.n     0x1fff07e0
-   0x1fff07b4: movs    r2, #15
-   0x1fff07b6: mov     r1, r0
-   0x1fff07b8: mov     r0, r2
-   0x1fff07ba: b.n     0x1fff082a
-   0x1fff07bc: ldr     r1, [pc, #340]  ; (0x1fff0914)
-   0x1fff07be: movs    r3, #0
-   0x1fff07c0: movs    r2, #105        ; 0x69
-   0x1fff07c2: adds    r1, #8
-   0x1fff07c4: ldr     r0, [r5, #8]
-   0x1fff07c6: bl      0x1fff10a6
-   0x1fff07ca: str     r0, [r6, #0]
-   0x1fff07cc: cmp     r0, #0
-   0x1fff07ce: bne.n   0x1fff07e0
-   0x1fff07d0: ldr     r1, [pc, #320]  ; (0x1fff0914)
-   0x1fff07d2: movs    r3, #0
-   0x1fff07d4: movs    r2, #105        ; 0x69
-   0x1fff07d6: adds    r1, #12
-   0x1fff07d8: ldr     r0, [r5, #12]
-   0x1fff07da: bl      0x1fff10a6
-   0x1fff07de: str     r0, [r6, #0]
-   0x1fff07e0: ldr     r0, [pc, #308]  ; (0x1fff0918)
-   0x1fff07e2: ldr     r1, [pc, #320]  ; (0x1fff0924)
-   0x1fff07e4: ldr     r0, [r0, #0]
-   0x1fff07e6: ldr     r1, [r1, #0]
-   0x1fff07e8: cmp     r0, r1
-   0x1fff07ea: bne.n   0x1fff080a
-   0x1fff07ec: ldr     r0, [pc, #316]  ; (0x1fff092c)
-   0x1fff07ee: ldr     r1, [r0, #0]
-   0x1fff07f0: movs    r2, #64 ; 0x40
-   0x1fff07f2: orrs    r1, r2
-   0x1fff07f4: str     r1, [r0, #0]
-   0x1fff07f6: ldr     r3, [pc, #324]  ; (0x1fff093c)
-   0x1fff07f8: ldr     r1, [r4, #4]
-   0x1fff07fa: ldr     r3, [r3, #0]
-   0x1fff07fc: cmp     r1, r3
-   0x1fff07fe: bcs.n   0x1fff0804
-   0x1fff0800: movs    r1, #19
-   0x1fff0802: str     r1, [r6, #0]
-   0x1fff0804: ldr     r1, [r0, #0]
-   0x1fff0806: bics    r1, r2
-   0x1fff0808: str     r1, [r0, #0]
-   0x1fff080a: ldr     r0, [r6, #0]
-   0x1fff080c: cmp     r0, #0
-   0x1fff080e: bne.n   0x1fff0824
-   0x1fff0810: movs    r0, #51 ; 0x33
-   0x1fff0812: str     r0, [r4, #0]
-   0x1fff0814: ldr     r0, [pc, #284]  ; (0x1fff0934)
-   0x1fff0816: ldr     r1, [pc, #252]  ; (0x1fff0914)
-   0x1fff0818: ldr     r0, [r0, #0]
-   0x1fff081a: str     r0, [r4, #16]
-   0x1fff081c: adds    r1, #20
-   0x1fff081e: ldr     r0, [pc, #244]  ; (0x1fff0914)
-   0x1fff0820: bl      0x1fff1ff0
-   0x1fff0824: ldr     r1, [r5, #4]
-   0x1fff0826: movs    r2, #15
-   0x1fff0828: ldr     r0, [r6, #0]
-   0x1fff082a: bl      0x1fff1064
-   0x1fff082e: bl      0x1ff0d9c       setup_serial
-   0x1fff0832: pop     {r4, r5, r6, pc}
-
-       {
-
-   0x1fff0834: push    {r4, r5, r6, lr}
-   0x1fff0836: ldr     r5, [pc, #212]  ; (0x1fff090c)
-   0x1fff0838: ldr     r6, [pc, #216]  ; (0x1fff0914)
-   0x1fff083a: movs    r3, #0
-   0x1fff083c: movs    r2, #105        ; 0x69
-   0x1fff083e: adds    r1, r6, #4
-   0x1fff0840: ldr     r0, [r5, #4]
-   0x1fff0842: bl      0x1fff10a6
-   0x1fff0846: mov     r4, r6
-   0x1fff0848: adds    r4, #20
-   0x1fff084a: str     r0, [r4, #0]
-   0x1fff084c: cmp     r0, #0
-   0x1fff084e: bne.n   0x1fff0870
-   0x1fff0850: mov     r1, r4
-   0x1fff0852: movs    r3, #0
-   0x1fff0854: movs    r2, #105        ; 0x69
-   0x1fff0856: subs    r1, #12
-   0x1fff0858: ldr     r0, [r5, #8]
-   0x1fff085a: bl      0x1fff10a6
-   0x1fff085e: str     r0, [r4, #0]
-   0x1fff0860: cmp     r0, #0
-   0x1fff0862: bne.n   0x1fff0870
-   0x1fff0864: movs    r0, #50 ; 0x32
-   0x1fff0866: str     r0, [r6, #0]
-   0x1fff0868: mov     r1, r4
-   0x1fff086a: mov     r0, r6
-   0x1fff086c: bl      0x1fff1ff0
-   0x1fff0870: ldr     r1, [r5, #4]
-   0x1fff0872: movs    r2, #15
-   0x1fff0874: ldr     r0, [r4, #0]
-   0x1fff0876: bl      0x1fff1064
-   0x1fff087a: bl      0x1ff0d9c       setup_serial
-   0x1fff087e: pop     {r4, r5, r6, pc}
-
-       }
-       {
-
-   0x1fff0880: push    {r3, r4, r5, lr}
-   0x1fff0882: ldr     r5, [pc, #136]  ; (0x1fff090c)
-   0x1fff0884: movs    r3, #0
-   0x1fff0886: movs    r2, #105        ; 0x69
-   0x1fff0888: mov     r1, sp
-   0x1fff088a: ldr     r0, [r5, #4]
-   0x1fff088c: bl      0x1fff10a6
-   0x1fff0890: uxtb    r4, r0
-   0x1fff0892: movs    r2, #15
-   0x1fff0894: mov     r0, r4
-   0x1fff0896: ldr     r1, [r5, #4]
-   0x1fff0898: bl      0x1fff1064
-   0x1fff089c: bl      0x1ff0d9c       setup_serial
-   0x1fff08a0: cmp     r4, #0
-   0x1fff08a2: bne.n   0x1fff08b0
-   0x1fff08a4: ldr     r0, [sp, #0]
-   0x1fff08a6: cmp     r0, #0
-   0x1fff08a8: beq.n   0x1fff08ac
-   0x1fff08aa: movs    r0, #1
-   0x1fff08ac: bl      0x1fff0e54
-   0x1fff08b0: pop     {r3, r4, r5, pc}
-
-       }
-       {
-
-   0x1fff08b2: push    {r2, r3, r4, r5, r6, lr}
-   0x1fff08b4: ldr     r5, [pc, #84]   ; (0x1fff090c)  100000f8
-   0x1fff08b6: movs    r3, #0
-   0x1fff08b8: movs    r2, #105        ; 0x69
-   0x1fff08ba: add     r1, sp, #4
-   0x1fff08bc: ldr     r0, [r5, #4]
-   0x1fff08be: bl      0x1fff10a6
-   0x1fff08c2: movs    r3, #0
-   0x1fff08c4: movs    r2, #105        ; 0x69
-   0x1fff08c6: mov     r1, sp
-   0x1fff08c8: ldr     r0, [r5, #8]
-   0x1fff08ca: bl      0x1fff10a6
-   0x1fff08ce: lsls    r4, r0, #24
-   0x1fff08d0: lsrs    r4, r4, #24
-   0x1fff08d2: bne.n   0x1fff0942
-   0x1fff08d4: movs    r0, #75 ; 0x4b
-   0x1fff08d6: ldr     r1, [sp, #4]
-   0x1fff08d8: lsls    r0, r0, #7
-   0x1fff08da: cmp     r1, r0
-   0x1fff08dc: beq.n   0x1fff0900
-   0x1fff08de: lsls    r0, r0, #1
-   0x1fff08e0: cmp     r1, r0
-   0x1fff08e2: beq.n   0x1fff0900
-   0x1fff08e4: lsls    r0, r0, #1
-   0x1fff08e6: cmp     r1, r0
-   0x1fff08e8: beq.n   0x1fff0900
-   0x1fff08ea: movs    r0, #225        ; 0xe1
-   0x1fff08ec: lsls    r0, r0, #8
-   0x1fff08ee: cmp     r1, r0
-   0x1fff08f0: beq.n   0x1fff0900
-   0x1fff08f2: lsls    r0, r0, #1
-   0x1fff08f4: cmp     r1, r0
-   0x1fff08f6: beq.n   0x1fff0900
-   0x1fff08f8: lsls    r0, r0, #1
-   0x1fff08fa: cmp     r1, r0
-   0x1fff08fc: beq.n   0x1fff0900
-   0x1fff08fe: movs    r4, #17
-   0x1fff0900: ldr     r0, [sp, #0]
-   0x1fff0902: cmp     r0, #1
-   0x1fff0904: beq.n   0x1fff0942
-   0x1fff0906: cmp     r0, #2
-   0x1fff0908: beq.n   0x1fff0942
-   0x1fff090a: b.n     0x1fff0940
-
-       }
-
-0x1fff0900:    0x28019800      0x2802d01d      0xe019d01b      0x100000f8
-0x1fff0910:    0x50002100      0x1000010c      0x10000058      0x1fff00cc
-0x1fff0920:    0x1fff00d0      0x1fff00d4      0x10000054      0x4003c000
-0x1fff0930:    0x00000440      0x10000050      0x1fff00c8      0x00000520
-0x1fff0940:    0x220f2412      0x68694620      0xfb8cf000      0xfa26f000
-
-   0x1fff090c: lsls    r0, r7, #3
-   0x1fff090e: asrs    r0, r0, #32
-   0x1fff0910: movs    r1, #0
-   0x1fff0912: str     r0, [r0, r0]
-   0x1fff0914: lsls    r4, r1, #4
-   0x1fff0916: asrs    r0, r0, #32
-   0x1fff0918: lsls    r0, r3, #1
-   0x1fff091a: asrs    r0, r0, #32
-   0x1fff091c: lsls    r4, r1, #3
-   0x1fff091e: subs    r7, r7, #7
-   0x1fff0920: lsls    r0, r2, #3
-   0x1fff0922: subs    r7, r7, #7
-   0x1fff0924: lsls    r4, r2, #3
-   0x1fff0926: subs    r7, r7, #7
-   0x1fff0928: lsls    r4, r2, #1
-   0x1fff092a: asrs    r0, r0, #32
-   0x1fff092c: stmia   r0!, {}
-   0x1fff092e: ands    r3, r0
-   0x1fff0930: lsls    r0, r0, #17
-   0x1fff0932: movs    r0, r0
-   0x1fff0934: lsls    r0, r2, #1
-   0x1fff0936: asrs    r0, r0, #32
-   0x1fff0938: lsls    r0, r1, #3
-   0x1fff093a: subs    r7, r7, #7
-   0x1fff093c: lsls    r0, r4, #20
-   0x1fff093e: movs    r0, r0
-
-   0x1fff0940: movs    r4, #18
-   0x1fff0942: movs    r2, #15
-   0x1fff0944: mov     r0, r4
-   0x1fff0946: ldr     r1, [r5, #4]
-   0x1fff0948: bl      0x1fff1064
-   0x1fff094c: bl      0x1ff0d9c       setup_serial
-   0x1fff0950: cmp     r4, #0
-   0x1fff0952: bne.n   0x1fff0960
-   0x1fff0954: ldr     r0, [pc, #920]  ; (0x1fff0cf0)
-   0x1fff0956: ldr     r1, [sp, #0]
-   0x1fff0958: ldr     r2, [r0, #0]
-   0x1fff095a: ldr     r0, [sp, #4]
-   0x1fff095c: bl      0x1fff0d28
-   0x1fff0960: pop     {r2, r3, r4, r5, r6, pc}
-
-
-
-   0x1fff0962: push    {r3, r4, r5, lr}
-   0x1fff0964: ldr     r4, [pc, #908]  ; (0x1fff0cf4)
-   0x1fff0966: movs    r3, #0
-   0x1fff0968: movs    r2, #105        ; 0x69
-   0x1fff096a: mov     r1, sp
-   0x1fff096c: ldr     r0, [r4, #4]
-   0x1fff096e: bl      0x1fff10a6
-   0x1fff0972: lsls    r0, r0, #24
-   0x1fff0974: lsrs    r0, r0, #24
-   0x1fff0976: bne.n   0x1fff098a
-   0x1fff0978: ldr     r2, [pc, #892]  ; (0x1fff0cf8)
-   0x1fff097a: ldr     r1, [sp, #0]
-   0x1fff097c: cmp     r1, r2
-   0x1fff097e: bne.n   0x1fff0988
-   0x1fff0980: ldr     r2, [pc, #888]  ; (0x1fff0cfc)
-   0x1fff0982: movs    r1, #0
-   0x1fff0984: str     r1, [r2, #0]
-   0x1fff0986: b.n     0x1fff098a
-   0x1fff0988: movs    r0, #16
-   0x1fff098a: movs    r2, #15
-   0x1fff098c: ldr     r1, [r4, #4]
-   0x1fff098e: bl      0x1fff1064
-   0x1fff0992: bl      0x1ff0d9c       setup_serial
-   0x1fff0996: pop     {r3, r4, r5, pc}
-
-
-
-   0x1fff0998: push    {r3, r4, r5, lr}
-   0x1fff099a: ldr     r0, [pc, #864]  ; (0x1fff0cfc)
-   0x1fff099c: ldr     r5, [pc, #852]  ; (0x1fff0cf4)
-   0x1fff099e: ldr     r0, [r0, #0]
-   0x1fff09a0: cmp     r0, #0
-   0x1fff09a2: beq.n   0x1fff09a8
-   0x1fff09a4: movs    r4, #15
-   0x1fff09a6: b.n     0x1fff09dc
-   0x1fff09a8: movs    r4, #0
-   0x1fff09aa: ldr     r0, [pc, #852]  ; (0x1fff0d00)
-   0x1fff09ac: ldr     r1, [r5, #4]
-   0x1fff09ae: bl      0x1fff0fb8
-   0x1fff09b2: cmp     r0, #0
-   0x1fff09b4: beq.n   0x1fff09ca
-   0x1fff09b6: movs    r3, #0
-   0x1fff09b8: movs    r2, #102        ; 0x66
-   0x1fff09ba: mov     r1, sp
-   0x1fff09bc: ldr     r0, [r5, #4]
-   0x1fff09be: bl      0x1fff10a6
-   0x1fff09c2: lsls    r4, r0, #24
-   0x1fff09c4: lsrs    r4, r4, #24
-   0x1fff09c6: beq.n   0x1fff09ce
-   0x1fff09c8: b.n     0x1fff09dc
-   0x1fff09ca: ldr     r0, [pc, #824]  ; (0x1fff0d04)
-   0x1fff09cc: str     r0, [sp, #0]
-   0x1fff09ce: ldr     r0, [r5, #8]
-   0x1fff09d0: ldrb    r0, [r0, #0]
-   0x1fff09d2: cmp     r0, #84 ; 0x54
-   0x1fff09d4: beq.n   0x1fff09f4
-   0x1fff09d6: cmp     r0, #65 ; 0x41
-   0x1fff09d8: beq.n   0x1fff09dc
-   0x1fff09da: movs    r4, #12
-   0x1fff09dc: movs    r2, #15
-   0x1fff09de: mov     r0, r4
-   0x1fff09e0: ldr     r1, [r5, #4]
-   0x1fff09e2: bl      0x1fff1064
-   0x1fff09e6: bl      0x1ff0d9c       setup_serial
-   0x1fff09ea: cmp     r4, #0
-   0x1fff09ec: bne.n   0x1fff09f2
-   0x1fff09ee: ldr     r0, [sp, #0]
-   0x1fff09f0: blx     r0
-   0x1fff09f2: pop     {r3, r4, r5, pc}
-   0x1fff09f4: ldr     r0, [sp, #0]
-   0x1fff09f6: movs    r1, #1
-   0x1fff09f8: orrs    r0, r1
-   0x1fff09fa: str     r0, [sp, #0]
-   0x1fff09fc: b.n     0x1fff09dc
-
-
-
-   0x1fff09fe: push    {r4, r5, r6, r7, lr}
-   0x1fff0a00: ldr     r5, [pc, #752]  ; (0x1fff0cf4)
-   0x1fff0a02: sub     sp, #20
-   0x1fff0a04: movs    r3, #0
-   0x1fff0a06: movs    r2, #100        ; 0x64
-   0x1fff0a08: add     r1, sp, #4
-   0x1fff0a0a: ldr     r0, [r5, #8]
-   0x1fff0a0c: bl      0x1fff10a6
-   0x1fff0a10: lsls    r4, r0, #24
-   0x1fff0a12: lsrs    r4, r4, #24
-   0x1fff0a14: bne.n   0x1fff0a24
-   0x1fff0a16: ldr     r0, [r5, #4]
-   0x1fff0a18: movs    r2, #102        ; 0x66
-   0x1fff0a1a: add     r1, sp, #8
-   0x1fff0a1c: ldr     r3, [sp, #4]
-   0x1fff0a1e: bl      0x1fff10a6
-   0x1fff0a22: uxtb    r4, r0
-   0x1fff0a24: movs    r2, #15
-   0x1fff0a26: mov     r0, r4
-   0x1fff0a28: ldr     r1, [r5, #0]
-   0x1fff0a2a: bl      0x1fff1064
-   0x1fff0a2e: bl      0x1ff0d9c       setup_serial
-   0x1fff0a32: cmp     r4, #0
-   0x1fff0a34: bne.n   0x1fff0abe
-   0x1fff0a36: movs    r1, #1
-   0x1fff0a38: ldr     r0, [sp, #8]
-   0x1fff0a3a: lsls    r1, r1, #15
-   0x1fff0a3c: cmp     r0, r1
-   0x1fff0a3e: bcs.n   0x1fff0a44
-   0x1fff0a40: adds    r0, r0, r1
-   0x1fff0a42: str     r0, [sp, #8]
-   0x1fff0a44: mov     r7, r0
-   0x1fff0a46: movs    r6, #0
-   0x1fff0a48: ldr     r0, [sp, #4]
-   0x1fff0a4a: mov     r4, r6
-   0x1fff0a4c: str     r0, [sp, #12]
-   0x1fff0a4e: b.n     0x1fff0ab8
-   0x1fff0a50: cmp     r5, #45 ; 0x2d
-   0x1fff0a52: ble.n   0x1fff0a56
-   0x1fff0a54: movs    r5, #45 ; 0x2d
-   0x1fff0a56: mov     r2, r5
-   0x1fff0a58: ldr     r1, [pc, #684]  ; (0x1fff0d08)
-   0x1fff0a5a: ldr     r0, [sp, #8]
-   0x1fff0a5c: bl      0x1fff0e76
-   0x1fff0a60: adds    r6, r0, r6
-   0x1fff0a62: ldr     r0, [pc, #676]  ; (0x1fff0d08)
-   0x1fff0a64: bl      0x1ff0d9c       setup_serial
-   0x1fff0a68: cmp     r0, #0
-   0x1fff0a6a: bne.n   0x1fff0abe
-   0x1fff0a6c: ldr     r0, [sp, #8]
-   0x1fff0a6e: adds    r4, r4, #1
-   0x1fff0a70: adds    r0, r0, r5
-   0x1fff0a72: str     r0, [sp, #8]
-   0x1fff0a74: ldr     r0, [sp, #4]
-   0x1fff0a76: subs    r0, r0, r5
-   0x1fff0a78: str     r0, [sp, #4]
-   0x1fff0a7a: cmp     r4, #20
-   0x1fff0a7c: beq.n   0x1fff0a82
-   0x1fff0a7e: cmp     r0, #0
-   0x1fff0a80: bne.n   0x1fff0ab8
-   0x1fff0a82: movs    r2, #15
-   0x1fff0a84: ldr     r1, [pc, #640]  ; (0x1fff0d08)
-   0x1fff0a86: mov     r0, r6
-   0x1fff0a88: bl      0x1fff1064
-   0x1fff0a8c: bl      0x1ff0d9c       setup_serial
-   0x1fff0a90: movs    r2, #0
-   0x1fff0a92: movs    r1, #70 ; 0x46
-   0x1fff0a94: ldr     r0, [pc, #624]  ; (0x1fff0d08)
-   0x1fff0a96: bl      0x1fff0e04
-   0x1fff0a9a: lsls    r0, r0, #24
-   0x1fff0a9c: lsrs    r0, r0, #24
-   0x1fff0a9e: bne.n   0x1fff0abe
-   0x1fff0aa0: ldr     r1, [pc, #604]  ; (0x1fff0d00)
-   0x1fff0aa2: ldr     r0, [pc, #612]  ; (0x1fff0d08)
-   0x1fff0aa4: subs    r1, r1, #3
-   0x1fff0aa6: bl      0x1fff0fb8
-   0x1fff0aaa: cmp     r0, #0
-   0x1fff0aac: beq.n   0x1fff0ac2
-   0x1fff0aae: ldr     r0, [sp, #12]
-   0x1fff0ab0: str     r7, [sp, #8]
-   0x1fff0ab2: str     r0, [sp, #4]
-   0x1fff0ab4: movs    r4, #0
-   0x1fff0ab6: mov     r6, r4
-   0x1fff0ab8: ldr     r5, [sp, #4]
-   0x1fff0aba: cmp     r5, #0
-   0x1fff0abc: bgt.n   0x1fff0a50
-   0x1fff0abe: add     sp, #20
-   0x1fff0ac0: pop     {r4, r5, r6, r7, pc}
-   0x1fff0ac2: ldr     r0, [sp, #4]
-   0x1fff0ac4: str     r0, [sp, #12]
-   0x1fff0ac6: ldr     r7, [sp, #8]
-   0x1fff0ac8: b.n     0x1fff0ab4
-
-
-
-   0x1fff0aca: push    {r4, r5, r6, r7, lr}
-   0x1fff0acc: sub     sp, #20
-   0x1fff0ace: ldr     r5, [pc, #548]  ; (0x1fff0cf4)
-   0x1fff0ad0: movs    r2, #100        ; 0x64
-   0x1fff0ad2: ldr     r0, [r5, #8]
-   0x1fff0ad4: add     r1, sp, #4
-   0x1fff0ad6: ldr     r3, [sp, #4]
-   0x1fff0ad8: bl      0x1fff10a6
-   0x1fff0adc: lsls    r4, r0, #24
-   0x1fff0ade: lsrs    r4, r4, #24
-   0x1fff0ae0: bne.n   0x1fff0b00
-   0x1fff0ae2: ldr     r0, [r5, #4]
-   0x1fff0ae4: movs    r2, #103        ; 0x67
-   0x1fff0ae6: add     r1, sp, #8
-   0x1fff0ae8: ldr     r3, [sp, #4]
-   0x1fff0aea: bl      0x1fff10a6
-   0x1fff0aee: uxtb    r4, r0
-   0x1fff0af0: cmp     r4, #4
-   0x1fff0af2: beq.n   0x1fff0afa
-   0x1fff0af4: cmp     r4, #2
-   0x1fff0af6: beq.n   0x1fff0afe
-   0x1fff0af8: b.n     0x1fff0b00
-   0x1fff0afa: movs    r4, #14
-   0x1fff0afc: b.n     0x1fff0b00
-   0x1fff0afe: movs    r4, #13
-   0x1fff0b00: ldr     r0, [pc, #520]  ; (0x1fff0d0c)
-   0x1fff0b02: ldr     r1, [r0, #0]
-   0x1fff0b04: movs    r2, #64 ; 0x40
-   0x1fff0b06: orrs    r1, r2
-   0x1fff0b08: str     r1, [r0, #0]
-   0x1fff0b0a: ldr     r1, [pc, #516]  ; (0x1fff0d10)
-   0x1fff0b0c: ldr     r3, [pc, #516]  ; (0x1fff0d14)
-   0x1fff0b0e: ldr     r1, [r1, #0]
-   0x1fff0b10: ldr     r3, [r3, #0]
-   0x1fff0b12: cmp     r1, r3
-   0x1fff0b14: bne.n   0x1fff0b28
-   0x1fff0b16: ldr     r1, [pc, #512]  ; (0x1fff0d18)
-   0x1fff0b18: ldr     r3, [sp, #8]
-   0x1fff0b1a: ldr     r1, [r1, #0]
-   0x1fff0b1c: adds    r1, #255        ; 0xff
-   0x1fff0b1e: adds    r1, #255        ; 0xff
-   0x1fff0b20: adds    r1, #2
-   0x1fff0b22: cmp     r3, r1
-   0x1fff0b24: bcs.n   0x1fff0b28
-   0x1fff0b26: movs    r4, #19
-   0x1fff0b28: ldr     r1, [r0, #0]
-   0x1fff0b2a: bics    r1, r2
-   0x1fff0b2c: str     r1, [r0, #0]
-   0x1fff0b2e: movs    r2, #15
-   0x1fff0b30: mov     r0, r4
-   0x1fff0b32: ldr     r1, [r5, #0]
-   0x1fff0b34: bl      0x1fff1064
-   0x1fff0b38: bl      0x1ff0d9c       setup_serial
-   0x1fff0b3c: cmp     r4, #0
-   0x1fff0b3e: bne.n   0x1fff0abe
-   0x1fff0b40: mov     r5, r4
-   0x1fff0b42: ldr     r7, [sp, #4]
-   0x1fff0b44: ldr     r6, [sp, #8]
-   0x1fff0b46: b.n     0x1fff0bc4
-   0x1fff0b48: mov     r2, sp
-   0x1fff0b4a: movs    r1, #70 ; 0x46
-   0x1fff0b4c: ldr     r0, [pc, #440]  ; (0x1fff0d08)
-   0x1fff0b4e: bl      0x1fff0e04
-   0x1fff0b52: cmp     r0, #0
-   0x1fff0b54: bne.n   0x1fff0abe
-   0x1fff0b56: ldr     r0, [sp, #0]
-   0x1fff0b58: cmp     r0, #0
-   0x1fff0b5a: beq.n   0x1fff0b78
-   0x1fff0b5c: adds    r5, r5, #1
-   0x1fff0b5e: add     r2, sp, #12
-   0x1fff0b60: ldr     r0, [pc, #420]  ; (0x1fff0d08)
-   0x1fff0b62: ldr     r1, [sp, #8]
-   0x1fff0b64: bl      0x1fff0f00
-   0x1fff0b68: adds    r4, r0, r4
-   0x1fff0b6a: ldr     r1, [sp, #8]
-   0x1fff0b6c: ldr     r0, [sp, #12]
-   0x1fff0b6e: adds    r1, r1, r0
-   0x1fff0b70: str     r1, [sp, #8]
-   0x1fff0b72: ldr     r1, [sp, #4]
-   0x1fff0b74: subs    r0, r1, r0
-   0x1fff0b76: str     r0, [sp, #4]
-   0x1fff0b78: cmp     r5, #20
-   0x1fff0b7a: beq.n   0x1fff0b82
-   0x1fff0b7c: ldr     r0, [sp, #4]
-   0x1fff0b7e: cmp     r0, #0
-   0x1fff0b80: bne.n   0x1fff0bc4
-   0x1fff0b82: movs    r0, #0
-   0x1fff0b84: str     r0, [sp, #0]
-   0x1fff0b86: mov     r2, sp
-   0x1fff0b88: movs    r1, #70 ; 0x46
-   0x1fff0b8a: ldr     r0, [pc, #380]  ; (0x1fff0d08)
-   0x1fff0b8c: bl      0x1fff0e04
-   0x1fff0b90: ldr     r1, [sp, #0]
-   0x1fff0b92: uxtb    r0, r0
-   0x1fff0b94: cmp     r1, #0
-   0x1fff0b96: beq.n   0x1fff0b86
-   0x1fff0b98: cmp     r0, #0
-   0x1fff0b9a: bne.n   0x1fff0abe
-   0x1fff0b9c: add     r1, sp, #16
-   0x1fff0b9e: ldr     r0, [pc, #360]  ; (0x1fff0d08)
-   0x1fff0ba0: bl      0x1fff103a
-   0x1fff0ba4: ldr     r0, [sp, #16]
-   0x1fff0ba6: cmp     r4, r0
-   0x1fff0ba8: bne.n   0x1fff0bb4
-   0x1fff0baa: ldr     r0, [pc, #340]  ; (0x1fff0d00)
-   0x1fff0bac: ldr     r7, [sp, #4]
-   0x1fff0bae: subs    r0, r0, #3
-   0x1fff0bb0: ldr     r6, [sp, #8]
-   0x1fff0bb2: b.n     0x1fff0bbc
-   0x1fff0bb4: ldr     r0, [pc, #328]  ; (0x1fff0d00)
-   0x1fff0bb6: str     r7, [sp, #4]
-   0x1fff0bb8: adds    r0, r0, #5
-   0x1fff0bba: str     r6, [sp, #8]
-   0x1fff0bbc: bl      0x1ff0d9c       setup_serial
-   0x1fff0bc0: movs    r5, #0
-   0x1fff0bc2: mov     r4, r5
-   0x1fff0bc4: ldr     r0, [sp, #4]
-   0x1fff0bc6: cmp     r0, #0
-   0x1fff0bc8: bgt.n   0x1fff0b48
-   0x1fff0bca: b.n     0x1fff0abe
-
-
-
-   0x1fff0bcc: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff0bce: ldr     r4, [pc, #292]  ; (0x1fff0cf4)
-   0x1fff0bd0: ldr     r5, [pc, #312]  ; (0x1fff0d0c)
-   0x1fff0bd2: ldr     r0, [r4, #0]
-   0x1fff0bd4: movs    r6, #64 ; 0x40
-   0x1fff0bd6: ldrb    r3, [r0, #0]
-   0x1fff0bd8: mov     r0, r4
-   0x1fff0bda: subs    r3, #65 ; 0x41
-   0x1fff0bdc: ldr     r1, [r0, #4]
-   0x1fff0bde: bl      0x1fff19b0
-   0x1fff0be2: adds    r7, r2, #0
-   0x1fff0be4: strb    r1, [r3, #20]
-   0x1fff0be6: ldrb    r4, [r0, #2]
-   0x1fff0be8: asrs    r4, r0, #14
-   0x1fff0bea: ldrb    r4, [r0, #14]
-   0x1fff0bec: strb    r7, [r3, r0]
-   0x1fff0bee: ldrb    r4, [r0, #26]
-   0x1fff0bf0: strh    r1, [r5, #32]
-   0x1fff0bf2: strh    r2, [r6, #34]   ; 0x22
-   0x1fff0bf4: strh    r0, [r2, #32]
-   0x1fff0bf6: asrs    r1, r0, #26
-   0x1fff0bf8: lsrs    r4, r0, #22
-   0x1fff0bfa: lsls    r4, r0, #2
-   0x1fff0bfc: bl      0x1fff0aca
-   0x1fff0c00: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c02: bl      0x1fff09fe
-   0x1fff0c06: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c08: bl      0x1fff0998
-   0x1fff0c0c: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c0e: bl      0x1fff0962
-   0x1fff0c12: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c14: bl      0x1fff08b2
-   0x1fff0c18: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c1a: bl      0x1fff0880
-   0x1fff0c1e: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c20: movs    r2, #15
-   0x1fff0c22: movs    r0, #0
-   0x1fff0c24: bl      0x1fff1064
-   0x1fff0c28: bl      0x1ff0d9c       setup_serial
-   0x1fff0c2c: ldr     r0, [pc, #236]  ; (0x1fff0d1c)
-   0x1fff0c2e: ldr     r1, [r4, #4]
-   0x1fff0c30: ldr     r0, [r0, #52]   ; 0x34
-   0x1fff0c32: b.n     0x1fff0cba
-   0x1fff0c34: ldr     r0, [r5, #0]
-   0x1fff0c36: orrs    r0, r6
-   0x1fff0c38: str     r0, [r5, #0]
-   0x1fff0c3a: ldr     r0, [pc, #228]  ; (0x1fff0d20)
-   0x1fff0c3c: movs    r2, #15
-   0x1fff0c3e: ldr     r7, [r0, #0]
-   0x1fff0c40: movs    r0, #0
-   0x1fff0c42: bl      0x1fff1064
-   0x1fff0c46: bl      0x1ff0d9c       setup_serial
-   0x1fff0c4a: ldr     r1, [r4, #4]
-   0x1fff0c4c: movs    r2, #15
-   0x1fff0c4e: ldr     r0, [r7, #0]
-   0x1fff0c50: bl      0x1fff1064
-   0x1fff0c54: bl      0x1ff0d9c       setup_serial
-   0x1fff0c58: ldr     r1, [r4, #4]
-   0x1fff0c5a: movs    r2, #15
-   0x1fff0c5c: ldr     r0, [r7, #4]
-   0x1fff0c5e: bl      0x1fff1064
-   0x1fff0c62: bl      0x1ff0d9c       setup_serial
-   0x1fff0c66: ldr     r1, [r4, #4]
-   0x1fff0c68: movs    r2, #15
-   0x1fff0c6a: ldr     r0, [r7, #8]
-   0x1fff0c6c: bl      0x1fff1064
-   0x1fff0c70: bl      0x1ff0d9c       setup_serial
-   0x1fff0c74: ldr     r1, [r4, #4]
-   0x1fff0c76: movs    r2, #15
-   0x1fff0c78: ldr     r0, [r7, #12]
-   0x1fff0c7a: bl      0x1fff1064
-   0x1fff0c7e: bl      0x1ff0d9c       setup_serial
-   0x1fff0c82: ldr     r0, [r5, #0]
-   0x1fff0c84: bics    r0, r6
-   0x1fff0c86: str     r0, [r5, #0]
-   0x1fff0c88: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0c8a: ldr     r0, [r5, #0]
-   0x1fff0c8c: orrs    r0, r6
-   0x1fff0c8e: str     r0, [r5, #0]
-   0x1fff0c90: ldr     r0, [pc, #144]  ; (0x1fff0d24)
-   0x1fff0c92: ldr     r7, [r0, #0]
-   0x1fff0c94: ldr     r0, [r5, #0]
-   0x1fff0c96: bics    r0, r6
-   0x1fff0c98: str     r0, [r5, #0]
-   0x1fff0c9a: movs    r2, #15
-   0x1fff0c9c: movs    r0, #0
-   0x1fff0c9e: bl      0x1fff1064
-   0x1fff0ca2: bl      0x1ff0d9c       setup_serial
-   0x1fff0ca6: uxtb    r0, r7
-   0x1fff0ca8: movs    r2, #15
-   0x1fff0caa: ldr     r1, [r4, #4]
-   0x1fff0cac: bl      0x1fff1064
-   0x1fff0cb0: bl      0x1ff0d9c       setup_serial
-   0x1fff0cb4: lsls    r0, r7, #16
-   0x1fff0cb6: ldr     r1, [r4, #4]
-   0x1fff0cb8: lsrs    r0, r0, #24
-   0x1fff0cba: movs    r2, #15
-   0x1fff0cbc: bl      0x1fff1064
-   0x1fff0cc0: bl      0x1ff0d9c       setup_serial
-   0x1fff0cc4: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0cc6: bl      0x1fff0834
-   0x1fff0cca: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0ccc: bl      0x1fff078e
-   0x1fff0cd0: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0cd2: bl      0x1fff06a8
-   0x1fff0cd6: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0cd8: bl      0x1fff0618
-   0x1fff0cdc: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0cde: bl      0x1fff05a4
-   0x1fff0ce2: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0ce4: bl      0x1fff050c
-   0x1fff0ce8: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff0cea: movs    r2, #15
-   0x1fff0cec: movs    r0, #1
-   0x1fff0cee: b.n     0x1fff0cbc
-   0x1fff0cf0: lsls    r0, r2, #1
-   0x1fff0cf2: asrs    r0, r0, #32
-   0x1fff0cf4: lsls    r0, r7, #3
-   0x1fff0cf6: asrs    r0, r0, #32
-   0x1fff0cf8: ldrh    r2, [r3, r1]
-   0x1fff0cfa: movs    r0, r0
-   0x1fff0cfc: lsls    r4, r2, #1
-   0x1fff0cfe: asrs    r0, r0, #32
-   0x1fff0d00: subs    r7, r4, #4
-   0x1fff0d02: subs    r7, r7, #7
-   0x1fff0d04: lsls    r0, r6, #17
-   0x1fff0d06: movs    r0, r0
-   0x1fff0d08: lsls    r0, r4, #1
-   0x1fff0d0a: asrs    r0, r0, #32
-   0x1fff0d0c: stmia   r0!, {}
-   0x1fff0d0e: ands    r3, r0
-   0x1fff0d10: lsls    r0, r3, #1
-   0x1fff0d12: asrs    r0, r0, #32
-   0x1fff0d14: lsls    r4, r2, #3
-   0x1fff0d16: subs    r7, r7, #7
-   0x1fff0d18: lsls    r0, r7, #16
-   0x1fff0d1a: movs    r0, r0
-   0x1fff0d1c: strh    r0, [r0, #30]
-   0x1fff0d1e: ands    r4, r0
-   0x1fff0d20: lsls    r4, r3, #23
-   0x1fff0d22: movs    r0, r0
-   0x1fff0d24: lsls    r4, r6, #16
-   0x1fff0d26: movs    r0, r0
-
-
-
-   0x1fff0d28: push    {r4, lr}
-   0x1fff0d2a: mov     r4, r1
-   0x1fff0d2c: cmp     r2, #0
-   0x1fff0d2e: beq.n   0x1fff0d44
-   0x1fff0d30: movs    r1, #26
-   0x1fff0d32: muls    r1, r0
-   0x1fff0d34: movs    r0, #125        ; 0x7d
-   0x1fff0d36: lsls    r0, r0, #3
-   0x1fff0d38: muls    r0, r2
-   0x1fff0d3a: bl      0x1fff11d4
-   0x1fff0d3e: cmp     r4, #1
-   0x1fff0d40: beq.n   0x1fff0d62
-   0x1fff0d42: movs    r4, #7
-   0x1fff0d44: ldr     r1, [pc, #276]  ; (0x1fff0e5c)
-   0x1fff0d46: ldr     r2, [r1, #20]
-   0x1fff0d48: lsls    r2, r2, #25
-   0x1fff0d4a: bpl.n   0x1fff0d46
-   0x1fff0d4c: movs    r2, #128        ; 0x80
-   0x1fff0d4e: str     r2, [r1, #12]
-   0x1fff0d50: str     r0, [r1, #0]
-   0x1fff0d52: asrs    r0, r0, #8
-   0x1fff0d54: str     r0, [r1, #4]
-   0x1fff0d56: movs    r0, #0
-   0x1fff0d58: str     r0, [r1, #12]
-   0x1fff0d5a: movs    r0, #1
-   0x1fff0d5c: str     r0, [r1, #8]
-   0x1fff0d5e: str     r4, [r1, #12]
-   0x1fff0d60: pop     {r4, pc}
-   0x1fff0d62: movs    r4, #3
-   0x1fff0d64: b.n     0x1fff0d44
-
-       serial_wait_autobaud()
-       {
-
-   0x1fff0d66: ldr     r1, [pc, #244]  ; (0x1fff0e5c)  40008000
-   0x1fff0d68: ldr     r2, [r1, #20]                   40008020        ACR (autobaud control register)
-   0x1fff0d6a: lsls    r2, r2, #26
-   0x1fff0d6c: bpl.n   0x1fff0d68
-   0x1fff0d6e: str     r0, [r1, #0]
-   0x1fff0d70: bx      lr
-
-       }
-
-   0x1fff0d72: ldr     r1, [pc, #232]  ; (0x1fff0e5c)
-   0x1fff0d74: ldr     r0, [r1, #20]
-   0x1fff0d76: lsls    r0, r0, #31
-   0x1fff0d78: beq.n   0x1fff0d74
-   0x1fff0d7a: ldr     r0, [r1, #0]
-   0x1fff0d7c: ldr     r2, [pc, #224]  ; (0x1fff0e60)
-   0x1fff0d7e: uxtb    r0, r0
-   0x1fff0d80: ldr     r2, [r2, #0]
-   0x1fff0d82: cmp     r2, #0
-   0x1fff0d84: beq.n   0x1fff0d8e
-   0x1fff0d86: ldr     r2, [r1, #20]
-   0x1fff0d88: lsls    r2, r2, #26
-   0x1fff0d8a: bpl.n   0x1fff0d86
-   0x1fff0d8c: str     r0, [r1, #0]
-   0x1fff0d8e: bx      lr
-
-
-
-   0x1fff0d90: push    {lr}
-   0x1fff0d92: bl      0x1fff0d72
-   0x1fff0d96: cmp     r0, #17
-   0x1fff0d98: bne.n   0x1fff0d92
-   0x1fff0d9a: pop     {pc}
-
-       /*
-        * Detect baud rate on the USART and configure
-        */
-
-       setup_serial()
-       {
-
-   0x1fff0d9c: push    {r4, lr}
-   0x1fff0d9e: ldr     r4, [pc, #188]  ; (0x1fff0e5c)  40008000        USART
-   0x1fff0da0: movs    r3, r0
-   0x1fff0da2: bne.n   0x1fff0dcc
-   0x1fff0da4: b.n     0x1fff0dd2
-   0x1fff0da6: adds    r3, r3, #1
-   0x1fff0da8: bl      0x1fff0d66
-   0x1fff0dac: ldr     r0, [r4, #20]                   40008020        ACR (autobaud control)
-   0x1fff0dae: lsls    r0, r0, #31
-   0x1fff0db0: beq.n   0x1fff0dcc
-
-
-   0x1fff0db2: ldr     r0, [r4, #0]
-   0x1fff0db4: uxtb    r0, r0
-   0x1fff0db6: cmp     r0, #27
-   0x1fff0db8: beq.n   0x1fff0dc0
-   0x1fff0dba: cmp     r0, #19
-   0x1fff0dbc: bne.n   0x1fff0dcc
-   0x1fff0dbe: b.n     0x1fff0dc4
-
-               return 1;
-
-   0x1fff0dc0: movs    r0, #1
-   0x1fff0dc2: pop     {r4, pc}
-
-   0x1fff0dc4: bl      0x1fff0d72
-   0x1fff0dc8: cmp     r0, #17
-   0x1fff0dca: bne.n   0x1fff0dc4
-
-   0x1fff0dcc: ldrb    r0, [r3, #0]
-   0x1fff0dce: cmp     r0, #0
-   0x1fff0dd0: bne.n   0x1fff0da6
-   0x1fff0dd2: movs    r0, #13
-   0x1fff0dd4: bl      0x1fff0d66
-   0x1fff0dd8: movs    r0, #10
-   0x1fff0dda: bl      0x1fff0d66
-   0x1fff0dde: movs    r0, #0
-   0x1fff0de0: pop     {r4, pc}
-   0x1fff0de2: ldr     r0, [pc, #120]  ; (0x1fff0e5c)
-   0x1fff0de4: ldr     r1, [r0, #20]
-   0x1fff0de6: lsls    r1, r1, #31
-   0x1fff0de8: beq.n   0x1fff0df0
-   0x1fff0dea: ldr     r0, [r0, #0]
-   0x1fff0dec: movs    r0, #1
-   0x1fff0dee: bx      lr
-   0x1fff0df0: movs    r0, #0
-   0x1fff0df2: bx      lr
-   0x1fff0df4: ldr     r0, [pc, #108]  ; (0x1fff0e64)
-   0x1fff0df6: ldr     r0, [r0, #8]
-   0x1fff0df8: lsrs    r0, r0, #2
-   0x1fff0dfa: b.n     0x1fff0dfe
-   0x1fff0dfc: subs    r0, r0, #1
-   0x1fff0dfe: cmp     r0, #0
-   0x1fff0e00: bne.n   0x1fff0dfc
-   0x1fff0e02: bx      lr
-
-       }
-
-   0x1fff0e04: push    {r4, r5, r6, lr}
-   0x1fff0e06: mov     r5, r0
-   0x1fff0e08: mov     r6, r2
-   0x1fff0e0a: movs    r3, #0
-   0x1fff0e0c: subs    r4, r1, #1
-   0x1fff0e0e: bl      0x1fff0d72
-   0x1fff0e12: cmp     r0, #27
-   0x1fff0e14: beq.n   0x1fff0e4a
-   0x1fff0e16: cmp     r0, #13
-   0x1fff0e18: beq.n   0x1fff0e22
-   0x1fff0e1a: cmp     r0, #10
-   0x1fff0e1c: beq.n   0x1fff0e22
-   0x1fff0e1e: cmp     r3, r4
-   0x1fff0e20: bne.n   0x1fff0e4e
-   0x1fff0e22: movs    r0, #0
-   0x1fff0e24: strb    r0, [r5, r3]
-   0x1fff0e26: cmp     r6, #0
-   0x1fff0e28: beq.n   0x1fff0e2c
-   0x1fff0e2a: str     r3, [r6, #0]
-   0x1fff0e2c: bl      0x1fff0df4
-   0x1fff0e30: ldr     r0, [pc, #44]   ; (0x1fff0e60)
-   0x1fff0e32: ldr     r0, [r0, #0]
-   0x1fff0e34: cmp     r0, #0
-   0x1fff0e36: beq.n   0x1fff0e46
-   0x1fff0e38: bl      0x1fff0de2
-   0x1fff0e3c: cmp     r0, #0
-   0x1fff0e3e: beq.n   0x1fff0e46
-   0x1fff0e40: movs    r0, #10
-   0x1fff0e42: bl      0x1fff0d66
-   0x1fff0e46: movs    r0, #0
-   0x1fff0e48: pop     {r4, r5, r6, pc}
-   0x1fff0e4a: movs    r0, #1
-   0x1fff0e4c: pop     {r4, r5, r6, pc}
-
-0x1fff0e40:    0xf7ff200a      0x2000ff90      0x2001bd70      0x54e8bd70
-0x1fff0e50:    0xe7dc1c5b      0x60084902      0x00004770      0x40008000
-0x1fff0e60:    0x1000005c      0x40018000      0xd0022800      0xb2c03020
-0x1fff0e70:    0x20604770      0xb5f04770      0x24004603      0xf7ffb2d0
-0x1fff0e80:    0x7008fff3      0xe0281c49      0xdb052a03      0x7818785d
-
-   0x1fff0e4e: strb    r0, [r5, r3]
-   0x1fff0e50: adds    r3, r3, #1
-   0x1fff0e52: b.n     0x1fff0e0e
-   0x1fff0e54: ldr     r1, [pc, #8]    ; (0x1fff0e60)
-   0x1fff0e56: str     r0, [r1, #0]
-   0x1fff0e58: bx      lr
-   0x1fff0e5a: movs    r0, r0
-   0x1fff0e5c: strh    r0, [r0, #0]
-   0x1fff0e5e: ands    r0, r0
-   0x1fff0e60: lsls    r4, r3, #1
-   0x1fff0e62: asrs    r0, r0, #32
-   0x1fff0e64: strh    r0, [r0, #0]
-   0x1fff0e66: ands    r1, r0
-   0x1fff0e68: cmp     r0, #0
-   0x1fff0e6a: beq.n   0x1fff0e72
-   0x1fff0e6c: adds    r0, #32
-   0x1fff0e6e: uxtb    r0, r0
-   0x1fff0e70: bx      lr
-   0x1fff0e72: movs    r0, #96 ; 0x60
-   0x1fff0e74: bx      lr
-
-
-
-   0x1fff0e76: push    {r4, r5, r6, r7, lr}
-   0x1fff0e78: mov     r3, r0
-   0x1fff0e7a: movs    r4, #0
-   0x1fff0e7c: uxtb    r0, r2
-   0x1fff0e7e: bl      0x1fff0e68
-   0x1fff0e82: strb    r0, [r1, #0]
-   0x1fff0e84: adds    r1, r1, #1
-   0x1fff0e86: b.n     0x1fff0eda
-   0x1fff0e88: cmp     r2, #3
-   0x1fff0e8a: blt.n   0x1fff0e98
-   0x1fff0e8c: ldrb    r5, [r3, #1]
-   0x1fff0e8e: ldrb    r0, [r3, #0]
-   0x1fff0e90: ldrb    r6, [r3, #2]
-   0x1fff0e92: adds    r0, r0, r5
-   0x1fff0e94: adds    r4, r6, r4
-   0x1fff0e96: b.n     0x1fff0eee
-   0x1fff0e98: cmp     r2, #2
-   0x1fff0e9a: beq.n   0x1fff0ee6
-   0x1fff0e9c: ldrb    r5, [r3, #0]
-   0x1fff0e9e: mov     r6, r5
-   0x1fff0ea0: adds    r4, r5, r4
-   0x1fff0ea2: ldrb    r0, [r3, #0]
-   0x1fff0ea4: lsrs    r0, r0, #2
-   0x1fff0ea6: bl      0x1fff0e68
-   0x1fff0eaa: strb    r0, [r1, #0]
-   0x1fff0eac: ldrb    r0, [r3, #0]
-   0x1fff0eae: lsrs    r7, r5, #4
-   0x1fff0eb0: lsls    r0, r0, #30
-   0x1fff0eb2: lsrs    r0, r0, #26
-   0x1fff0eb4: adds    r0, r0, r7
-   0x1fff0eb6: bl      0x1fff0e68
-   0x1fff0eba: strb    r0, [r1, #1]
-   0x1fff0ebc: lsls    r0, r5, #28
-   0x1fff0ebe: lsrs    r0, r0, #26
-   0x1fff0ec0: lsrs    r5, r6, #6
-   0x1fff0ec2: adds    r0, r0, r5
-   0x1fff0ec4: bl      0x1fff0e68
-   0x1fff0ec8: strb    r0, [r1, #2]
-   0x1fff0eca: lsls    r0, r6, #26
-   0x1fff0ecc: lsrs    r0, r0, #26
-   0x1fff0ece: bl      0x1fff0e68
-   0x1fff0ed2: strb    r0, [r1, #3]
-   0x1fff0ed4: adds    r1, r1, #4
-   0x1fff0ed6: adds    r3, r3, #3
-   0x1fff0ed8: subs    r2, r2, #3
-   0x1fff0eda: cmp     r2, #0
-   0x1fff0edc: bgt.n   0x1fff0e88
-   0x1fff0ede: movs    r0, #0
-   0x1fff0ee0: strb    r0, [r1, #0]
-   0x1fff0ee2: mov     r0, r4
-   0x1fff0ee4: pop     {r4, r5, r6, r7, pc}
-   0x1fff0ee6: ldrb    r5, [r3, #1]
-   0x1fff0ee8: ldrb    r0, [r3, #0]
-   0x1fff0eea: mov     r6, r5
-   0x1fff0eec: adds    r0, r0, r5
-   0x1fff0eee: adds    r4, r0, r4
-   0x1fff0ef0: b.n     0x1fff0ea2
-   0x1fff0ef2: cmp     r0, #96 ; 0x60
-   0x1fff0ef4: beq.n   0x1fff0efc
-   0x1fff0ef6: subs    r0, #32
-   0x1fff0ef8: uxtb    r0, r0
-   0x1fff0efa: bx      lr
-   0x1fff0efc: movs    r0, #0
-   0x1fff0efe: bx      lr
-
-
-
-   0x1fff0f00: push    {r4, r5, r6, r7, lr}
-   0x1fff0f02: mov     r3, r0
-   0x1fff0f04: movs    r6, #0
-   0x1fff0f06: mov     r12, r2
-   0x1fff0f08: mov     r5, r6
-   0x1fff0f0a: ldrb    r0, [r0, #0]
-   0x1fff0f0c: bl      0x1fff0ef2
-   0x1fff0f10: mov     r4, r0
-   0x1fff0f12: subs    r0, r0, #1
-   0x1fff0f14: cmp     r0, #44 ; 0x2c
-   0x1fff0f16: bhi.n   0x1fff0fb0
-   0x1fff0f18: adds    r3, r3, #1
-   0x1fff0f1a: b.n     0x1fff0fac
-   0x1fff0f1c: cmp     r4, #3
-   0x1fff0f1e: blt.n   0x1fff0f6c
-   0x1fff0f20: ldrb    r0, [r3, #0]
-   0x1fff0f22: bl      0x1fff0ef2
-   0x1fff0f26: lsls    r2, r0, #2
-   0x1fff0f28: ldrb    r0, [r3, #1]
-   0x1fff0f2a: bl      0x1fff0ef2
-   0x1fff0f2e: lsrs    r0, r0, #4
-   0x1fff0f30: orrs    r2, r0
-   0x1fff0f32: strb    r2, [r1, #0]
-   0x1fff0f34: ldrb    r0, [r3, #1]
-   0x1fff0f36: bl      0x1fff0ef2
-   0x1fff0f3a: lsls    r2, r0, #4
-   0x1fff0f3c: ldrb    r0, [r3, #2]
-   0x1fff0f3e: bl      0x1fff0ef2
-   0x1fff0f42: lsrs    r0, r0, #2
-   0x1fff0f44: orrs    r2, r0
-   0x1fff0f46: strb    r2, [r1, #1]
-   0x1fff0f48: ldrb    r0, [r3, #2]
-   0x1fff0f4a: bl      0x1fff0ef2
-   0x1fff0f4e: lsls    r2, r0, #6
-   0x1fff0f50: ldrb    r0, [r3, #3]
-   0x1fff0f52: bl      0x1fff0ef2
-   0x1fff0f56: orrs    r2, r0
-   0x1fff0f58: uxtb    r0, r2
-   0x1fff0f5a: strb    r0, [r1, #2]
-   0x1fff0f5c: ldrb    r7, [r1, #0]
-   0x1fff0f5e: ldrb    r2, [r1, #1]
-   0x1fff0f60: adds    r0, r0, r6
-   0x1fff0f62: adds    r2, r7, r2
-   0x1fff0f64: adds    r5, r5, #3
-   0x1fff0f66: adds    r6, r2, r0
-   0x1fff0f68: adds    r1, r1, #3
-   0x1fff0f6a: b.n     0x1fff0fa8
-   0x1fff0f6c: cmp     r4, #1
-   0x1fff0f6e: blt.n   0x1fff0f8a
-   0x1fff0f70: ldrb    r0, [r3, #0]
-   0x1fff0f72: bl      0x1fff0ef2
-   0x1fff0f76: lsls    r2, r0, #2
-   0x1fff0f78: ldrb    r0, [r3, #1]
-   0x1fff0f7a: bl      0x1fff0ef2
-   0x1fff0f7e: lsrs    r0, r0, #4
-   0x1fff0f80: orrs    r2, r0
-   0x1fff0f82: uxtb    r0, r2
-   0x1fff0f84: adds    r5, r5, #1
-   0x1fff0f86: strb    r0, [r1, #0]
-   0x1fff0f88: adds    r6, r0, r6
-   0x1fff0f8a: cmp     r4, #2
-   0x1fff0f8c: blt.n   0x1fff0fa8
-   0x1fff0f8e: ldrb    r0, [r3, #1]
-   0x1fff0f90: bl      0x1fff0ef2
-   0x1fff0f94: lsls    r2, r0, #4
-   0x1fff0f96: ldrb    r0, [r3, #2]
-   0x1fff0f98: bl      0x1fff0ef2
-   0x1fff0f9c: lsrs    r0, r0, #2
-   0x1fff0f9e: orrs    r2, r0
-   0x1fff0fa0: uxtb    r0, r2
-   0x1fff0fa2: adds    r5, r5, #1
-   0x1fff0fa4: strb    r0, [r1, #1]
-   0x1fff0fa6: adds    r6, r0, r6
-   0x1fff0fa8: adds    r3, r3, #4
-   0x1fff0faa: subs    r4, r4, #3
-   0x1fff0fac: cmp     r4, #0
-   0x1fff0fae: bgt.n   0x1fff0f1c
-   0x1fff0fb0: mov     r0, r12
-   0x1fff0fb2: str     r5, [r0, #0]
-   0x1fff0fb4: mov     r0, r6
-   0x1fff0fb6: pop     {r4, r5, r6, r7, pc}
-
-
-
-   0x1fff0fb8: push    {r4, lr}
-   0x1fff0fba: movs    r2, #0
-   0x1fff0fbc: b.n     0x1fff0fc4
-   0x1fff0fbe: cmp     r3, #0
-   0x1fff0fc0: beq.n   0x1fff0fd4
-   0x1fff0fc2: adds    r2, r2, #1
-   0x1fff0fc4: ldrb    r3, [r0, r2]
-   0x1fff0fc6: ldrb    r4, [r1, r2]
-   0x1fff0fc8: cmp     r3, r4
-   0x1fff0fca: beq.n   0x1fff0fbe
-   0x1fff0fcc: uxtb    r0, r3
-   0x1fff0fce: uxtb    r1, r4
-   0x1fff0fd0: subs    r0, r0, r1
-   0x1fff0fd2: pop     {r4, pc}
-   0x1fff0fd4: movs    r0, #0
-   0x1fff0fd6: pop     {r4, pc}
-
-
-
-   0x1fff0fd8: push    {r0, r1, r2, r3, r4, r5, r6, r7, lr}
-   0x1fff0fda: mov     r5, r0
-   0x1fff0fdc: movs    r0, #0
-   0x1fff0fde: ldrb    r1, [r5, #0]
-   0x1fff0fe0: mov     lr, r3
-   0x1fff0fe2: ldr     r6, [sp, #36]   ; 0x24
-   0x1fff0fe4: mov     r3, r0
-   0x1fff0fe6: mov     r4, r0
-   0x1fff0fe8: cmp     r1, #0
-   0x1fff0fea: beq.n   0x1fff0ff4
-   0x1fff0fec: movs    r1, #0
-   0x1fff0fee: subs    r6, r6, #2
-   0x1fff0ff0: mov     r12, r6
-   0x1fff0ff2: b.n     0x1fff1030
-   0x1fff0ff4: movs    r0, #0
-   0x1fff0ff6: add     sp, #16
-   0x1fff0ff8: pop     {r4, r5, r6, r7, pc}
-   0x1fff0ffa: adds    r6, r0, #1
-   0x1fff0ffc: cmp     r6, lr
-   0x1fff0ffe: bgt.n   0x1fff1036
-   0x1fff1000: ldrb    r6, [r5, r1]
-   0x1fff1002: cmp     r6, #32
-   0x1fff1004: beq.n   0x1fff1016
-   0x1fff1006: cmp     r4, r12
-   0x1fff1008: bge.n   0x1fff1016
-   0x1fff100a: lsls    r7, r0, #2
-   0x1fff100c: ldr     r7, [r2, r7]
-   0x1fff100e: strb    r6, [r7, r3]
-   0x1fff1010: adds    r3, r3, #1
-   0x1fff1012: adds    r4, r4, #1
-   0x1fff1014: b.n     0x1fff102e
-   0x1fff1016: adds    r6, r5, r1
-   0x1fff1018: ldrb    r6, [r6, #1]
-   0x1fff101a: cmp     r6, #32
-   0x1fff101c: bne.n   0x1fff1022
-   0x1fff101e: cmp     r4, r12
-   0x1fff1020: bne.n   0x1fff102e
-   0x1fff1022: lsls    r6, r0, #2
-   0x1fff1024: movs    r4, #0
-   0x1fff1026: ldr     r6, [r2, r6]
-   0x1fff1028: adds    r0, r0, #1
-   0x1fff102a: strb    r4, [r6, r3]
-   0x1fff102c: mov     r3, r4
-   0x1fff102e: adds    r1, r1, #1
-   0x1fff1030: ldr     r6, [sp, #4]
-   0x1fff1032: cmp     r1, r6
-   0x1fff1034: ble.n   0x1fff0ffa
-   0x1fff1036: adds    r0, r0, #1
-   0x1fff1038: b.n     0x1fff0ff6
-
-
-
-   0x1fff103a: push    {r4, r5, lr}
-   0x1fff103c: movs    r3, #0
-   0x1fff103e: mov     r2, r3
-   0x1fff1040: b.n     0x1fff1054
-   0x1fff1042: mov     r5, r4
-   0x1fff1044: subs    r5, #48 ; 0x30
-   0x1fff1046: cmp     r5, #9
-   0x1fff1048: bhi.n   0x1fff1060
-   0x1fff104a: movs    r5, #10
-   0x1fff104c: muls    r3, r5
-   0x1fff104e: subs    r3, #48 ; 0x30
-   0x1fff1050: adds    r3, r4, r3
-   0x1fff1052: adds    r2, r2, #1
-   0x1fff1054: ldrb    r4, [r0, r2]
-   0x1fff1056: cmp     r4, #0
-   0x1fff1058: bne.n   0x1fff1042
-   0x1fff105a: movs    r0, #0
-   0x1fff105c: str     r3, [r1, #0]
-   0x1fff105e: pop     {r4, r5, pc}
-   0x1fff1060: movs    r0, #1
-   0x1fff1062: pop     {r4, r5, pc}
-
-
-
-   0x1fff1064: push    {r4, r5, r6, lr}
-   0x1fff1066: mov     r5, r1
-   0x1fff1068: movs    r1, #0
-   0x1fff106a: subs    r4, r2, #1
-   0x1fff106c: strb    r1, [r5, r4]
-   0x1fff106e: cmp     r0, #0
-   0x1fff1070: bne.n   0x1fff108e
-   0x1fff1072: movs    r0, #48 ; 0x30
-   0x1fff1074: subs    r4, r4, #1
-   0x1fff1076: strb    r0, [r5, r4]
-   0x1fff1078: b.n     0x1fff1096
-   0x1fff107a: subs    r4, r4, #1
-   0x1fff107c: movs    r1, #10
-   0x1fff107e: bl      0x1fff18a0
-   0x1fff1082: cmp     r1, #9
-   0x1fff1084: bhi.n   0x1fff108a
-   0x1fff1086: adds    r1, #48 ; 0x30
-   0x1fff1088: b.n     0x1fff108c
-   0x1fff108a: adds    r1, #55 ; 0x37
-   0x1fff108c: strb    r1, [r5, r4]
-   0x1fff108e: cmp     r4, #0
-   0x1fff1090: beq.n   0x1fff1096
-   0x1fff1092: cmp     r0, #0
-   0x1fff1094: bne.n   0x1fff107a
-   0x1fff1096: adds    r0, r5, r4
-   0x1fff1098: pop     {r4, r5, r6, pc}
-
-
-   0x1fff109a:                 ; <UNDEFINED> instruction: 0xffff1e49
-   0x1fff109e: ands    r0, r1
-   0x1fff10a0: beq.n   0x1fff10a4
-   0x1fff10a2: movs    r0, #1
-   0x1fff10a4: bx      lr
-
-
-
-   0x1fff10a6: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff10a8: movs    r4, #0
-   0x1fff10aa: mov     r6, r1
-   0x1fff10ac: mov     r5, r2
-   0x1fff10ae: mov     r7, r3
-   0x1fff10b0: cmp     r0, #0
-   0x1fff10b2: beq.n   0x1fff10c0
-   0x1fff10b4: bl      0x1fff103a
-   0x1fff10b8: cmp     r0, #0
-   0x1fff10ba: beq.n   0x1fff10c0
-   0x1fff10bc: movs    r0, #12
-   0x1fff10be: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff10c0: cmp     r5, #105        ; 0x69
-   0x1fff10c2: beq.n   0x1fff10e4
-   0x1fff10c4: movs    r1, #4
-   0x1fff10c6: ldr     r0, [r6, #0]
-   0x1fff10c8: bl      0x1fff109c
-   0x1fff10cc: cmp     r0, #0
-   0x1fff10ce: beq.n   0x1fff10f4
-   0x1fff10d0: cmp     r5, #100        ; 0x64
-   0x1fff10d2: beq.n   0x1fff10e8
-   0x1fff10d4: movs    r4, #13
-   0x1fff10d6: cmp     r5, #103        ; 0x67
-   0x1fff10d8: beq.n   0x1fff10ec
-   0x1fff10da: cmp     r5, #104        ; 0x68
-   0x1fff10dc: beq.n   0x1fff10f0
-   0x1fff10de: cmp     r4, #0
-   0x1fff10e0: beq.n   0x1fff1118
-   0x1fff10e2: b.n     0x1fff1190
-   0x1fff10e4: movs    r0, #0
-   0x1fff10e6: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff10e8: movs    r4, #6
-   0x1fff10ea: b.n     0x1fff1190
-   0x1fff10ec: movs    r4, #2
-   0x1fff10ee: b.n     0x1fff1190
-   0x1fff10f0: movs    r4, #3
-   0x1fff10f2: b.n     0x1fff1190
-   0x1fff10f4: cmp     r5, #101        ; 0x65
-   0x1fff10f6: bne.n   0x1fff1118
-   0x1fff10f8: ldr     r0, [r6, #0]
-   0x1fff10fa: subs    r1, r0, #7
-   0x1fff10fc: subs    r1, #249        ; 0xf9
-   0x1fff10fe: beq.n   0x1fff1118
-   0x1fff1100: subs    r1, #255        ; 0xff
-   0x1fff1102: subs    r1, #1
-   0x1fff1104: beq.n   0x1fff1118
-   0x1fff1106: movs    r1, #1
-   0x1fff1108: lsls    r1, r1, #10
-   0x1fff110a: cmp     r0, r1
-   0x1fff110c: beq.n   0x1fff1118
-   0x1fff110e: lsls    r1, r1, #2
-   0x1fff1110: cmp     r0, r1
-   0x1fff1112: beq.n   0x1fff1118
-   0x1fff1114: movs    r0, #6
-   0x1fff1116: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1118: ldr     r3, [pc, #204]  ; (0x1fff11e8)
-   0x1fff111a: ldr     r0, [r3, #0]
-   0x1fff111c: movs    r1, #64 ; 0x40
-   0x1fff111e: orrs    r0, r1
-   0x1fff1120: str     r0, [r3, #0]
-   0x1fff1122: ldr     r0, [pc, #200]  ; (0x1fff11ec)
-   0x1fff1124: ldr     r1, [r6, #0]
-   0x1fff1126: ldr     r0, [r0, #0]
-   0x1fff1128: cmp     r1, r0
-   0x1fff112a: bcc.n   0x1fff113c
-   0x1fff112c: ldr     r0, [pc, #192]  ; (0x1fff11f0)
-   0x1fff112e: adds    r2, r1, r7
-   0x1fff1130: ldr     r0, [r0, #0]
-   0x1fff1132: adds    r0, r0, #1
-   0x1fff1134: cmp     r2, r0
-   0x1fff1136: bhi.n   0x1fff113c
-   0x1fff1138: movs    r0, #1
-   0x1fff113a: b.n     0x1fff113e
-   0x1fff113c: movs    r0, #0
-   0x1fff113e: ldr     r2, [pc, #180]  ; (0x1fff11f4)
-   0x1fff1140: ldr     r2, [r2, #0]
-   0x1fff1142: cmp     r1, r2
-   0x1fff1144: bcc.n   0x1fff1156
-   0x1fff1146: adds    r2, r1, r7
-   0x1fff1148: ldr     r1, [pc, #172]  ; (0x1fff11f8)
-   0x1fff114a: ldr     r1, [r1, #0]
-   0x1fff114c: adds    r1, r1, #1
-   0x1fff114e: cmp     r2, r1
-   0x1fff1150: bhi.n   0x1fff1156
-   0x1fff1152: movs    r1, #1
-   0x1fff1154: b.n     0x1fff1158
-   0x1fff1156: movs    r1, #0
-   0x1fff1158: ldr     r2, [r3, #0]
-   0x1fff115a: movs    r7, #64 ; 0x40
-   0x1fff115c: bics    r2, r7
-   0x1fff115e: str     r2, [r3, #0]
-   0x1fff1160: cmp     r5, #102        ; 0x66
-   0x1fff1162: beq.n   0x1fff116e
-   0x1fff1164: cmp     r5, #103        ; 0x67
-   0x1fff1166: beq.n   0x1fff1176
-   0x1fff1168: cmp     r5, #104        ; 0x68
-   0x1fff116a: beq.n   0x1fff117e
-   0x1fff116c: b.n     0x1fff1190
-   0x1fff116e: orrs    r0, r1
-   0x1fff1170: bne.n   0x1fff1190
-   0x1fff1172: movs    r4, #14
-   0x1fff1174: b.n     0x1fff1190
-   0x1fff1176: cmp     r0, #0
-   0x1fff1178: bne.n   0x1fff1190
-   0x1fff117a: movs    r4, #4
-   0x1fff117c: b.n     0x1fff1190
-   0x1fff117e: cmp     r1, #0
-   0x1fff1180: beq.n   0x1fff1194
-   0x1fff1182: movs    r1, #255        ; 0xff
-   0x1fff1184: adds    r1, #1
-   0x1fff1186: ldr     r0, [r6, #0]
-   0x1fff1188: bl      0x1fff109c
-   0x1fff118c: cmp     r0, #0
-   0x1fff118e: bne.n   0x1fff10f0
-   0x1fff1190: mov     r0, r4
-   0x1fff1192: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1194: movs    r4, #5
-   0x1fff1196: b.n     0x1fff1190
-   0x1fff1198: push    {r4, r5, r6, lr}
-   0x1fff119a: ldr     r3, [pc, #76]   ; (0x1fff11e8)
-   0x1fff119c: mov     r4, r0
-   0x1fff119e: ldr     r6, [r3, #0]
-   0x1fff11a0: movs    r0, #14
-   0x1fff11a2: movs    r5, #64 ; 0x40
-   0x1fff11a4: orrs    r6, r5
-   0x1fff11a6: str     r6, [r3, #0]
-   0x1fff11a8: ldr     r6, [pc, #64]   ; (0x1fff11ec)
-   0x1fff11aa: ldr     r6, [r6, #0]
-   0x1fff11ac: cmp     r1, r6
-   0x1fff11ae: bcc.n   0x1fff11ca
-   0x1fff11b0: adds    r6, r1, r2
-   0x1fff11b2: ldr     r1, [pc, #60]   ; (0x1fff11f0)
-   0x1fff11b4: ldr     r1, [r1, #0]
-   0x1fff11b6: adds    r1, r1, #1
-   0x1fff11b8: cmp     r6, r1
-   0x1fff11ba: bhi.n   0x1fff11ca
-   0x1fff11bc: ldr     r1, [pc, #60]   ; (0x1fff11fc)
-   0x1fff11be: adds    r2, r4, r2
-   0x1fff11c0: ldr     r1, [r1, #0]
-   0x1fff11c2: adds    r1, r1, #1
-   0x1fff11c4: cmp     r2, r1
-   0x1fff11c6: bhi.n   0x1fff11ca
-   0x1fff11c8: movs    r0, #0
-   0x1fff11ca: ldr     r1, [r3, #0]
-   0x1fff11cc: bics    r1, r5
-   0x1fff11ce: str     r1, [r3, #0]
-   0x1fff11d0: pop     {r4, r5, r6, pc}
-   0x1fff11d2: bx      lr
-   0x1fff11d4: push    {r4, lr}
-   0x1fff11d6: mov     r4, r1
-   0x1fff11d8: bl      0x1fff18a0
-   0x1fff11dc: lsrs    r2, r4, #1
-   0x1fff11de: cmp     r2, r1
-   0x1fff11e0: bcs.n   0x1fff11e4
-   0x1fff11e2: adds    r0, r0, #1
-   0x1fff11e4: pop     {r4, pc}
-   0x1fff11e6: movs    r0, r0
-   0x1fff11e8: stmia   r0!, {}
-   0x1fff11ea: ands    r3, r0
-   0x1fff11ec: lsls    r0, r7, #16
-   0x1fff11ee: movs    r0, r0
-   0x1fff11f0: lsls    r4, r7, #16
-   0x1fff11f2: movs    r0, r0
-   0x1fff11f4: lsls    r0, r3, #17
-   0x1fff11f6: movs    r0, r0
-   0x1fff11f8: lsls    r4, r3, #17
-   0x1fff11fa: movs    r0, r0
-   0x1fff11fc: lsls    r0, r7, #23
-   0x1fff11fe: movs    r0, r0
-   0x1fff1200: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff1202: mov     r5, r0
-   0x1fff1204: ldr     r4, [pc, #460]  ; (0x1fff13d4)
-   0x1fff1206: movs    r0, #0
-   0x1fff1208: str     r0, [r4, #24]
-   0x1fff120a: movs    r1, #255        ; 0xff
-   0x1fff120c: adds    r1, #120        ; 0x78
-   0x1fff120e: mov     r0, r5
-   0x1fff1210: bl      0x1fff18a0
-   0x1fff1214: str     r0, [r4, #20]
-   0x1fff1216: ldr     r0, [r4, #20]
-   0x1fff1218: movs    r7, #125        ; 0x7d
-   0x1fff121a: lsls    r7, r7, #3
-   0x1fff121c: mov     r1, r7
-   0x1fff121e: mov     r0, r5
-   0x1fff1220: bl      0x1fff18a0
-   0x1fff1224: mov     r5, r0
-   0x1fff1226: lsls    r1, r0, #4
-   0x1fff1228: subs    r0, r1, r5
-   0x1fff122a: mov     r1, r7
-   0x1fff122c: bl      0x1fff18a0
-   0x1fff1230: adds    r6, r0, #1
-   0x1fff1232: mov     r0, r5
-   0x1fff1234: movs    r1, #55 ; 0x37
-   0x1fff1236: muls    r0, r1
-   0x1fff1238: mov     r1, r7
-   0x1fff123a: bl      0x1fff18a0
-   0x1fff123e: lsls    r1, r0, #8
-   0x1fff1240: adds    r1, #255        ; 0xff
-   0x1fff1242: adds    r1, #1
-   0x1fff1244: orrs    r6, r1
-   0x1fff1246: mov     r0, r5
-   0x1fff1248: movs    r1, #35 ; 0x23
-   0x1fff124a: muls    r0, r1
-   0x1fff124c: mov     r1, r7
-   0x1fff124e: bl      0x1fff18a0
-   0x1fff1252: movs    r1, #1
-   0x1fff1254: lsls    r0, r0, #16
-   0x1fff1256: lsls    r1, r1, #16
-   0x1fff1258: adds    r0, r0, r1
-   0x1fff125a: orrs    r0, r6
-   0x1fff125c: str     r0, [r4, #16]
-   0x1fff125e: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1260: ldr     r3, [pc, #368]  ; (0x1fff13d4)
-   0x1fff1262: str     r2, [r3, #4]
-   0x1fff1264: cmp     r1, #0
-   0x1fff1266: beq.n   0x1fff1274
-   0x1fff1268: cmp     r1, #2
-   0x1fff126a: beq.n   0x1fff1282
-   0x1fff126c: cmp     r0, #0
-   0x1fff126e: beq.n   0x1fff128e
-   0x1fff1270: movs    r0, #4
-   0x1fff1272: b.n     0x1fff127a
-   0x1fff1274: cmp     r0, #0
-   0x1fff1276: beq.n   0x1fff127e
-   0x1fff1278: movs    r0, #3
-   0x1fff127a: str     r0, [r3, #0]
-   0x1fff127c: bx      lr
-   0x1fff127e: movs    r0, #8
-   0x1fff1280: b.n     0x1fff127a
-   0x1fff1282: cmp     r0, #0
-   0x1fff1284: beq.n   0x1fff128a
-   0x1fff1286: movs    r0, #5
-   0x1fff1288: b.n     0x1fff127a
-   0x1fff128a: movs    r0, #10
-   0x1fff128c: b.n     0x1fff127a
-   0x1fff128e: movs    r0, #9
-   0x1fff1290: b.n     0x1fff127a
-   0x1fff1292: movs    r2, #5
-   0x1fff1294: ldr     r1, [pc, #320]  ; (0x1fff13d8)
-   0x1fff1296: lsls    r2, r2, #26
-   0x1fff1298: str     r2, [r1, #40]   ; 0x28
-   0x1fff129a: ldr     r2, [pc, #312]  ; (0x1fff13d4)
-   0x1fff129c: str     r0, [r2, #4]
-   0x1fff129e: movs    r0, #6
-   0x1fff12a0: str     r0, [r2, #0]
-   0x1fff12a2: ldr     r0, [r1, #32]
-   0x1fff12a4: lsls    r0, r0, #3
-   0x1fff12a6: bpl.n   0x1fff12a2
-   0x1fff12a8: bx      lr
-   0x1fff12aa: push    {r4, r5, r6, lr}
-   0x1fff12ac: mov     r4, r1
-   0x1fff12ae: mov     r5, r2
-   0x1fff12b0: mov     r6, r0
-   0x1fff12b2: movs    r1, #4
-   0x1fff12b4: bl      0x1fff109c
-   0x1fff12b8: cmp     r0, #0
-   0x1fff12ba: bne.n   0x1fff12d4
-   0x1fff12bc: movs    r1, #4
-   0x1fff12be: mov     r0, r5
-   0x1fff12c0: bl      0x1fff109c
-   0x1fff12c4: cmp     r0, #0
-   0x1fff12c6: bne.n   0x1fff12d4
-   0x1fff12c8: movs    r1, #4
-   0x1fff12ca: mov     r0, r4
-   0x1fff12cc: bl      0x1fff109c
-   0x1fff12d0: cmp     r0, #0
-   0x1fff12d2: beq.n   0x1fff12e2
-   0x1fff12d4: movs    r1, #2
-   0x1fff12d6: mov     r0, r6
-   0x1fff12d8: bl      0x1fff109c
-   0x1fff12dc: cmp     r0, #0
-   0x1fff12de: beq.n   0x1fff12e6
-   0x1fff12e0: b.n     0x1fff12fe
-   0x1fff12e2: movs    r0, #2
-   0x1fff12e4: pop     {r4, r5, r6, pc}
-   0x1fff12e6: movs    r1, #2
-   0x1fff12e8: mov     r0, r5
-   0x1fff12ea: bl      0x1fff109c
-   0x1fff12ee: cmp     r0, #0
-   0x1fff12f0: bne.n   0x1fff12fe
-   0x1fff12f2: movs    r1, #2
-   0x1fff12f4: mov     r0, r4
-   0x1fff12f6: bl      0x1fff109c
-   0x1fff12fa: cmp     r0, #0
-   0x1fff12fc: beq.n   0x1fff1302
-   0x1fff12fe: movs    r0, #0
-   0x1fff1300: pop     {r4, r5, r6, pc}
-   0x1fff1302: movs    r0, #1
-   0x1fff1304: pop     {r4, r5, r6, pc}
-   0x1fff1306: push    {r1, r2, r3, r4, r5, r6, r7, lr}
-   0x1fff1308: mov     r5, r0
-   0x1fff130a: mov     r4, r1
-   0x1fff130c: mov     r6, r2
-   0x1fff130e: bl      0x1fff12aa
-   0x1fff1312: mov     r1, r0
-   0x1fff1314: str     r0, [sp, #0]
-   0x1fff1316: mov     r2, r5
-   0x1fff1318: movs    r0, #1
-   0x1fff131a: bl      0x1fff1260
-   0x1fff131e: ldr     r7, [pc, #180]  ; (0x1fff13d4)
-   0x1fff1320: str     r5, [sp, #4]
-   0x1fff1322: b.n     0x1fff136e
-   0x1fff1324: ldr     r0, [sp, #0]
-   0x1fff1326: cmp     r0, #0
-   0x1fff1328: beq.n   0x1fff1346
-   0x1fff132a: cmp     r0, #2
-   0x1fff132c: beq.n   0x1fff1352
-   0x1fff132e: ldrh    r0, [r4, #0]
-   0x1fff1330: adds    r4, r4, #2
-   0x1fff1332: str     r0, [r7, #8]
-   0x1fff1334: adds    r5, r5, #2
-   0x1fff1336: subs    r6, r6, #2
-   0x1fff1338: movs    r1, #64 ; 0x40
-   0x1fff133a: mov     r0, r5
-   0x1fff133c: bl      0x1fff109c
-   0x1fff1340: cmp     r0, #0
-   0x1fff1342: bne.n   0x1fff136e
-   0x1fff1344: b.n     0x1fff135c
-   0x1fff1346: ldrb    r0, [r4, #0]
-   0x1fff1348: adds    r4, r4, #1
-   0x1fff134a: str     r0, [r7, #8]
-   0x1fff134c: adds    r5, r5, #1
-   0x1fff134e: subs    r6, r6, #1
-   0x1fff1350: b.n     0x1fff1338
-   0x1fff1352: ldmia   r4!, {r0}
-   0x1fff1354: str     r0, [r7, #8]
-   0x1fff1356: adds    r5, r5, #4
-   0x1fff1358: subs    r6, r6, #4
-   0x1fff135a: b.n     0x1fff1338
-   0x1fff135c: ldr     r0, [sp, #4]
-   0x1fff135e: bl      0x1fff1292
-   0x1fff1362: mov     r2, r5
-   0x1fff1364: str     r5, [sp, #4]
-   0x1fff1366: movs    r0, #1
-   0x1fff1368: ldr     r1, [sp, #0]
-   0x1fff136a: bl      0x1fff1260
-   0x1fff136e: cmp     r6, #0
-   0x1fff1370: bne.n   0x1fff1324
-   0x1fff1372: movs    r1, #64 ; 0x40
-   0x1fff1374: mov     r0, r5
-   0x1fff1376: bl      0x1fff109c
-   0x1fff137a: cmp     r0, #0
-   0x1fff137c: beq.n   0x1fff1384
-   0x1fff137e: ldr     r0, [sp, #4]
-   0x1fff1380: bl      0x1fff1292
-   0x1fff1384: movs    r0, #0
-   0x1fff1386: str     r0, [r7, #0]
-   0x1fff1388: str     r0, [r7, #20]
-   0x1fff138a: pop     {r1, r2, r3, r4, r5, r6, r7, pc}
-   0x1fff138c: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff138e: mov     r7, r0
-   0x1fff1390: mov     r4, r1
-   0x1fff1392: mov     r5, r2
-   0x1fff1394: bl      0x1fff12aa
-   0x1fff1398: mov     r6, r0
-   0x1fff139a: mov     r1, r0
-   0x1fff139c: mov     r2, r7
-   0x1fff139e: movs    r0, #0
-   0x1fff13a0: bl      0x1fff1260
-   0x1fff13a4: ldr     r0, [pc, #44]   ; (0x1fff13d4)
-   0x1fff13a6: b.n     0x1fff13b8
-   0x1fff13a8: cmp     r6, #0
-   0x1fff13aa: beq.n   0x1fff13c4
-   0x1fff13ac: ldr     r1, [r0, #12]
-   0x1fff13ae: cmp     r6, #2
-   0x1fff13b0: beq.n   0x1fff13ce
-   0x1fff13b2: strh    r1, [r4, #0]
-   0x1fff13b4: adds    r4, r4, #2
-   0x1fff13b6: subs    r5, r5, #2
-   0x1fff13b8: cmp     r5, #0
-   0x1fff13ba: bne.n   0x1fff13a8
-   0x1fff13bc: movs    r1, #0
-   0x1fff13be: str     r1, [r0, #0]
-   0x1fff13c0: str     r1, [r0, #20]
-   0x1fff13c2: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff13c4: ldr     r1, [r0, #12]
-   0x1fff13c6: strb    r1, [r4, #0]
-   0x1fff13c8: adds    r4, r4, #1
-   0x1fff13ca: subs    r5, r5, #1
-   0x1fff13cc: b.n     0x1fff13b8
-   0x1fff13ce: stmia   r4!, {r1}
-   0x1fff13d0: subs    r5, r5, #4
-   0x1fff13d2: b.n     0x1fff13b8
-   0x1fff13d4: stmia   r0!, {r7}
-   0x1fff13d6: ands    r3, r0
-   0x1fff13d8: ldmia   r7, {r6, r7}
-   0x1fff13da: ands    r3, r0
-
-       {
-
-   0x1fff13dc: push    {r0, r1, r4, r5, r6, r7, lr}
-   0x1fff13de: sub     sp, #28
-   0x1fff13e0: movs    r0, #1
-   0x1fff13e2: movs    r6, #0
-   0x1fff13e4: str     r0, [sp, #12]
-   0x1fff13e6: bl      0x1fff1616
-   0x1fff13ea: mov     r4, r0
-   0x1fff13ec: bl      0x1fff1610
-   0x1fff13f0: ldr     r1, [pc, #496]  ; (0x1fff15e4)
-   0x1fff13f2: ldr     r0, [r1, #0]
-   0x1fff13f4: movs    r2, #64 ; 0x40
-   0x1fff13f6: orrs    r0, r2
-   0x1fff13f8: str     r0, [r1, #0]
-   0x1fff13fa: ldr     r0, [pc, #492]  ; (0x1fff15e8)
-   0x1fff13fc: ldr     r0, [r0, #0]
-   0x1fff13fe: str     r0, [sp, #8]
-   0x1fff1400: ldr     r0, [r1, #0]
-   0x1fff1402: bics    r0, r2
-   0x1fff1404: str     r0, [r1, #0]
-   0x1fff1406: mov     r0, r4
-   0x1fff1408: bl      0x1fff1600
-   0x1fff140c: ldr     r0, [sp, #28]
-   0x1fff140e: ldr     r1, [r0, #0]
-   0x1fff1410: ldr     r0, [sp, #32]
-   0x1fff1412: str     r1, [r0, #4]
-   0x1fff1414: ldr     r0, [sp, #28]
-   0x1fff1416: ldr     r1, [pc, #472]  ; (0x1fff15f0)
-   0x1fff1418: ldr     r7, [r0, #0]
-   0x1fff141a: ldr     r0, [pc, #464]  ; (0x1fff15ec)
-   0x1fff141c: adds    r0, r7, r0
-   0x1fff141e: cmp     r0, r1
-   0x1fff1420: bcs.n   0x1fff1434
-   0x1fff1422: ldr     r0, [sp, #28]
-   0x1fff1424: ldr     r1, [sp, #8]
-   0x1fff1426: ldr     r0, [r0, #4]
-   0x1fff1428: str     r0, [sp, #0]
-   0x1fff142a: cmp     r0, r1
-   0x1fff142c: bhi.n   0x1fff1434
-   0x1fff142e: lsls    r0, r0, #8
-   0x1fff1430: cmp     r0, r7
-   0x1fff1432: bcs.n   0x1fff143e
-   0x1fff1434: ldr     r1, [sp, #32]
-   0x1fff1436: movs    r0, #1
-   0x1fff1438: str     r0, [r1, #0]
-   0x1fff143a: add     sp, #36 ; 0x24
-   0x1fff143c: pop     {r4, r5, r6, r7, pc}
-
-       }
-
-   0x1fff143e: ldr     r0, [sp, #28]
-   0x1fff1440: ldr     r0, [r0, #8]
-   0x1fff1442: str     r0, [sp, #20]
-   0x1fff1444: cmp     r0, #3
-   0x1fff1446: bls.n   0x1fff1450
-   0x1fff1448: ldr     r0, [sp, #32]
-   0x1fff144a: movs    r1, #2
-   0x1fff144c: str     r1, [r0, #0]
-   0x1fff144e: b.n     0x1fff143a
-   0x1fff1450: movs    r4, #1
-   0x1fff1452: movs    r5, #0
-   0x1fff1454: str     r7, [sp, #4]
-   0x1fff1456: str     r4, [sp, #16]
-   0x1fff1458: b.n     0x1fff14ea
-   0x1fff145a: ldr     r1, [sp, #0]
-   0x1fff145c: ldr     r0, [sp, #4]
-   0x1fff145e: bl      0x1fff18a0
-   0x1fff1462: ldr     r1, [sp, #0]
-   0x1fff1464: ldr     r2, [sp, #4]
-   0x1fff1466: muls    r1, r0
-   0x1fff1468: cmp     r1, r2
-   0x1fff146a: bne.n   0x1fff1474
-   0x1fff146c: str     r0, [sp, #16]
-   0x1fff146e: movs    r0, #0
-   0x1fff1470: str     r0, [sp, #12]
-   0x1fff1472: b.n     0x1fff14ea
-   0x1fff1474: ldr     r2, [sp, #20]
-   0x1fff1476: cmp     r2, #2
-   0x1fff1478: beq.n   0x1fff147e
-   0x1fff147a: cmp     r2, #3
-   0x1fff147c: bne.n   0x1fff14aa
-   0x1fff147e: cmp     r0, #0
-   0x1fff1480: beq.n   0x1fff14aa
-   0x1fff1482: cmp     r5, #0
-   0x1fff1484: beq.n   0x1fff14a6
-   0x1fff1486: ldr     r2, [sp, #0]
-   0x1fff1488: mov     r3, r7
-   0x1fff148a: muls    r3, r5
-   0x1fff148c: muls    r2, r6
-   0x1fff148e: subs    r2, r3, r2
-   0x1fff1490: bpl.n   0x1fff1494
-   0x1fff1492: negs    r2, r2
-   0x1fff1494: mov     r3, r7
-   0x1fff1496: muls    r2, r0
-   0x1fff1498: muls    r3, r4
-   0x1fff149a: subs    r1, r3, r1
-   0x1fff149c: bpl.n   0x1fff14a0
-   0x1fff149e: negs    r1, r1
-   0x1fff14a0: muls    r1, r6
-   0x1fff14a2: cmp     r1, r2
-   0x1fff14a4: bge.n   0x1fff14aa
-   0x1fff14a6: mov     r5, r4
-   0x1fff14a8: mov     r6, r0
-   0x1fff14aa: ldr     r1, [sp, #20]
-   0x1fff14ac: cmp     r1, #1
-   0x1fff14ae: beq.n   0x1fff14b4
-   0x1fff14b0: cmp     r1, #3
-   0x1fff14b2: bne.n   0x1fff14e2
-   0x1fff14b4: cmp     r5, #0
-   0x1fff14b6: beq.n   0x1fff1502
-   0x1fff14b8: ldr     r1, [sp, #0]
-   0x1fff14ba: mov     r2, r7
-   0x1fff14bc: adds    r0, r0, #1
-   0x1fff14be: muls    r2, r5
-   0x1fff14c0: muls    r1, r6
-   0x1fff14c2: subs    r2, r2, r1
-   0x1fff14c4: bpl.n   0x1fff14c8
-   0x1fff14c6: negs    r2, r2
-   0x1fff14c8: ldr     r1, [sp, #0]
-   0x1fff14ca: mov     r3, r7
-   0x1fff14cc: muls    r2, r0
-   0x1fff14ce: muls    r3, r4
-   0x1fff14d0: muls    r1, r0
-   0x1fff14d2: subs    r1, r3, r1
-   0x1fff14d4: bpl.n   0x1fff14d8
-   0x1fff14d6: negs    r1, r1
-   0x1fff14d8: muls    r1, r6
-   0x1fff14da: cmp     r1, r2
-   0x1fff14dc: bge.n   0x1fff14e2
-   0x1fff14de: mov     r5, r4
-   0x1fff14e0: mov     r6, r0
-   0x1fff14e2: ldr     r0, [sp, #4]
-   0x1fff14e4: adds    r0, r7, r0
-   0x1fff14e6: adds    r4, r4, #1
-   0x1fff14e8: str     r0, [sp, #4]
-   0x1fff14ea: ldr     r1, [sp, #8]
-   0x1fff14ec: ldr     r0, [sp, #4]
-   0x1fff14ee: cmp     r0, r1
-   0x1fff14f0: bhi.n   0x1fff14f8
-   0x1fff14f2: ldr     r0, [sp, #12]
-   0x1fff14f4: cmp     r0, #0
-   0x1fff14f6: bne.n   0x1fff145a
-   0x1fff14f8: ldr     r0, [sp, #20]
-   0x1fff14fa: movs    r7, #0
-   0x1fff14fc: cmp     r0, #0
-   0x1fff14fe: beq.n   0x1fff1508
-   0x1fff1500: b.n     0x1fff150e
-   0x1fff1502: mov     r5, r4
-   0x1fff1504: adds    r0, r0, #1
-   0x1fff1506: b.n     0x1fff14e0
-   0x1fff1508: ldr     r0, [sp, #12]
-   0x1fff150a: cmp     r0, #1
-   0x1fff150c: beq.n   0x1fff1532
-   0x1fff150e: cmp     r5, #0
-   0x1fff1510: bne.n   0x1fff1518
-   0x1fff1512: ldr     r0, [sp, #12]
-   0x1fff1514: cmp     r0, #1
-   0x1fff1516: beq.n   0x1fff1532
-   0x1fff1518: ldr     r1, [sp, #32]
-   0x1fff151a: movs    r0, #0
-   0x1fff151c: str     r0, [r1, #0]
-   0x1fff151e: ldr     r0, [sp, #12]
-   0x1fff1520: cmp     r0, #0
-   0x1fff1522: beq.n   0x1fff1544
-   0x1fff1524: mov     r4, r5
-   0x1fff1526: str     r6, [sp, #16]
-   0x1fff1528: ldr     r0, [sp, #28]
-   0x1fff152a: ldr     r2, [pc, #200]  ; (0x1fff15f4)
-   0x1fff152c: ldr     r0, [r0, #0]
-   0x1fff152e: muls    r0, r4
-   0x1fff1530: b.n     0x1fff155a
-   0x1fff1532: movs    r0, #1
-   0x1fff1534: movs    r4, #0
-   0x1fff1536: str     r0, [sp, #16]
-   0x1fff1538: ldr     r1, [sp, #32]
-   0x1fff153a: movs    r0, #3
-   0x1fff153c: str     r0, [r1, #0]
-   0x1fff153e: ldr     r0, [sp, #28]
-   0x1fff1540: ldr     r1, [r0, #0]
-   0x1fff1542: b.n     0x1fff154e
-   0x1fff1544: cmp     r4, #1
-   0x1fff1546: bne.n   0x1fff1528
-   0x1fff1548: ldr     r0, [sp, #28]
-   0x1fff154a: movs    r4, #0
-   0x1fff154c: ldr     r1, [r0, #4]
-   0x1fff154e: ldr     r0, [sp, #32]
-   0x1fff1550: str     r1, [r0, #4]
-   0x1fff1552: b.n     0x1fff156e
-   0x1fff1554: adds    r7, r7, #1
-   0x1fff1556: cmp     r7, #4
-   0x1fff1558: beq.n   0x1fff1564
-   0x1fff155a: mov     r1, r0
-   0x1fff155c: lsls    r1, r7
-   0x1fff155e: lsls    r1, r1, #1
-   0x1fff1560: cmp     r1, r2
-   0x1fff1562: bcc.n   0x1fff1554
-   0x1fff1564: ldr     r1, [sp, #16]
-   0x1fff1566: bl      0x1fff18a0
-   0x1fff156a: ldr     r1, [sp, #32]
-   0x1fff156c: str     r0, [r1, #4]
-   0x1fff156e: ldr     r1, [pc, #136]  ; (0x1fff15f8)
-   0x1fff1570: ldr     r0, [sp, #16]
-   0x1fff1572: str     r0, [r1, #56]   ; 0x38
-   0x1fff1574: ldr     r3, [pc, #132]  ; (0x1fff15fc)
-   0x1fff1576: movs    r5, #128        ; 0x80
-   0x1fff1578: ldr     r0, [r3, #56]   ; 0x38
-   0x1fff157a: cmp     r4, #0
-   0x1fff157c: beq.n   0x1fff1596
-   0x1fff157e: bics    r0, r5
-   0x1fff1580: str     r0, [r3, #56]   ; 0x38
-   0x1fff1582: lsls    r0, r7, #5
-   0x1fff1584: subs    r4, r4, #1
-   0x1fff1586: orrs    r0, r4
-   0x1fff1588: ldr     r4, [pc, #108]  ; (0x1fff15f8)
-   0x1fff158a: subs    r4, #64 ; 0x40
-   0x1fff158c: str     r0, [r4, #8]
-   0x1fff158e: ldr     r0, [sp, #28]
-   0x1fff1590: ldr     r2, [r0, #12]
-   0x1fff1592: adds    r0, r2, #1
-   0x1fff1594: b.n     0x1fff15a2
-   0x1fff1596: orrs    r0, r5
-   0x1fff1598: str     r0, [r3, #56]   ; 0x38
-   0x1fff159a: b.n     0x1fff143a
-   0x1fff159c: cmp     r2, #0
-   0x1fff159e: beq.n   0x1fff15a2
-   0x1fff15a0: subs    r0, r0, #1
-   0x1fff15a2: ldr     r6, [r4, #12]
-   0x1fff15a4: lsls    r6, r6, #31
-   0x1fff15a6: bne.n   0x1fff15ac
-   0x1fff15a8: cmp     r0, #0
-   0x1fff15aa: bne.n   0x1fff159c
-   0x1fff15ac: ldr     r0, [r4, #12]
-   0x1fff15ae: lsls    r0, r0, #31
-   0x1fff15b0: beq.n   0x1fff15c8
-   0x1fff15b2: movs    r0, #3
-   0x1fff15b4: str     r0, [r1, #48]   ; 0x30
-   0x1fff15b6: movs    r0, #1
-   0x1fff15b8: str     r0, [r1, #52]   ; 0x34
-   0x1fff15ba: movs    r2, #0
-   0x1fff15bc: str     r2, [r1, #52]   ; 0x34
-   0x1fff15be: str     r0, [r1, #52]   ; 0x34
-   0x1fff15c0: ldr     r0, [r1, #52]   ; 0x34
-   0x1fff15c2: lsls    r0, r0, #31
-   0x1fff15c4: beq.n   0x1fff15c0
-   0x1fff15c6: b.n     0x1fff143a
-   0x1fff15c8: ldr     r0, [r3, #56]   ; 0x38
-   0x1fff15ca: orrs    r0, r5
-   0x1fff15cc: str     r0, [r3, #56]   ; 0x38
-   0x1fff15ce: ldr     r0, [sp, #32]
-   0x1fff15d0: movs    r2, #4
-   0x1fff15d2: str     r2, [r0, #0]
-   0x1fff15d4: movs    r0, #1
-   0x1fff15d6: str     r0, [r1, #56]   ; 0x38
-   0x1fff15d8: ldr     r0, [sp, #28]
-   0x1fff15da: ldr     r1, [r0, #0]
-   0x1fff15dc: ldr     r0, [sp, #32]
-   0x1fff15de: str     r1, [r0, #4]
-   0x1fff15e0: b.n     0x1fff143a
-   0x1fff15e2: movs    r0, r0
-   0x1fff15e4: stmia   r0!, {}
-   0x1fff15e6: ands    r3, r0
-   0x1fff15e8: lsls    r4, r6, #23
-   0x1fff15ea: movs    r0, r0
-   0x1fff15ec: bhi.n   0x1fff15d0
-   0x1fff15ee:                 ; <UNDEFINED> instruction: 0xffff3a99
-   0x1fff15f2: movs    r0, r0
-   0x1fff15f4: str     r0, [r4, #20]
-   0x1fff15f6: movs    r2, r0
-   0x1fff15f8: strh    r0, [r0, #2]
-   0x1fff15fa: ands    r4, r0
-   0x1fff15fc: strh    r0, [r0, #16]
-   0x1fff15fe: ands    r4, r0
-
-       Reset stuff in preparation for starting application
-       {
-
-   0x1fff1600: ldr     r1, [pc, #244]  ; (0x1fff16f8)  c0de0000
-   0x1fff1602: uxth    r0, r0
-   0x1fff1604: orrs    r0, r1
-   0x1fff1606: ldr     r1, [pc, #244]  ; (0x1fff16fc)  40048200        SCB + 0x200
-   0x1fff1608: str     r0, [r1, #36]   ; 0x24                          (SCB + 0x224)
-   0x1fff160a: ldr     r0, [pc, #244]  ; (0x1fff1700)  4003c000        flash controller
-   0x1fff160c: ldr     r0, [r0, #0]
-   0x1fff160e: bx      lr
-
-       }
-
-
-   0x1fff1610: movs    r1, #96 ; 0x60
-   0x1fff1612: orrs    r0, r1
-   0x1fff1614: b.n     0x1fff1600
-   0x1fff1616: ldr     r0, [pc, #228]  ; (0x1fff16fc)
-   0x1fff1618: ldr     r0, [r0, #36]   ; 0x24
-   0x1fff161a: bx      lr
-
-       }
-       
-       {
-
-   0x1fff161c: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff161e: mov     r2, r0
-   0x1fff1620: ldr     r0, [pc, #216]  ; (0x1fff16fc)
-   0x1fff1622: mov     r4, r1
-   0x1fff1624: ldr     r0, [r0, #36]   ; 0x24
-   0x1fff1626: str     r0, [sp, #0]
-   0x1fff1628: bl      0x1fff1610
-   0x1fff162c: ldr     r3, [pc, #208]  ; (0x1fff1700)
-   0x1fff162e: ldr     r0, [r3, #0]
-   0x1fff1630: movs    r1, #64 ; 0x40
-   0x1fff1632: orrs    r0, r1
-   0x1fff1634: str     r0, [r3, #0]
-   0x1fff1636: ldr     r0, [pc, #208]  ; (0x1fff1708)
-   0x1fff1638: ldr     r1, [pc, #200]  ; (0x1fff1704)
-   0x1fff163a: str     r1, [r0, #16]
-   0x1fff163c: ldr     r5, [pc, #204]  ; (0x1fff170c)
-   0x1fff163e: movs    r1, #125        ; 0x7d
-   0x1fff1640: ldr     r0, [r2, #0]
-   0x1fff1642: lsls    r1, r1, #3
-   0x1fff1644: ldr     r5, [r5, #0]
-   0x1fff1646: muls    r1, r0
-   0x1fff1648: cmp     r1, r5
-   0x1fff164a: bhi.n   0x1fff165c
-   0x1fff164c: cmp     r0, #0
-   0x1fff164e: beq.n   0x1fff165c
-   0x1fff1650: ldr     r0, [r2, #4]
-   0x1fff1652: cmp     r0, #3
-   0x1fff1654: bls.n   0x1fff1660
-   0x1fff1656: movs    r0, #2
-   0x1fff1658: str     r0, [r4, #0]
-   0x1fff165a: b.n     0x1fff16e2
-   0x1fff165c: movs    r0, #1
-   0x1fff165e: b.n     0x1fff1658
-   0x1fff1660: movs    r0, #0
-   0x1fff1662: str     r0, [r4, #0]
-   0x1fff1664: ldr     r4, [pc, #148]  ; (0x1fff16fc)
-   0x1fff1666: subs    r4, #192        ; 0xc0
-   0x1fff1668: ldr     r1, [r4, #32]
-   0x1fff166a: str     r0, [r4, #32]
-   0x1fff166c: uxtb    r1, r1
-   0x1fff166e: mov     r12, r1
-   0x1fff1670: ldr     r0, [r3, #16]
-   0x1fff1672: lsrs    r0, r0, #8
-   0x1fff1674: lsls    r0, r0, #8
-   0x1fff1676: adds    r0, r0, #2
-   0x1fff1678: str     r0, [r3, #16]
-   0x1fff167a: ldr     r0, [r3, #0]
-   0x1fff167c: ldr     r7, [pc, #144]  ; (0x1fff1710)
-   0x1fff167e: ands    r0, r7
-   0x1fff1680: str     r0, [r3, #0]
-   0x1fff1682: ldr     r0, [r2, #4]
-   0x1fff1684: cmp     r0, #0
-   0x1fff1686: beq.n   0x1fff16ce
-   0x1fff1688: ldr     r1, [r2, #0]
-   0x1fff168a: movs    r5, #6
-   0x1fff168c: muls    r1, r5
-   0x1fff168e: ldr     r5, [pc, #132]  ; (0x1fff1714)
-   0x1fff1690: lsls    r0, r0, #1
-   0x1fff1692: adds    r1, r1, r5
-   0x1fff1694: adds    r0, r1, r0
-   0x1fff1696: subs    r0, #8
-   0x1fff1698: ldrb    r1, [r0, #0]
-   0x1fff169a: ldrb    r0, [r0, #1]
-   0x1fff169c: str     r0, [r4, #32]
-   0x1fff169e: ldr     r5, [r3, #16]
-   0x1fff16a0: movs    r4, #3
-   0x1fff16a2: lsls    r4, r4, #14
-   0x1fff16a4: bics    r5, r4
-   0x1fff16a6: lsrs    r4, r1, #4
-   0x1fff16a8: ldr     r6, [pc, #108]  ; (0x1fff1718)
-   0x1fff16aa: lsls    r4, r4, #1
-   0x1fff16ac: ldrh    r6, [r6, r4]
-   0x1fff16ae: orrs    r5, r6
-   0x1fff16b0: str     r5, [r3, #16]
-   0x1fff16b2: ldr     r5, [r3, #0]
-   0x1fff16b4: ldr     r6, [pc, #96]   ; (0x1fff1718)
-   0x1fff16b6: ands    r5, r7
-   0x1fff16b8: subs    r6, #12
-   0x1fff16ba: ldrh    r4, [r6, r4]
-   0x1fff16bc: orrs    r5, r4
-   0x1fff16be: str     r5, [r3, #0]
-   0x1fff16c0: ldr     r4, [r3, #16]
-   0x1fff16c2: lsls    r1, r1, #28
-   0x1fff16c4: lsrs    r4, r4, #8
-   0x1fff16c6: lsls    r4, r4, #8
-   0x1fff16c8: lsrs    r1, r1, #28
-   0x1fff16ca: orrs    r4, r1
-   0x1fff16cc: str     r4, [r3, #16]
-   0x1fff16ce: cmp     r12, r0
-   0x1fff16d0: bls.n   0x1fff16e2
-   0x1fff16d2: ldr     r1, [r2, #8]
-   0x1fff16d4: movs    r0, #0
-   0x1fff16d6: movs    r2, #25
-   0x1fff16d8: muls    r1, r2
-   0x1fff16da: b.n     0x1fff16de
-
-   0x1fff16dc: adds    r0, r0, #1
-   0x1fff16de: cmp     r1, r0
-   0x1fff16e0: bhi.n   0x1fff16dc
-   0x1fff16e2: ldr     r0, [pc, #36]   ; (0x1fff1708)
-   0x1fff16e4: movs    r1, #0
-   0x1fff16e6: str     r1, [r0, #16]
-   0x1fff16e8: ldr     r0, [r3, #0]
-   0x1fff16ea: movs    r1, #64 ; 0x40
-   0x1fff16ec: bics    r0, r1
-   0x1fff16ee: str     r0, [r3, #0]
-   0x1fff16f0: ldr     r0, [sp, #0]
-   0x1fff16f2: bl      0x1fff1600
-   0x1fff16f6: pop     {r3, r4, r5, r6, r7, pc}
-
-0x1fff16f0:    0xf7ff9800      0xbdf8ff85      0xc0de0000      0x40048200
-0x1fff1700:    0x4003c000      0x12345678      0x400483c0      0x000005f4
-0x1fff1710:    0xffffdfef      0x00000680      0x1fff1f80      0x1c04b510
-
-   0x1fff16f8: movs    r0, r0
-   0x1fff16fa: stmia   r0!, {r1, r2, r3, r4, r6, r7}
-   0x1fff16fc: strh    r0, [r0, #16]
-   0x1fff16fe: ands    r4, r0
-   0x1fff1700: stmia   r0!, {}
-   0x1fff1702: ands    r3, r0
-   0x1fff1704: ldrsb   r0, [r7, r1]
-   0x1fff1706: asrs    r4, r6, #8
-   0x1fff1708: strh    r0, [r0, #30]
-   0x1fff170a: ands    r4, r0
-   0x1fff170c: lsls    r4, r6, #23
-   0x1fff170e: movs    r0, r0
-   0x1fff1710: svc     239     ; 0xef
-   0x1fff1712: vcvt.f<illegal width 64>.u<illegal width 64>    d16, d0
-   0x1fff1716: movs    r0, r0
-   0x1fff1718: subs    r0, r0, #6
-   0x1fff171a: subs    r7, r7, #7
-
-
-
-   0x1fff171c: push    {r4, lr}
-   0x1fff171e: adds    r4, r0, #0
-   0x1fff1720: adds    r0, r1, #0
-   0x1fff1722: adds    r1, r2, #0
-   0x1fff1724: bl      0x1fff173c
-   0x1fff1728: stmia   r4!, {r0, r1}
-   0x1fff172a: pop     {r4, pc}
-   0x1fff172c: push    {r4, lr}
-   0x1fff172e: adds    r4, r0, #0
-   0x1fff1730: adds    r0, r1, #0
-   0x1fff1732: adds    r1, r2, #0
-   0x1fff1734: bl      0x1fff1742
-   0x1fff1738: stmia   r4!, {r0, r1}
-   0x1fff173a: pop     {r4, pc}
-   0x1fff173c: adds    r3, r0, #0
-   0x1fff173e: orrs    r3, r1
-   0x1fff1740: bmi.n   0x1fff17d8
-   0x1fff1742: push    {r4, r5, lr}
-   0x1fff1744: mov     r12, r0
-   0x1fff1746: mov     lr, r1
-   0x1fff1748: subs    r2, r1, #1
-   0x1fff174a: bmi.n   0x1fff17cc
-   0x1fff174c: movs    r5, #30
-   0x1fff174e: lsrs    r2, r1, #15
-   0x1fff1750: bne.n   0x1fff1756
-   0x1fff1752: subs    r5, #16
-   0x1fff1754: lsls    r1, r1, #16
-   0x1fff1756: lsrs    r2, r1, #23
-   0x1fff1758: bne.n   0x1fff175e
-   0x1fff175a: subs    r5, #8
-   0x1fff175c: lsls    r1, r1, #8
-   0x1fff175e: lsrs    r2, r1, #27
-   0x1fff1760: bne.n   0x1fff1768
-   0x1fff1762: subs    r5, #4
-   0x1fff1764: lsls    r1, r1, #4
-   0x1fff1766: lsrs    r2, r1, #27
-   0x1fff1768: add     r3, pc, #160    ; (adr r3, 0x1fff180c)
-   0x1fff176a: ldrb    r2, [r3, r2]
-   0x1fff176c: subs    r5, r5, r2
-   0x1fff176e: lsls    r1, r2
-   0x1fff1770: subs    r3, #111        ; 0x6f
-   0x1fff1772: lsrs    r2, r1, #23
-   0x1fff1774: ldrb    r3, [r3, r2]
-   0x1fff1776: adds    r3, #255        ; 0xff
-   0x1fff1778: lsrs    r2, r1, #10
-   0x1fff177a: muls    r2, r3
-   0x1fff177c: asrs    r2, r2, #6
-   0x1fff177e: muls    r2, r3
-   0x1fff1780: lsls    r3, r3, #24
-   0x1fff1782: subs    r3, r3, r2
-   0x1fff1784: lsrs    r3, r3, #15
-   0x1fff1786: subs    r3, #1
-   0x1fff1788: lsrs    r2, r0, #17
-   0x1fff178a: muls    r2, r3
-   0x1fff178c: lsrs    r2, r2, #21
-   0x1fff178e: lsls    r4, r2, #11
-   0x1fff1790: lsls    r0, r0, #9
-   0x1fff1792: muls    r2, r1
-   0x1fff1794: subs    r0, r0, r2
-   0x1fff1796: lsrs    r2, r0, #16
-   0x1fff1798: muls    r2, r3
-   0x1fff179a: lsrs    r2, r2, #20
-   0x1fff179c: add     r4, r2
-   0x1fff179e: lsls    r4, r4, #10
-   0x1fff17a0: lsls    r0, r0, #11
-   0x1fff17a2: muls    r2, r1
-   0x1fff17a4: subs    r0, r0, r2
-   0x1fff17a6: lsrs    r2, r0, #16
-   0x1fff17a8: muls    r2, r3
-   0x1fff17aa: lsrs    r2, r2, #21
-   0x1fff17ac: add     r4, r2
-   0x1fff17ae: lsls    r0, r0, #10
-   0x1fff17b0: muls    r2, r1
-   0x1fff17b2: subs    r0, r0, r2
-   0x1fff17b4: movs    r2, #0
-   0x1fff17b6: cmp     r0, r1
-   0x1fff17b8: adcs    r4, r2
-   0x1fff17ba: lsrs    r4, r5
-   0x1fff17bc: asrs    r5, r5, #8
-   0x1fff17be: eors    r4, r5
-   0x1fff17c0: subs    r0, r4, r5
-   0x1fff17c2: mov     r1, lr
-   0x1fff17c4: muls    r1, r0
-   0x1fff17c6: mov     r2, r12
-   0x1fff17c8: subs    r1, r2, r1
-   0x1fff17ca: pop     {r4, r5, pc}
-   0x1fff17cc: cmp     r1, #0
-   0x1fff17ce: beq.n   0x1fff17f4
-   0x1fff17d0: movs    r4, #0
-   0x1fff17d2: cmp     r0, r1
-   0x1fff17d4: adcs    r4, r4
-   0x1fff17d6: b.n     0x1fff17bc
-   0x1fff17d8: push    {r4, r5, lr}
-   0x1fff17da: mov     r12, r0
-   0x1fff17dc: mov     lr, r1
-   0x1fff17de: asrs    r5, r1, #31
-   0x1fff17e0: eors    r1, r5
-   0x1fff17e2: subs    r1, r1, r5
-   0x1fff17e4: asrs    r2, r0, #31
-   0x1fff17e6: eors    r0, r2
-   0x1fff17e8: subs    r0, r0, r2
-   0x1fff17ea: eors    r5, r2
-   0x1fff17ec: lsls    r5, r5, #8
-   0x1fff17ee: adds    r5, #30
-   0x1fff17f0: cmp     r1, #0
-   0x1fff17f2: bne.n   0x1fff174e
-   0x1fff17f4: movs    r0, #0
-   0x1fff17f6: pop     {r4, r5, pc}
-   0x1fff17f8: strh    r3, [r0, r1]
-   0x1fff17fa: ldrsh   r4, [r2, r5]
-   0x1fff17fc: ldr     r1, [pc, #272]  ; (0x1fff1910)
-   0x1fff17fe: ldr     r1, [pc, #344]  ; (0x1fff1958)
-   0x1fff1800: cmp     r4, r8
-   0x1fff1802: strh    r7, [r3, r1]
-   0x1fff1804: ldr     r5, [pc, #316]  ; (0x1fff1944)
-   0x1fff1806: movs    r0, #32
-   0x1fff1808: movs    r1, r0
-   0x1fff180a: movs    r0, r0
-   0x1fff180c: lsls    r0, r0, #12
-   0x1fff180e: lsls    r2, r0, #8
-   0x1fff1810: lsls    r1, r0, #4
-   0x1fff1812: lsls    r1, r0, #4
-   0x1fff1814: movs    r0, r0
-   0x1fff1816: movs    r0, r0
-   0x1fff1818: movs    r0, r0
-   0x1fff181a: movs    r0, r0
-   0x1fff181c: vaba.u8 <illegal reg q7.5>, q8, <illegal reg q13.5>
-   0x1fff1820: blx     0x200e49fc
-   0x1fff1824: b.n     0x1fff1bf2
-   0x1fff1826: bge.n   0x1fff17e6
-   0x1fff1828: bcc.n   0x1fff17da
-   0x1fff182a: ldmia   r5!, {r4, r6, r7}
-   0x1fff182c: stmia   r7!, {r1, r3, r6, r7}
-   0x1fff182e: stmia   r0!, {r0, r1, r6, r7}
-   0x1fff1830: hlt     0x003d
-   0x1fff1832: push    {r0, r1, r2, r4, r5, r7}
-   0x1fff1834: add     r7, sp, #712    ; 0x2c8
-   0x1fff1836: add     r1, sp, #688    ; 0x2b0
-   0x1fff1838: add     r4, pc, #664    ; (adr r4, 0x1fff1ad4)
-   0x1fff183a: ldr     r6, [sp, #644]  ; 0x284
-   0x1fff183c: ldr     r1, [sp, #624]  ; 0x270
-   0x1fff183e: str     r4, [sp, #604]  ; 0x25c
-   0x1fff1840: ldrh    r2, [r2, #60]   ; 0x3c
-   0x1fff1842: ldrh    r5, [r1, #28]
-   0x1fff1844: strh    r0, [r1, #52]   ; 0x34
-   0x1fff1846: strh    r4, [r0, #12]
-   0x1fff1848: ldrb    r7, [r7, #21]
-   0x1fff184a: ldrb    r3, [r7, #5]
-   0x1fff184c: strb    r6, [r6, #17]
-   0x1fff184e: strb    r2, [r6, #1]
-   0x1fff1850: ldr     r6, [r5, #68]   ; 0x44
-   0x1fff1852: ldr     r2, [r5, #4]
-   0x1fff1854: str     r6, [r4, #68]   ; 0x44
-   0x1fff1856: str     r2, [r4, #4]
-   0x1fff1858: ldrb    r7, [r3, r5]
-   0x1fff185a: ldr     r3, [r3, r5]
-   0x1fff185c: ldrsb   r7, [r2, r1]
-   0x1fff185e: strh    r4, [r2, r1]
-   0x1fff1860: ldr     r7, [pc, #320]  ; (0x1fff19a4)
-   0x1fff1862: ldr     r3, [pc, #308]  ; (0x1fff1998)
-   0x1fff1864: ldr     r0, [pc, #296]  ; (0x1fff1990)
-   0x1fff1866: cmp     r6, r8
-   0x1fff1868: adcs    r3, r0
-   0x1fff186a: subs    r6, #64 ; 0x40
-   0x1fff186c: subs    r3, #61 ; 0x3d
-   0x1fff186e: subs    r0, #58 ; 0x3a
-   0x1fff1870: adds    r5, #55 ; 0x37
-   0x1fff1872: adds    r3, #52 ; 0x34
-   0x1fff1874: adds    r0, #49 ; 0x31
-   0x1fff1876: cmp     r5, #46 ; 0x2e
-   0x1fff1878: cmp     r2, #44 ; 0x2c
-   0x1fff187a: cmp     r0, #41 ; 0x29
-   0x1fff187c: movs    r5, #38 ; 0x26
-   0x1fff187e: movs    r2, #36 ; 0x24
-   0x1fff1880: movs    r0, #33 ; 0x21
-   0x1fff1882: adds    r7, r3, #4
-   0x1fff1884: subs    r4, r3, r4
-   0x1fff1886: adds    r2, r3, r0
-   0x1fff1888: asrs    r7, r2, #24
-   0x1fff188a: asrs    r5, r2, #16
-   0x1fff188c: asrs    r3, r2, #4
-   0x1fff188e: lsrs    r0, r2, #28
-   0x1fff1890: lsrs    r6, r1, #20
-   0x1fff1892: lsrs    r4, r1, #12
-   0x1fff1894: lsrs    r2, r1, #4
-   0x1fff1896: lsls    r0, r1, #28
-   0x1fff1898: lsls    r6, r0, #20
-   0x1fff189a: lsls    r4, r0, #12
-   0x1fff189c: lsls    r1, r0, #4
-   0x1fff189e: nop                     ; (mov r8, r8)
-   0x1fff18a0: push    {r4, r5, lr}
-   0x1fff18a2: mov     r3, r1
-   0x1fff18a4: mov     r1, r0
-   0x1fff18a6: movs    r0, #0
-   0x1fff18a8: movs    r2, #32
-   0x1fff18aa: movs    r4, #1
-   0x1fff18ac: b.n     0x1fff18c2
-   0x1fff18ae: mov     r5, r1
-   0x1fff18b0: lsrs    r5, r2
-   0x1fff18b2: cmp     r5, r3
-   0x1fff18b4: bcc.n   0x1fff18c2
-   0x1fff18b6: mov     r5, r3
-   0x1fff18b8: lsls    r5, r2
-   0x1fff18ba: subs    r1, r1, r5
-   0x1fff18bc: mov     r5, r4
-   0x1fff18be: lsls    r5, r2
-   0x1fff18c0: adds    r0, r0, r5
-   0x1fff18c2: mov     r5, r2
-   0x1fff18c4: subs    r2, r2, #1
-   0x1fff18c6: cmp     r5, #0
-   0x1fff18c8: bgt.n   0x1fff18ae
-   0x1fff18ca: pop     {r4, r5, pc}
-   0x1fff18cc: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff18ce: ldr     r5, [pc, #208]  ; (0x1fff19a0)
-   0x1fff18d0: mov     r7, r0
-   0x1fff18d2: mov     r4, r1
-   0x1fff18d4: ldr     r6, [r5, #0]
-   0x1fff18d6: bl      0x1fff1616
-   0x1fff18da: str     r0, [sp, #0]
-   0x1fff18dc: bl      0x1fff1610
-   0x1fff18e0: ldr     r3, [r7, #0]
-   0x1fff18e2: movs    r1, #0
-   0x1fff18e4: subs    r3, #50 ; 0x32
-   0x1fff18e6: movs    r0, #64 ; 0x40
-   0x1fff18e8: bl      0x1fff19b0
-   0x1fff18ec: lsrs    r5, r1, #32
-   0x1fff18ee: asrs    r5, r1, #8
-   0x1fff18f0: movs    r1, #23
-   0x1fff18f2: adds    r0, r7, #0
-   0x1fff18f4: movs    r6, #70 ; 0x46
-   0x1fff18f6: strh    r3, [r2, r5]
-   0x1fff18f8: ldr     r5, [pc, #292]  ; (0x1fff1a20)
-   0x1fff18fa: lsls    r3, r2, #1
-   0x1fff18fc: mov     r1, r4
-   0x1fff18fe: mov     r0, r7
-   0x1fff1900: bl      0x1fff1e00
-   0x1fff1904: b.n     0x1fff1996
-   0x1fff1906: mov     r1, r4
-   0x1fff1908: mov     r0, r7
-   0x1fff190a: bl      0x1fff1c62
-   0x1fff190e: b.n     0x1fff1996
-   0x1fff1910: mov     r1, r4
-   0x1fff1912: mov     r0, r7
-   0x1fff1914: bl      0x1fff1b30
-   0x1fff1918: b.n     0x1fff1996
-   0x1fff191a: mov     r1, r4
-   0x1fff191c: mov     r0, r7
-   0x1fff191e: bl      0x1fff1a04
-   0x1fff1922: b.n     0x1fff1996
-   0x1fff1924: mov     r1, r4
-   0x1fff1926: mov     r0, r7
-   0x1fff1928: bl      0x1fff1e8c
-   0x1fff192c: b.n     0x1fff1996
-   0x1fff192e: ldr     r0, [pc, #116]  ; (0x1fff19a4)
-   0x1fff1930: str     r1, [r4, #0]
-   0x1fff1932: ldr     r0, [r0, #52]   ; 0x34
-   0x1fff1934: str     r0, [r4, #4]
-   0x1fff1936: b.n     0x1fff1996
-   0x1fff1938: str     r1, [r4, #0]
-   0x1fff193a: ldr     r1, [r5, #0]
-   0x1fff193c: orrs    r1, r0
-   0x1fff193e: str     r1, [r5, #0]
-   0x1fff1940: ldr     r1, [pc, #100]  ; (0x1fff19a8)
-   0x1fff1942: ldr     r2, [r1, #0]
-   0x1fff1944: ldr     r2, [r2, #0]
-   0x1fff1946: str     r2, [r4, #4]
-   0x1fff1948: ldr     r2, [r1, #0]
-   0x1fff194a: ldr     r2, [r2, #4]
-   0x1fff194c: str     r2, [r4, #8]
-   0x1fff194e: ldr     r2, [r1, #0]
-   0x1fff1950: ldr     r2, [r2, #8]
-   0x1fff1952: str     r2, [r4, #12]
-   0x1fff1954: ldr     r1, [r1, #0]
-   0x1fff1956: ldr     r1, [r1, #12]
-   0x1fff1958: str     r1, [r4, #16]
-   0x1fff195a: b.n     0x1fff196a
-   0x1fff195c: str     r1, [r4, #0]
-   0x1fff195e: ldr     r1, [r5, #0]
-   0x1fff1960: orrs    r1, r0
-   0x1fff1962: str     r1, [r5, #0]
-   0x1fff1964: ldr     r1, [pc, #68]   ; (0x1fff19ac)
-   0x1fff1966: ldr     r1, [r1, #0]
-   0x1fff1968: str     r1, [r4, #4]
-   0x1fff196a: ldr     r1, [r5, #0]
-   0x1fff196c: bics    r1, r0
-   0x1fff196e: str     r1, [r5, #0]
-   0x1fff1970: ldr     r1, [r5, #0]
-   0x1fff1972: bics    r1, r0
-   0x1fff1974: str     r1, [r5, #0]
-   0x1fff1976: b.n     0x1fff1996
-   0x1fff1978: bl      0x1fff1e7e
-   0x1fff197c: b.n     0x1fff1996
-   0x1fff197e: mov     r2, r4
-   0x1fff1980: mov     r1, r7
-   0x1fff1982: movs    r0, #1
-   0x1fff1984: b.n     0x1fff198c
-   0x1fff1986: mov     r2, r4
-   0x1fff1988: mov     r1, r7
-   0x1fff198a: movs    r0, #0
-   0x1fff198c: bl      0x1fff1e3c
-   0x1fff1990: b.n     0x1fff1996
-   0x1fff1992: movs    r0, #1
-   0x1fff1994: str     r0, [r4, #0]
-   0x1fff1996: str     r6, [r5, #0]
-   0x1fff1998: ldr     r0, [sp, #0]
-   0x1fff199a: bl      0x1fff1600
-   0x1fff199e: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff19a0: stmia   r0!, {}
-   0x1fff19a2: ands    r3, r0
-   0x1fff19a4: strh    r0, [r0, #30]
-   0x1fff19a6: ands    r4, r0
-   0x1fff19a8: lsls    r4, r3, #23
-   0x1fff19aa: movs    r0, r0
-   0x1fff19ac: lsls    r4, r6, #16
-   0x1fff19ae: movs    r0, r0
-   0x1fff19b0: push    {r4, r5}
-   0x1fff19b2: mov     r4, lr
-   0x1fff19b4: subs    r4, r4, #1
-   0x1fff19b6: ldrb    r5, [r4, #0]
-   0x1fff19b8: adds    r4, r4, #1
-   0x1fff19ba: cmp     r3, r5
-   0x1fff19bc: bcs.n   0x1fff19c0
-   0x1fff19be: mov     r5, r3
-   0x1fff19c0: ldrb    r3, [r4, r5]
-   0x1fff19c2: lsls    r3, r3, #1
-   0x1fff19c4: adds    r3, r4, r3
-   0x1fff19c6: pop     {r4, r5}
-   0x1fff19c8: bx      r3
-   0x1fff19ca: vsli.32 d27, d16, #31
-   0x1fff19ce: ldr     r2, [pc, #1016] ; (0x1fff1dc8)
-   0x1fff19d0: ldr     r4, [r2, #0]
-   0x1fff19d2: movs    r3, #64 ; 0x40
-   0x1fff19d4: orrs    r4, r3
-   0x1fff19d6: str     r4, [r2, #0]
-   0x1fff19d8: ldr     r4, [pc, #1008] ; (0x1fff1dcc)
-   0x1fff19da: ldr     r5, [r4, #0]
-   0x1fff19dc: cmp     r0, r5
-   0x1fff19de: bhi.n   0x1fff19e4
-   0x1fff19e0: cmp     r1, r5
-   0x1fff19e2: bls.n   0x1fff19ec
-   0x1fff19e4: ldr     r0, [r2, #0]
-   0x1fff19e6: bics    r0, r3
-   0x1fff19e8: str     r0, [r2, #0]
-   0x1fff19ea: b.n     0x1fff19f6
-   0x1fff19ec: ldr     r4, [r2, #0]
-   0x1fff19ee: bics    r4, r3
-   0x1fff19f0: str     r4, [r2, #0]
-   0x1fff19f2: cmp     r0, r1
-   0x1fff19f4: bls.n   0x1fff19fa
-   0x1fff19f6: movs    r0, #7
-   0x1fff19f8: pop     {r4, r5, pc}
-   0x1fff19fa: ldr     r0, [r2, #0]
-   0x1fff19fc: bics    r0, r3
-   0x1fff19fe: str     r0, [r2, #0]
-   0x1fff1a00: movs    r0, #0
-   0x1fff1a02: pop     {r4, r5, pc}
-   0x1fff1a04: push    {r4, r5, r6, lr}
-   0x1fff1a06: mov     r4, r1
-   0x1fff1a08: mov     r5, r0
-   0x1fff1a0a: ldr     r1, [r0, #8]
-   0x1fff1a0c: ldr     r0, [r0, #4]
-   0x1fff1a0e: bl      0x1fff19cc
-   0x1fff1a12: str     r0, [r4, #0]
-   0x1fff1a14: cmp     r0, #0
-   0x1fff1a16: bne.n   0x1fff1a54
-   0x1fff1a18: ldr     r0, [pc, #940]  ; (0x1fff1dc8)
-   0x1fff1a1a: ldr     r1, [r0, #0]
-   0x1fff1a1c: movs    r6, #64 ; 0x40
-   0x1fff1a1e: orrs    r1, r6
-   0x1fff1a20: str     r1, [r0, #0]
-   0x1fff1a22: ldr     r1, [r5, #4]
-   0x1fff1a24: ldr     r3, [pc, #940]  ; (0x1fff1dd4)
-   0x1fff1a26: lsls    r2, r1, #2
-   0x1fff1a28: ldr     r1, [pc, #932]  ; (0x1fff1dd0)
-   0x1fff1a2a: ldr     r1, [r1, r2]
-   0x1fff1a2c: ldr     r2, [r5, #8]
-   0x1fff1a2e: ldr     r5, [r0, #0]
-   0x1fff1a30: lsls    r2, r2, #2
-   0x1fff1a32: ldr     r3, [r3, r2]
-   0x1fff1a34: mov     r2, r1
-   0x1fff1a36: bics    r5, r6
-   0x1fff1a38: str     r5, [r0, #0]
-   0x1fff1a3a: lsls    r0, r6, #9
-   0x1fff1a3c: b.n     0x1fff1a58
-   0x1fff1a3e: adds    r5, r2, r0
-   0x1fff1a40: ldr     r5, [r5, #0]
-   0x1fff1a42: adds    r5, r5, #1
-   0x1fff1a44: beq.n   0x1fff1a56
-   0x1fff1a46: movs    r3, #8
-   0x1fff1a48: subs    r1, r2, r1
-   0x1fff1a4a: str     r3, [r4, #0]
-   0x1fff1a4c: adds    r0, r2, r0
-   0x1fff1a4e: str     r1, [r4, #4]
-   0x1fff1a50: ldr     r0, [r0, #0]
-   0x1fff1a52: str     r0, [r4, #8]
-   0x1fff1a54: pop     {r4, r5, r6, pc}
-   0x1fff1a56: adds    r2, r2, #4
-   0x1fff1a58: cmp     r2, r3
-   0x1fff1a5a: bcc.n   0x1fff1a3e
-   0x1fff1a5c: movs    r0, #0
-   0x1fff1a5e: str     r0, [r4, #0]
-   0x1fff1a60: pop     {r4, r5, r6, pc}
-   0x1fff1a62: push    {r4, lr}
-   0x1fff1a64: ldr     r4, [sp, #8]
-   0x1fff1a66: str     r1, [r0, #0]
-   0x1fff1a68: cmp     r2, #0
-   0x1fff1a6a: beq.n   0x1fff1a76
-   0x1fff1a6c: str     r3, [r2, #0]
-   0x1fff1a6e: ldr     r0, [r2, #0]
-   0x1fff1a70: tst     r0, r3
-   0x1fff1a72: bne.n   0x1fff1a6e
-   0x1fff1a74: pop     {r4, pc}
-   0x1fff1a76: ldr     r0, [r4, #0]
-   0x1fff1a78: lsls    r0, r0, #29
-   0x1fff1a7a: beq.n   0x1fff1a76
-   0x1fff1a7c: pop     {r4, pc}
-   0x1fff1a7e: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff1a80: ldr     r7, [pc, #836]  ; (0x1fff1dc8)
-   0x1fff1a82: mov     r4, r0
-   0x1fff1a84: ldr     r0, [r7, #4]
-   0x1fff1a86: mov     r12, r1
-   0x1fff1a88: mov     r6, r2
-   0x1fff1a8a: movs    r5, #0
-   0x1fff1a8c: movs    r1, #5
-   0x1fff1a8e: bics    r1, r0
-   0x1fff1a90: beq.n   0x1fff1ac6
-   0x1fff1a92: movs    r0, #11
-   0x1fff1a94: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1a96: movs    r0, #1
-   0x1fff1a98: lsls    r0, r4
-   0x1fff1a9a: orrs    r5, r0
-   0x1fff1a9c: ldr     r1, [r7, #0]
-   0x1fff1a9e: mov     r0, r7
-   0x1fff1aa0: movs    r3, #64 ; 0x40
-   0x1fff1aa2: orrs    r1, r3
-   0x1fff1aa4: str     r1, [r7, #0]
-   0x1fff1aa6: ldr     r2, [pc, #808]  ; (0x1fff1dd0)
-   0x1fff1aa8: lsls    r1, r4, #2
-   0x1fff1aaa: ldr     r1, [r2, r1]
-   0x1fff1aac: lsls    r2, r3, #9
-   0x1fff1aae: adds    r2, r1, r2
-   0x1fff1ab0: ldr     r1, [r7, #0]
-   0x1fff1ab2: bics    r1, r3
-   0x1fff1ab4: str     r1, [r7, #0]
-   0x1fff1ab6: str     r6, [r2, #0]
-   0x1fff1ab8: movs    r3, #0
-   0x1fff1aba: mov     r2, r3
-   0x1fff1abc: ldr     r1, [pc, #792]  ; (0x1fff1dd8)
-   0x1fff1abe: str     r7, [sp, #0]
-   0x1fff1ac0: bl      0x1fff1a62
-   0x1fff1ac4: adds    r4, r4, #1
-   0x1fff1ac6: cmp     r4, r12
-   0x1fff1ac8: bls.n   0x1fff1a96
-   0x1fff1aca: ldr     r0, [r7, #0]
-   0x1fff1acc: movs    r2, #64 ; 0x40
-   0x1fff1ace: orrs    r0, r2
-   0x1fff1ad0: str     r0, [r7, #0]
-   0x1fff1ad2: ldr     r0, [pc, #776]  ; (0x1fff1ddc)
-   0x1fff1ad4: ldr     r0, [r0, #0]
-   0x1fff1ad6: subs    r0, #63 ; 0x3f
-   0x1fff1ad8: cmp     r6, #0
-   0x1fff1ada: bne.n   0x1fff1ae2
-   0x1fff1adc: ldr     r1, [r0, #60]   ; 0x3c
-   0x1fff1ade: bics    r1, r5
-   0x1fff1ae0: str     r1, [r0, #60]   ; 0x3c
-   0x1fff1ae2: adds    r6, r6, #1
-   0x1fff1ae4: bne.n   0x1fff1aec
-   0x1fff1ae6: ldr     r1, [r0, #60]   ; 0x3c
-   0x1fff1ae8: orrs    r1, r5
-   0x1fff1aea: str     r1, [r0, #60]   ; 0x3c
-   0x1fff1aec: ldr     r0, [r7, #0]
-   0x1fff1aee: bics    r0, r2
-   0x1fff1af0: str     r0, [r7, #0]
-   0x1fff1af2: movs    r0, #0
-   0x1fff1af4: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1af6: push    {r4, lr}
-   0x1fff1af8: movs    r2, #0
-   0x1fff1afa: movs    r4, #1
-   0x1fff1afc: b.n     0x1fff1b06
-   0x1fff1afe: mov     r3, r4
-   0x1fff1b00: lsls    r3, r0
-   0x1fff1b02: orrs    r2, r3
-   0x1fff1b04: adds    r0, r0, #1
-   0x1fff1b06: cmp     r0, r1
-   0x1fff1b08: bls.n   0x1fff1afe
-   0x1fff1b0a: ldr     r0, [pc, #700]  ; (0x1fff1dc8)
-   0x1fff1b0c: ldr     r1, [r0, #0]
-   0x1fff1b0e: movs    r3, #64 ; 0x40
-   0x1fff1b10: orrs    r1, r3
-   0x1fff1b12: str     r1, [r0, #0]
-   0x1fff1b14: ldr     r1, [pc, #708]  ; (0x1fff1ddc)
-   0x1fff1b16: ldr     r1, [r1, #0]
-   0x1fff1b18: subs    r1, #63 ; 0x3f
-   0x1fff1b1a: ldr     r1, [r1, #60]   ; 0x3c
-   0x1fff1b1c: ands    r1, r2
-   0x1fff1b1e: ldr     r2, [r0, #0]
-   0x1fff1b20: bics    r2, r3
-   0x1fff1b22: str     r2, [r0, #0]
-   0x1fff1b24: cmp     r1, #0
-   0x1fff1b26: beq.n   0x1fff1b2c
-   0x1fff1b28: movs    r0, #9
-   0x1fff1b2a: pop     {r4, pc}
-   0x1fff1b2c: movs    r0, #0
-   0x1fff1b2e: pop     {r4, pc}
-   0x1fff1b30: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff1b32: mov     r6, r1
-   0x1fff1b34: mov     r4, r0
-   0x1fff1b36: ldr     r1, [r0, #8]
-   0x1fff1b38: ldr     r0, [r0, #4]
-   0x1fff1b3a: bl      0x1fff19cc
-   0x1fff1b3e: str     r0, [r6, #0]
-   0x1fff1b40: cmp     r0, #0
-   0x1fff1b42: bne.n   0x1fff1c26
-   0x1fff1b44: ldr     r1, [r4, #8]
-   0x1fff1b46: ldr     r0, [r4, #4]
-   0x1fff1b48: bl      0x1fff1af6
-   0x1fff1b4c: str     r0, [r6, #0]
-   0x1fff1b4e: cmp     r0, #0
-   0x1fff1b50: bne.n   0x1fff1c26
-   0x1fff1b52: ldr     r5, [pc, #628]  ; (0x1fff1dc8)
-   0x1fff1b54: ldr     r0, [r5, #0]
-   0x1fff1b56: movs    r1, #64 ; 0x40
-   0x1fff1b58: orrs    r0, r1
-   0x1fff1b5a: str     r0, [r5, #0]
-   0x1fff1b5c: ldr     r1, [pc, #640]  ; (0x1fff1de0)
-   0x1fff1b5e: ldr     r0, [r4, #12]
-   0x1fff1b60: ldr     r1, [r1, #0]
-   0x1fff1b62: bl      0x1fff18a0
-   0x1fff1b66: str     r0, [r5, #28]
-   0x1fff1b68: ldr     r1, [pc, #632]  ; (0x1fff1de4)
-   0x1fff1b6a: ldr     r0, [r4, #12]
-   0x1fff1b6c: ldr     r1, [r1, #0]
-   0x1fff1b6e: muls    r0, r1
-   0x1fff1b70: lsrs    r0, r0, #9
-   0x1fff1b72: adds    r0, r0, #3
-   0x1fff1b74: movs    r1, #1
-   0x1fff1b76: lsls    r1, r1, #15
-   0x1fff1b78: orrs    r0, r1
-   0x1fff1b7a: str     r0, [r5, #8]
-   0x1fff1b7c: ldr     r7, [r4, #4]
-   0x1fff1b7e: ldr     r0, [r4, #8]
-   0x1fff1b80: cmp     r7, r0
-   0x1fff1b82: bne.n   0x1fff1bb4
-   0x1fff1b84: b.n     0x1fff1bbc
-   0x1fff1b86: ldr     r1, [r5, #0]
-   0x1fff1b88: mov     r0, r5
-   0x1fff1b8a: movs    r2, #64 ; 0x40
-   0x1fff1b8c: orrs    r1, r2
-   0x1fff1b8e: str     r1, [r5, #0]
-   0x1fff1b90: ldr     r1, [pc, #572]  ; (0x1fff1dd0)
-   0x1fff1b92: lsls    r3, r7, #2
-   0x1fff1b94: ldr     r3, [r1, r3]
-   0x1fff1b96: lsls    r1, r2, #9
-   0x1fff1b98: adds    r1, r3, r1
-   0x1fff1b9a: ldr     r3, [r5, #0]
-   0x1fff1b9c: bics    r3, r2
-   0x1fff1b9e: str     r3, [r5, #0]
-   0x1fff1ba0: movs    r2, #1
-   0x1fff1ba2: str     r2, [r1, #0]
-   0x1fff1ba4: ldr     r1, [pc, #560]  ; (0x1fff1dd8)
-   0x1fff1ba6: movs    r3, #0
-   0x1fff1ba8: mov     r2, r3
-   0x1fff1baa: subs    r1, r1, #2
-   0x1fff1bac: str     r5, [sp, #0]
-   0x1fff1bae: bl      0x1fff1a62
-   0x1fff1bb2: adds    r7, r7, #1
-   0x1fff1bb4: ldr     r0, [r4, #8]
-   0x1fff1bb6: subs    r0, r0, #1
-   0x1fff1bb8: cmp     r0, r7
-   0x1fff1bba: bcs.n   0x1fff1b86
-   0x1fff1bbc: ldr     r0, [r5, #0]
-   0x1fff1bbe: movs    r1, #64 ; 0x40
-   0x1fff1bc0: orrs    r0, r1
-   0x1fff1bc2: str     r0, [r5, #0]
-   0x1fff1bc4: ldr     r0, [r4, #8]
-   0x1fff1bc6: lsls    r2, r0, #2
-   0x1fff1bc8: ldr     r0, [pc, #516]  ; (0x1fff1dd0)
-   0x1fff1bca: ldr     r2, [r0, r2]
-   0x1fff1bcc: lsls    r0, r1, #9
-   0x1fff1bce: adds    r0, r2, r0
-   0x1fff1bd0: ldr     r2, [r5, #0]
-   0x1fff1bd2: bics    r2, r1
-   0x1fff1bd4: str     r2, [r5, #0]
-   0x1fff1bd6: movs    r1, #1
-   0x1fff1bd8: str     r1, [r0, #0]
-   0x1fff1bda: ldr     r1, [pc, #524]  ; (0x1fff1de8)
-   0x1fff1bdc: movs    r0, #7
-   0x1fff1bde: str     r0, [r1, #40]   ; 0x28
-   0x1fff1be0: ldr     r0, [pc, #520]  ; (0x1fff1dec)
-   0x1fff1be2: ldr     r0, [r0, #32]
-   0x1fff1be4: ldr     r7, [pc, #524]  ; (0x1fff1df4)
-   0x1fff1be6: mov     r12, r0
-   0x1fff1be8: ldr     r0, [pc, #516]  ; (0x1fff1df0)
-   0x1fff1bea: str     r0, [r7, #16]
-   0x1fff1bec: ldr     r1, [pc, #508]  ; (0x1fff1dec)
-   0x1fff1bee: movs    r0, #0
-   0x1fff1bf0: str     r0, [r1, #32]
-   0x1fff1bf2: str     r0, [r7, #16]
-   0x1fff1bf4: ldr     r0, [pc, #496]  ; (0x1fff1de8)
-   0x1fff1bf6: movs    r3, #0
-   0x1fff1bf8: adds    r0, #32
-   0x1fff1bfa: str     r0, [sp, #0]
-   0x1fff1bfc: mov     r2, r3
-   0x1fff1bfe: ldr     r1, [pc, #504]  ; (0x1fff1df8)
-   0x1fff1c00: mov     r0, r5
-   0x1fff1c02: bl      0x1fff1a62
-   0x1fff1c06: ldr     r0, [pc, #488]  ; (0x1fff1df0)
-   0x1fff1c08: str     r0, [r7, #16]
-   0x1fff1c0a: ldr     r1, [pc, #480]  ; (0x1fff1dec)
-   0x1fff1c0c: mov     r0, r12
-   0x1fff1c0e: str     r0, [r1, #32]
-   0x1fff1c10: movs    r0, #0
-   0x1fff1c12: str     r0, [r7, #16]
-   0x1fff1c14: movs    r2, #0
-   0x1fff1c16: mvns    r2, r2
-   0x1fff1c18: ldr     r1, [r4, #8]
-   0x1fff1c1a: ldr     r0, [r4, #4]
-   0x1fff1c1c: bl      0x1fff1a7e
-   0x1fff1c20: str     r0, [r6, #0]
-   0x1fff1c22: movs    r0, #0
-   0x1fff1c24: str     r0, [r5, #28]
-   0x1fff1c26: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1c28: push    {r4, r5, lr}
-   0x1fff1c2a: movs    r5, #1
-   0x1fff1c2c: b.n     0x1fff1c40
-   0x1fff1c2e: ldmia   r1!, {r4}
-   0x1fff1c30: stmia   r0!, {r4}
-   0x1fff1c32: lsls    r4, r5, #30
-   0x1fff1c34: beq.n   0x1fff1c3a
-   0x1fff1c36: b.n     0x1fff1c3e
-   0x1fff1c38: adds    r4, r4, #1
-   0x1fff1c3a: cmp     r4, r2
-   0x1fff1c3c: bcc.n   0x1fff1c38
-   0x1fff1c3e: adds    r5, r5, #1
-   0x1fff1c40: cmp     r5, r3
-   0x1fff1c42: bls.n   0x1fff1c2e
-   0x1fff1c44: pop     {r4, r5, pc}
-   0x1fff1c46: push    {lr}
-   0x1fff1c48: ldr     r2, [pc, #380]  ; (0x1fff1dc8)
-   0x1fff1c4a: ldr     r3, [r2, #4]
-   0x1fff1c4c: movs    r2, #5
-   0x1fff1c4e: bics    r2, r3
-   0x1fff1c50: beq.n   0x1fff1c56
-   0x1fff1c52: movs    r0, #11
-   0x1fff1c54: pop     {pc}
-   0x1fff1c56: movs    r3, #64 ; 0x40
-   0x1fff1c58: movs    r2, #4
-   0x1fff1c5a: bl      0x1fff1c28
-   0x1fff1c5e: movs    r0, #0
-   0x1fff1c60: pop     {pc}
-   0x1fff1c62: push    {r4, r5, r6, r7, lr}
-   0x1fff1c64: sub     sp, #20
-   0x1fff1c66: mov     r7, r0
-   0x1fff1c68: ldr     r0, [r0, #4]
-   0x1fff1c6a: str     r0, [sp, #8]
-   0x1fff1c6c: ldr     r0, [r7, #8]
-   0x1fff1c6e: str     r0, [sp, #4]
-   0x1fff1c70: ldr     r0, [r7, #12]
-   0x1fff1c72: mov     r5, r1
-   0x1fff1c74: movs    r3, #0
-   0x1fff1c76: str     r0, [sp, #12]
-   0x1fff1c78: movs    r2, #101        ; 0x65
-   0x1fff1c7a: add     r1, sp, #12
-   0x1fff1c7c: mov     r0, r3
-   0x1fff1c7e: bl      0x1fff10a6
-   0x1fff1c82: str     r0, [r5, #0]
-   0x1fff1c84: cmp     r0, #0
-   0x1fff1c86: bne.n   0x1fff1d6e
-   0x1fff1c88: movs    r2, #104        ; 0x68
-   0x1fff1c8a: add     r1, sp, #8
-   0x1fff1c8c: ldr     r3, [sp, #12]
-   0x1fff1c8e: bl      0x1fff10a6
-   0x1fff1c92: str     r0, [r5, #0]
-   0x1fff1c94: cmp     r0, #0
-   0x1fff1c96: bne.n   0x1fff1d6e
-   0x1fff1c98: movs    r2, #103        ; 0x67
-   0x1fff1c9a: add     r1, sp, #4
-   0x1fff1c9c: ldr     r3, [sp, #12]
-   0x1fff1c9e: bl      0x1fff10a6
-   0x1fff1ca2: str     r0, [r5, #0]
-   0x1fff1ca4: cmp     r0, #0
-   0x1fff1ca6: bne.n   0x1fff1d6e
-   0x1fff1ca8: str     r0, [sp, #16]
-   0x1fff1caa: movs    r0, #1
-   0x1fff1cac: ldr     r1, [sp, #8]
-   0x1fff1cae: lsls    r0, r0, #15
-   0x1fff1cb0: adds    r0, r1, r0
-   0x1fff1cb2: ldr     r6, [pc, #276]  ; (0x1fff1dc8)
-   0x1fff1cb4: str     r0, [sp, #8]
-   0x1fff1cb6: ldr     r0, [r6, #0]
-   0x1fff1cb8: movs    r1, #64 ; 0x40
-   0x1fff1cba: orrs    r0, r1
-   0x1fff1cbc: str     r0, [r6, #0]
-   0x1fff1cbe: movs    r4, #0
-   0x1fff1cc0: ldr     r0, [pc, #272]  ; (0x1fff1dd4)
-   0x1fff1cc2: ldr     r1, [pc, #264]  ; (0x1fff1dcc)
-   0x1fff1cc4: b.n     0x1fff1cec
-   0x1fff1cc6: lsls    r3, r4, #2
-   0x1fff1cc8: ldr     r3, [r0, r3]
-   0x1fff1cca: ldr     r2, [r7, #4]
-   0x1fff1ccc: cmp     r2, r3
-   0x1fff1cce: bcs.n   0x1fff1cea
-   0x1fff1cd0: mov     r1, r2
-   0x1fff1cd2: ldr     r2, [r7, #12]
-   0x1fff1cd4: adds    r1, r1, r2
-   0x1fff1cd6: lsls    r2, r4, #2
-   0x1fff1cd8: ldr     r0, [r0, r2]
-   0x1fff1cda: adds    r0, r0, #1
-   0x1fff1cdc: cmp     r1, r0
-   0x1fff1cde: bhi.n   0x1fff1ce4
-   0x1fff1ce0: str     r4, [sp, #16]
-   0x1fff1ce2: b.n     0x1fff1cf2
-   0x1fff1ce4: adds    r0, r4, #1
-   0x1fff1ce6: str     r0, [sp, #16]
-   0x1fff1ce8: b.n     0x1fff1cf2
-   0x1fff1cea: adds    r4, r4, #1
-   0x1fff1cec: ldr     r2, [r1, #0]
-   0x1fff1cee: cmp     r4, r2
-   0x1fff1cf0: bls.n   0x1fff1cc6
-   0x1fff1cf2: ldr     r1, [r6, #0]
-   0x1fff1cf4: movs    r0, #64 ; 0x40
-   0x1fff1cf6: bics    r1, r0
-   0x1fff1cf8: str     r1, [r6, #0]
-   0x1fff1cfa: mov     r0, r4
-   0x1fff1cfc: ldr     r1, [sp, #16]
-   0x1fff1cfe: bl      0x1fff1af6
-   0x1fff1d02: str     r0, [r5, #0]
-   0x1fff1d04: cmp     r0, #0
-   0x1fff1d06: bne.n   0x1fff1d6e
-   0x1fff1d08: ldr     r1, [r6, #0]
-   0x1fff1d0a: movs    r0, #64 ; 0x40
-   0x1fff1d0c: orrs    r1, r0
-   0x1fff1d0e: str     r1, [r6, #0]
-   0x1fff1d10: ldr     r1, [pc, #204]  ; (0x1fff1de0)
-   0x1fff1d12: ldr     r0, [r7, #16]
-   0x1fff1d14: ldr     r1, [r1, #0]
-   0x1fff1d16: bl      0x1fff18a0
-   0x1fff1d1a: str     r0, [r6, #28]
-   0x1fff1d1c: ldr     r1, [pc, #220]  ; (0x1fff1dfc)
-   0x1fff1d1e: ldr     r0, [r7, #16]
-   0x1fff1d20: ldr     r1, [r1, #0]
-   0x1fff1d22: muls    r0, r1
-   0x1fff1d24: lsrs    r7, r0, #9
-   0x1fff1d26: adds    r7, r7, #3
-   0x1fff1d28: movs    r0, #1
-   0x1fff1d2a: lsls    r0, r0, #15
-   0x1fff1d2c: ldr     r1, [r6, #0]
-   0x1fff1d2e: orrs    r7, r0
-   0x1fff1d30: movs    r0, #64 ; 0x40
-   0x1fff1d32: bics    r1, r0
-   0x1fff1d34: str     r1, [r6, #0]
-   0x1fff1d36: ldr     r1, [pc, #180]  ; (0x1fff1dec)
-   0x1fff1d38: ldr     r0, [r1, #32]
-   0x1fff1d3a: ldr     r3, [pc, #184]  ; (0x1fff1df4)
-   0x1fff1d3c: ldr     r2, [pc, #176]  ; (0x1fff1df0)
-   0x1fff1d3e: mov     r12, r0
-   0x1fff1d40: str     r2, [r3, #16]
-   0x1fff1d42: movs    r0, #0
-   0x1fff1d44: str     r0, [r1, #32]
-   0x1fff1d46: str     r0, [r3, #16]
-   0x1fff1d48: ldr     r0, [sp, #12]
-   0x1fff1d4a: b.n     0x1fff1da6
-   0x1fff1d4c: movs    r3, #0
-   0x1fff1d4e: mov     r0, r6
-   0x1fff1d50: mov     r2, r3
-   0x1fff1d52: movs    r1, #7
-   0x1fff1d54: str     r6, [sp, #0]
-   0x1fff1d56: bl      0x1fff1a62
-   0x1fff1d5a: ldr     r1, [sp, #4]
-   0x1fff1d5c: ldr     r0, [sp, #8]
-   0x1fff1d5e: bl      0x1fff1c46
-   0x1fff1d62: cmp     r0, #0
-   0x1fff1d64: beq.n   0x1fff1d72
-   0x1fff1d66: movs    r0, #11
-   0x1fff1d68: str     r0, [r5, #0]
-   0x1fff1d6a: movs    r0, #0
-   0x1fff1d6c: str     r0, [r6, #28]
-   0x1fff1d6e: add     sp, #20
-   0x1fff1d70: pop     {r4, r5, r6, r7, pc}
-   0x1fff1d72: ldr     r1, [pc, #116]  ; (0x1fff1de8)
-   0x1fff1d74: movs    r0, #7
-   0x1fff1d76: str     r0, [r1, #40]   ; 0x28
-   0x1fff1d78: mov     r0, r6
-   0x1fff1d7a: str     r7, [r6, #8]
-   0x1fff1d7c: ldr     r1, [pc, #104]  ; (0x1fff1de8)
-   0x1fff1d7e: movs    r3, #0
-   0x1fff1d80: adds    r1, #32
-   0x1fff1d82: str     r1, [sp, #0]
-   0x1fff1d84: ldr     r1, [pc, #112]  ; (0x1fff1df8)
-   0x1fff1d86: mov     r2, r3
-   0x1fff1d88: adds    r1, r1, #2
-   0x1fff1d8a: bl      0x1fff1a62
-   0x1fff1d8e: ldr     r0, [sp, #8]
-   0x1fff1d90: adds    r0, #255        ; 0xff
-   0x1fff1d92: adds    r0, #1
-   0x1fff1d94: str     r0, [sp, #8]
-   0x1fff1d96: ldr     r0, [sp, #4]
-   0x1fff1d98: adds    r0, #255        ; 0xff
-   0x1fff1d9a: adds    r0, #1
-   0x1fff1d9c: str     r0, [sp, #4]
-   0x1fff1d9e: ldr     r0, [sp, #12]
-   0x1fff1da0: subs    r0, #255        ; 0xff
-   0x1fff1da2: subs    r0, #1
-   0x1fff1da4: str     r0, [sp, #12]
-   0x1fff1da6: cmp     r0, #0
-   0x1fff1da8: bne.n   0x1fff1d4c
-   0x1fff1daa: ldr     r0, [pc, #72]   ; (0x1fff1df4)
-   0x1fff1dac: ldr     r1, [pc, #64]   ; (0x1fff1df0)
-   0x1fff1dae: str     r1, [r0, #16]
-   0x1fff1db0: ldr     r2, [pc, #56]   ; (0x1fff1dec)
-   0x1fff1db2: mov     r1, r12
-   0x1fff1db4: str     r1, [r2, #32]
-   0x1fff1db6: movs    r5, #0
-   0x1fff1db8: str     r5, [r0, #16]
-   0x1fff1dba: subs    r2, r5, #1
-   0x1fff1dbc: mov     r0, r4
-   0x1fff1dbe: ldr     r1, [sp, #16]
-   0x1fff1dc0: bl      0x1fff1a7e
-   0x1fff1dc4: str     r5, [r6, #28]
-   0x1fff1dc6: b.n     0x1fff1d6e
-   0x1fff1dc8: stmia   r0!, {}
-   0x1fff1dca: ands    r3, r0
-   0x1fff1dcc: lsls    r0, r0, #17
-   0x1fff1dce: movs    r0, r0
-   0x1fff1dd0: lsls    r0, r2, #18
-   0x1fff1dd2: movs    r0, r0
-   0x1fff1dd4: lsls    r0, r4, #20
-   0x1fff1dd6: movs    r0, r0
-   0x1fff1dd8: strh    r7, [r0, #4]
-   0x1fff1dda: movs    r0, r0
-   0x1fff1ddc: lsls    r4, r7, #16
-   0x1fff1dde: movs    r0, r0
-   0x1fff1de0: lsls    r4, r2, #17
-   0x1fff1de2: movs    r0, r0
-   0x1fff1de4: lsls    r0, r2, #17
-   0x1fff1de6: movs    r0, r0
-   0x1fff1de8: ldmia   r7, {r6, r7}
-   0x1fff1dea: ands    r3, r0
-   0x1fff1dec: strh    r0, [r0, #10]
-   0x1fff1dee: ands    r4, r0
-   0x1fff1df0: ldrsb   r0, [r7, r1]
-   0x1fff1df2: asrs    r4, r6, #8
-   0x1fff1df4: strh    r0, [r0, #30]
-   0x1fff1df6: ands    r4, r0
-   0x1fff1df8: asrs    r1, r0, #2
-   0x1fff1dfa: movs    r0, r0
-   0x1fff1dfc: lsls    r4, r1, #17
-   0x1fff1dfe: movs    r0, r0
-   0x1fff1e00: push    {r4, r5, r6, lr}
-   0x1fff1e02: mov     r6, r1
-   0x1fff1e04: mov     r4, r0
-   0x1fff1e06: ldr     r1, [r0, #8]
-   0x1fff1e08: ldr     r0, [r0, #4]
-   0x1fff1e0a: bl      0x1fff19cc
-   0x1fff1e0e: str     r0, [r6, #0]
-   0x1fff1e10: cmp     r0, #0
-   0x1fff1e12: bne.n   0x1fff1e36
-   0x1fff1e14: ldr     r5, [pc, #32]   ; (0x1fff1e38)
-   0x1fff1e16: ldr     r0, [r5, #28]
-   0x1fff1e18: cmp     r0, #0
-   0x1fff1e1a: bne.n   0x1fff1e20
-   0x1fff1e1c: movs    r0, #64 ; 0x40
-   0x1fff1e1e: str     r0, [r5, #28]
-   0x1fff1e20: movs    r2, #0
-   0x1fff1e22: ldr     r1, [r4, #8]
-   0x1fff1e24: ldr     r0, [r4, #4]
-   0x1fff1e26: bl      0x1fff1a7e
-   0x1fff1e2a: str     r0, [r6, #0]
-   0x1fff1e2c: ldr     r0, [r5, #28]
-   0x1fff1e2e: cmp     r0, #64 ; 0x40
-   0x1fff1e30: bne.n   0x1fff1e36
-   0x1fff1e32: movs    r0, #0
-   0x1fff1e34: str     r0, [r5, #28]
-   0x1fff1e36: pop     {r4, r5, r6, pc}
-   0x1fff1e38: stmia   r0!, {}
-   0x1fff1e3a: ands    r3, r0
-   0x1fff1e3c: push    {r0, r1, r2, r4, r5, r6, r7, lr}
-   0x1fff1e3e: sub     sp, #8
-   0x1fff1e40: ldr     r0, [r1, #4]
-   0x1fff1e42: str     r0, [sp, #0]
-   0x1fff1e44: ldr     r5, [r1, #12]
-   0x1fff1e46: ldr     r7, [r1, #8]
-   0x1fff1e48: mov     r4, r1
-   0x1fff1e4a: mov     r6, r2
-   0x1fff1e4c: mov     r2, r5
-   0x1fff1e4e: mov     r1, r7
-   0x1fff1e50: bl      0x1fff1198
-   0x1fff1e54: str     r0, [r6, #0]
-   0x1fff1e56: cmp     r0, #0
-   0x1fff1e58: bne.n   0x1fff1e74
-   0x1fff1e5a: cmp     r5, #0
-   0x1fff1e5c: beq.n   0x1fff1e74
-   0x1fff1e5e: ldr     r0, [r4, #16]
-   0x1fff1e60: bl      0x1fff1200
-   0x1fff1e64: ldr     r0, [sp, #8]
-   0x1fff1e66: mov     r2, r5
-   0x1fff1e68: cmp     r0, #0
-   0x1fff1e6a: ldr     r0, [sp, #0]
-   0x1fff1e6c: mov     r1, r7
-   0x1fff1e6e: beq.n   0x1fff1e78
-   0x1fff1e70: bl      0x1fff1306
-   0x1fff1e74: add     sp, #20
-   0x1fff1e76: pop     {r4, r5, r6, r7, pc}
-   0x1fff1e78: bl      0x1fff138c
-   0x1fff1e7c: b.n     0x1fff1e74
-   0x1fff1e7e: push    {r4, lr}
-   0x1fff1e80: ldr     r1, [pc, #136]  ; (0x1fff1f0c)
-   0x1fff1e82: movs    r0, #0
-   0x1fff1e84: str     r0, [r1, #0]
-   0x1fff1e86: bl      0x1fff02e4
-   0x1fff1e8a: pop     {r4, pc}
-   0x1fff1e8c: push    {r3, r4, r5, r6, r7, lr}
-   0x1fff1e8e: mov     r5, r1
-   0x1fff1e90: mov     r1, r0
-   0x1fff1e92: mov     r4, r0
-   0x1fff1e94: movs    r3, #0
-   0x1fff1e96: movs    r2, #100        ; 0x64
-   0x1fff1e98: adds    r1, #12
-   0x1fff1e9a: mov     r0, r3
-   0x1fff1e9c: bl      0x1fff10a6
-   0x1fff1ea0: str     r0, [r5, #0]
-   0x1fff1ea2: cmp     r0, #0
-   0x1fff1ea4: bne.n   0x1fff1ef8
-   0x1fff1ea6: movs    r2, #102        ; 0x66
-   0x1fff1ea8: adds    r1, r4, #4
-   0x1fff1eaa: ldr     r3, [r4, #12]
-   0x1fff1eac: bl      0x1fff10a6
-   0x1fff1eb0: str     r0, [r5, #0]
-   0x1fff1eb2: cmp     r0, #0
-   0x1fff1eb4: bne.n   0x1fff1ef8
-   0x1fff1eb6: mov     r1, r4
-   0x1fff1eb8: movs    r2, #102        ; 0x66
-   0x1fff1eba: adds    r1, #8
-   0x1fff1ebc: ldr     r3, [r4, #12]
-   0x1fff1ebe: bl      0x1fff10a6
-   0x1fff1ec2: str     r0, [r5, #0]
-   0x1fff1ec4: cmp     r0, #0
-   0x1fff1ec6: bne.n   0x1fff1ef8
-   0x1fff1ec8: movs    r3, #1
-   0x1fff1eca: ldr     r2, [r4, #4]
-   0x1fff1ecc: lsls    r3, r3, #15
-   0x1fff1ece: cmp     r2, r3
-   0x1fff1ed0: bcs.n   0x1fff1ed4
-   0x1fff1ed2: adds    r2, r2, r3
-   0x1fff1ed4: ldr     r0, [r4, #8]
-   0x1fff1ed6: cmp     r0, r3
-   0x1fff1ed8: bcs.n   0x1fff1edc
-   0x1fff1eda: adds    r0, r0, r3
-   0x1fff1edc: ldr     r1, [r4, #12]
-   0x1fff1ede: b.n     0x1fff1f00
-   0x1fff1ee0: ldr     r6, [r0, #0]
-   0x1fff1ee2: ldr     r7, [r2, #0]
-   0x1fff1ee4: cmp     r6, r7
-   0x1fff1ee6: beq.n   0x1fff1efa
-   0x1fff1ee8: movs    r0, #10
-   0x1fff1eea: str     r0, [r5, #0]
-   0x1fff1eec: ldr     r0, [r4, #4]
-   0x1fff1eee: cmp     r0, r3
-   0x1fff1ef0: bcs.n   0x1fff1ef4
-   0x1fff1ef2: subs    r2, r2, r3
-   0x1fff1ef4: subs    r0, r2, r0
-   0x1fff1ef6: str     r0, [r5, #4]
-   0x1fff1ef8: pop     {r3, r4, r5, r6, r7, pc}
-   0x1fff1efa: adds    r0, r0, #4
-   0x1fff1efc: adds    r2, r2, #4
-   0x1fff1efe: subs    r1, r1, #4
-   0x1fff1f00: cmp     r1, #0
-   0x1fff1f02: bne.n   0x1fff1ee0
-   0x1fff1f04: movs    r0, #0
-   0x1fff1f06: str     r0, [r5, #0]
-   0x1fff1f08: pop     {r3, r4, r5, r6, r7, pc}
-
-0x1fff1f00:    0xd1ed2900      0x60282000      0x0000bdf8      0x40048000
-0x1fff1f10:    0x636e7953      0x6e6f7268      0x64657a69      0xffffff00
-0x1fff1f20:    0x00005a5a      0x74004b4f      0x00547345      0x45534552
-0x1fff1f30:    0xff00444e      0x1fff13dd      0x1fff161d      0x1fff1601
-0x1fff1f40:    0x1fff1617      0x1fff173d      0x1fff1743      0x1fff171d
-0x1fff1f50:    0x1fff172d      0xffffffff      0xffffffff      0xffffffff
-0x1fff1f60:    0x1fff1f34      0x1fff1f44      0xffffffff      0xffffffff
-0x1fff1f70:    0xffffffff      0x00002000
-
-   0x1fff1f0a: movs    r0, r0
-   0x1fff1f0c: strh    r0, [r0, #0]
-   0x1fff1f0e: ands    r4, r0
-   0x1fff1f10: ldrb    r3, [r2, #5]
-   0x1fff1f12: str     r6, [r5, #52]   ; 0x34
-   0x1fff1f14: strb    r0, [r5, #9]
-   0x1fff1f16: ldr     r7, [r5, #100]  ; 0x64
-   0x1fff1f18: ldrb    r1, [r5, #9]
-   0x1fff1f1a: str     r5, [r4, #68]   ; 0x44
-   0x1fff1f1c: vmaxnm.f32      <illegal reg q7.5>, q8, <illegal reg q15.5>
-   0x1fff1f20: ldrh    r2, [r3, r1]
-   0x1fff1f22: movs    r0, r0
-   0x1fff1f24: ldr     r3, [pc, #316]  ; (0x1fff2064)
-   0x1fff1f26: strb    r0, [r0, #16]
-   0x1fff1f28: strb    r5, [r0, #13]
-   0x1fff1f2a: lsls    r4, r2, #1
-   0x1fff1f2c: cmp     r2, r10
-   0x1fff1f2e: cmp     r3, r10
-   0x1fff1f30: add     r6, r9
-   0x1fff1f32: vcge.u8 <illegal reg q0.5>, q8, <illegal reg q6.5>
-   0x1fff1f36: subs    r7, r7, #7
-   0x1fff1f38: asrs    r5, r3, #24
-   0x1fff1f3a: subs    r7, r7, #7
-   0x1fff1f3c: asrs    r1, r0, #24
-   0x1fff1f3e: subs    r7, r7, #7
-   0x1fff1f40: asrs    r7, r2, #24
-   0x1fff1f42: subs    r7, r7, #7
-   0x1fff1f44: asrs    r5, r7, #28
-   0x1fff1f46: subs    r7, r7, #7
-   0x1fff1f48: asrs    r3, r0, #29
-   0x1fff1f4a: subs    r7, r7, #7
-   0x1fff1f4c: asrs    r5, r3, #28
-   0x1fff1f4e: subs    r7, r7, #7
-   0x1fff1f50: asrs    r5, r5, #28
-   0x1fff1f52: subs    r7, r7, #7
-   0x1fff1f54:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f58:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f5c:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f60: subs    r4, r6, #4
-   0x1fff1f62: subs    r7, r7, #7
-   0x1fff1f64: subs    r4, r0, #5
-   0x1fff1f66: subs    r7, r7, #7
-   0x1fff1f68:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f6c:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f70:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f74: movs    r0, #0
-   0x1fff1f76: movs    r0, r0
-   0x1fff1f78: movs    r0, #16
-   0x1fff1f7a: movs    r0, r2
-   0x1fff1f7c: movs    r0, r2
-   0x1fff1f7e: movs    r0, r2
-   0x1fff1f80: movs    r0, r0
-   0x1fff1f82: movs    r0, r0
-   0x1fff1f84: movs    r0, r0
-   0x1fff1f86: movs    r0, r0
-   0x1fff1f88: strh    r0, [r0, #0]
-   0x1fff1f8a: stmia   r0!, {}
-   0x1fff1f8c:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f90:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f94:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f98:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1f9c:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fa0:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fa4:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fa8:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fac:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fb0:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fb4:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fb8:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fbc:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fc0:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fc4:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fc8:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fcc:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fd0:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fd4:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fd8:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fdc:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fe0:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fe4:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fe8:                 ; <UNDEFINED> instruction: 0xffffffff
-   0x1fff1fec:                 ; <UNDEFINED> instruction: 0xffffffff
-
-0x1fff1ff0:    0xf7ffb510      0xbd10fc6b      0x1fff1f54      0xffffffff
-
-   0x1fff1ff0: push    {r4, lr}
-   0x1fff1ff2: bl      0x1fff18cc
-   0x1fff1ff6: pop     {r4, pc}
-   0x1fff1ff8: subs    r4, r2, #5
-   0x1fff1ffa: subs    r7, r7, #7
-   0x1fff1ffc:                 ; <UNDEFINED> instruction: 0xffffffff
diff --git a/datasheets/nxp/lpc11u14/cortex_m0_r0p0_trm.pdf b/datasheets/nxp/lpc11u14/cortex_m0_r0p0_trm.pdf
deleted file mode 100644 (file)
index 7e71e65..0000000
Binary files a/datasheets/nxp/lpc11u14/cortex_m0_r0p0_trm.pdf and /dev/null differ
diff --git a/datasheets/nxp/lpc11u14/lpc11u1x-datasheet.pdf b/datasheets/nxp/lpc11u14/lpc11u1x-datasheet.pdf
deleted file mode 100644 (file)
index 38f854f..0000000
Binary files a/datasheets/nxp/lpc11u14/lpc11u1x-datasheet.pdf and /dev/null differ
diff --git a/datasheets/nxp/lpc11u14/lpc11u1x-user-manual.pdf b/datasheets/nxp/lpc11u14/lpc11u1x-user-manual.pdf
deleted file mode 100644 (file)
index 48f66d7..0000000
Binary files a/datasheets/nxp/lpc11u14/lpc11u1x-user-manual.pdf and /dev/null differ
diff --git a/datasheets/nxp/lpc11u1x/LPCXpresso_Getting_Started_Guide.pdf b/datasheets/nxp/lpc11u1x/LPCXpresso_Getting_Started_Guide.pdf
new file mode 100644 (file)
index 0000000..7342885
Binary files /dev/null and b/datasheets/nxp/lpc11u1x/LPCXpresso_Getting_Started_Guide.pdf differ
diff --git a/datasheets/nxp/lpc11u1x/bios b/datasheets/nxp/lpc11u1x/bios
new file mode 100644 (file)
index 0000000..7764060
--- /dev/null
@@ -0,0 +1,4175 @@
+LPC11U14 BIOS
+
+Interrupt vectors (we assume)
+
+0x1fff0000:    0x10000ffc      0x1fff0041      0x1fff00e1      0x1fff00e3
+0x1fff0010:    0x1fff00e5      0x1fff00e7      0x1fff00e9      0xffffffff
+0x1fff0020:    0xffffffff      0xffffffff      0xffffffff      0x1fff00eb
+0x1fff0030:    0x1fff00ed      0xffffffff      0x1fff00ef      0x1fff00f1
+
+
+Call graph
+1fff0040
+       1fff0048        Load CRP value to SCB register
+               1fff0350        Checks the pins PIN0_1 for ISP force
+                       1fff0348
+                               1fff02f6        Validate application and jump
+                                       
+                                       Unless something is weird, you'll get to here. This
+                                       checksums the first bit of the application interrupt table
+                                       and jumps to the application if it's ok.
+
+                                       1fff008c        jump to other system
+                               1fff02e4
+
+                                       This looks like the ISP bits, which we're going to ignore
+
+                                       1fff02b0        setup clocks
+                                       1fff0264
+                                               1fff022c
+                                               1fff0e54
+                                               1fff019c
+                                               1fff0d9c        setup_serial
+                                               1fff0e04
+                                               1fff0d9c        setup_serial
+                                               1fff00f4
+
+
+boot:
+
+       boot() {
+               start();
+       }
+
+
+   0x1fff0040: ldr     r2, [pc, #0]    ; (0x1fff0044)  1fff0049
+   0x1fff0042: bx      r2
+
+0x1fff0040:    0x47104a00      0x1fff0049      0x4b1b4a1a      0x4d1c681b
+
+   0x1fff0044: lsls    r1, r1, #1
+   0x1fff0046: subs    r7, r7, #7
+
+start:
+
+       Check Code Read Protection values
+
+   0x1fff0048: ldr     r2, [pc, #104]  ; (0x1fff00b4)  400483f0
+   0x1fff004a: ldr     r3, [pc, #108]  ; (0x1fff00b8)  1fff00c8
+   0x1fff004c: ldr     r3, [r3, #0]                    000002fc
+   0x1fff004e: ldr     r5, [pc, #112]  ; (0x1fff00c0)  1fff00d0
+   0x1fff0050: ldr     r5, [r5, #0]                    43218765        CRP3
+   0x1fff0052: ldr     r6, [pc, #112]  ; (0x1fff00c4)  1fff00d4
+   0x1fff0054: ldr     r6, [r6, #0]                    12345678        CRP1
+   0x1fff0056: ldr     r4, [r3, #0]                    (000002fc)      CRP
+
+       if CRP == CRP3
+
+   0x1fff0058: cmp     r4, r5
+   0x1fff005a: beq.n   0x1fff0060
+
+       if CRP == CRP1
+
+=> 0x1fff005c: cmp     r4, r6
+   0x1fff005e: bne.n   0x1fff0064
+
+       if (r4 == r5 || r4 == r6) {
+
+   0x1fff0060: ldr     r4, [pc, #88]   ; (0x1fff00bc)  1fff00cc
+   0x1fff0062: ldr     r4, [r4, #0]                    87654321        CRP2
+
+               r4 = 0x87654321;
+       }
+
+
+       Write the resulting CRP value to the SCB register
+
+   0x1fff0064: str     r4, [r2, #0]                                    SCB register before DEVICE_ID
+
+       This pretty clearly changes the memory mapping so that low
+       addresses (higher than the interrupt vector) come from rom
+
+   0x1fff0066: ldr     r2, [pc, #52]   ; (0x1fff009c)  4003c000        FLASHCFG
+   0x1fff0068: ldr     r3, [r2, #0]
+   0x1fff006a: movs    r4, #64 ; 0x40
+   0x1fff006c: orrs    r3, r4
+   0x1fff006e: str     r3, [r2, #0]
+
+       Check and see if the memory mapping changes worked
+
+   0x1fff0070: ldr     r3, [pc, #44]   ; (0x1fff00a0)  0000043c
+   0x1fff0072: ldr     r2, [r3, #0]
+   0x1fff0074: ldr     r4, [pc, #44]   ; (0x1fff00a4)  000005d0
+   0x1fff0076: ldr     r4, [r4, #0]
+   0x1fff0078: ldr     r5, [pc, #44]   ; (0x1fff00a8)  1fff00dc
+   0x1fff007a: ldr     r5, [r5, #0]                    3456abcd
+   0x1fff007c: cmp     r4, r5
+   0x1fff007e: beq.n   0x1fff0084
+
+       Initialize stack
+
+   0x1fff0080: ldr     r2, [pc, #40]   ; (0x1fff00ac)  1fff00d8
+   0x1fff0082: ldr     r2, [r2, #0]                    10000fff
+   0x1fff0084: subs    r2, #31
+   0x1fff0086: mov     sp, r2
+
+       Jump to main function
+
+   0x1fff0088: ldr     r2, [pc, #36]   ; (0x1fff00b0)  1fff0351
+   0x1fff008a: bx      r2
+
+       Load stack/pc from address pointed at by r0 and jump
+
+   0x1fff008c: ldr     r1, [r0, #0]
+   0x1fff008e: mov     sp, r1
+   0x1fff0090: ldr     r1, [r0, #4]
+   0x1fff0092: bx      r1
+
+       This is the same.
+
+   0x1fff0094: ldr     r1, [r0, #0]
+   0x1fff0096: mov     sp, r1
+   0x1fff0098: ldr     r1, [r0, #4]
+   0x1fff009a: bx      r1
+
+0x1fff0090:    0x47086841      0x468d6801      0x47086841      0x4003c000
+0x1fff00a0:    0x0000043c      0x000005d0      0x1fff00dc      0x1fff00d8
+0x1fff00b0:    0x1fff0351      0x400483f0      0x1fff00c8      0x1fff00cc
+0x1fff00c0:    0x1fff00d0      0x1fff00d4      0x000002fc      0x87654321
+0x1fff00d0:    0x43218765      0x12345678      0x10000fff      0x3456abcd
+0x1fff00e0:    0xe7fe4770      0xe7fee7fe      0x4770e7fe      0x47704770
+0x1fff00f0:    0xffff4770      0x4eddb51c      0x4dde4fdd      0x48dd2401
+0x1fff0100:    0x2146aa01      0xf0003898      0x2800fe7d      0x217ad1f7
+
+   0x1fff009c: stmia   r0!, {}
+   0x1fff009e: ands    r3, r0
+   0x1fff00a0: lsls    r4, r7, #16
+   0x1fff00a2: movs    r0, r0
+   0x1fff00a4: lsls    r0, r2, #23
+   0x1fff00a6: movs    r0, r0
+   0x1fff00a8: lsls    r4, r3, #3
+   0x1fff00aa: subs    r7, r7, #7
+   0x1fff00ac: lsls    r0, r3, #3
+   0x1fff00ae: subs    r7, r7, #7
+   0x1fff00b0: lsls    r1, r2, #13
+   0x1fff00b2: subs    r7, r7, #7
+   0x1fff00b4: strh    r0, [r6, #30]
+   0x1fff00b6: ands    r4, r0
+   0x1fff00b8: lsls    r0, r1, #3
+   0x1fff00ba: subs    r7, r7, #7
+   0x1fff00bc: lsls    r4, r1, #3
+   0x1fff00be: subs    r7, r7, #7
+   0x1fff00c0: lsls    r0, r2, #3
+   0x1fff00c2: subs    r7, r7, #7
+   0x1fff00c4: lsls    r4, r2, #3
+   0x1fff00c6: subs    r7, r7, #7
+   0x1fff00c8: lsls    r4, r7, #11
+   0x1fff00ca: movs    r0, r0
+   0x1fff00cc: orrs    r1, r4
+   0x1fff00ce: strh    r5, [r4, #58]   ; 0x3a
+   0x1fff00d0: strh    r5, [r4, #58]   ; 0x3a
+   0x1fff00d2: orrs    r1, r4
+   0x1fff00d4: ldrsb   r0, [r7, r1]
+   0x1fff00d6: asrs    r4, r6, #8
+   0x1fff00d8: lsrs    r7, r7, #31
+   0x1fff00da: asrs    r0, r0, #32
+   0x1fff00dc: add     r3, sp, #820    ; 0x334
+   0x1fff00de: adds    r4, #86 ; 0x56
+   0x1fff00e0: bx      lr
+   0x1fff00e2: b.n     0x1fff00e2
+   0x1fff00e4: b.n     0x1fff00e4
+   0x1fff00e6: b.n     0x1fff00e6
+   0x1fff00e8: b.n     0x1fff00e8
+   0x1fff00ea: bx      lr
+   0x1fff00ec: bx      lr
+   0x1fff00ee: bx      lr
+   0x1fff00f0: bx      lr
+   0x1fff00f2: vsli.32 d27, d12, #31
+
+
+
+   0x1fff00f4: push    {r2, r3, r4, lr}
+   0x1fff00f6: ldr     r6, [pc, #884]  ; (0x1fff046c)
+   0x1fff00f8: ldr     r7, [pc, #884]  ; (0x1fff0470)
+   0x1fff00fa: ldr     r5, [pc, #888]  ; (0x1fff0474)
+   0x1fff00fc: movs    r4, #1
+   0x1fff00fe: ldr     r0, [pc, #884]  ; (0x1fff0474)
+   0x1fff0100: add     r2, sp, #4
+   0x1fff0102: movs    r1, #70 ; 0x46
+   0x1fff0104: subs    r0, #152        ; 0x98
+   0x1fff0106: bl      0x1fff0e04
+   0x1fff010a: cmp     r0, #0
+   0x1fff010c: bne.n   0x1fff00fe
+   0x1fff010e: movs    r1, #122        ; 0x7a
+   0x1fff0110: lsls    r2, r0, #2
+   0x1fff0112: ldr     r2, [r5, r2]
+   0x1fff0114: adds    r0, r0, #1
+   0x1fff0116: strb    r1, [r2, #0]
+   0x1fff0118: cmp     r0, #5
+   0x1fff011a: blt.n   0x1fff0110
+   0x1fff011c: movs    r0, #15
+   0x1fff011e: ldr     r2, [pc, #852]  ; (0x1fff0474)
+   0x1fff0120: str     r0, [sp, #0]
+   0x1fff0122: mov     r0, r2
+   0x1fff0124: movs    r3, #5
+   0x1fff0126: subs    r0, #152        ; 0x98
+   0x1fff0128: ldr     r1, [sp, #4]
+   0x1fff012a: bl      0x1fff0fd8
+   0x1fff012e: cmp     r0, #0
+   0x1fff0130: beq.n   0x1fff00fe
+   0x1fff0132: ldr     r1, [r5, #0]
+   0x1fff0134: ldrb    r1, [r1, #0]
+   0x1fff0136: cmp     r1, #82 ; 0x52
+   0x1fff0138: beq.n   0x1fff0184
+   0x1fff013a: cmp     r1, #84 ; 0x54
+   0x1fff013c: beq.n   0x1fff0184
+   0x1fff013e: cmp     r1, #71 ; 0x47
+   0x1fff0140: beq.n   0x1fff0184
+   0x1fff0142: cmp     r1, #77 ; 0x4d
+   0x1fff0144: beq.n   0x1fff0184
+   0x1fff0146: movs    r2, #0
+   0x1fff0148: cmp     r1, #87 ; 0x57
+   0x1fff014a: beq.n   0x1fff0188
+   0x1fff014c: cmp     r1, #67 ; 0x43
+   0x1fff014e: beq.n   0x1fff0188
+   0x1fff0150: movs    r4, #0
+   0x1fff0152: ldr     r1, [pc, #804]  ; (0x1fff0478)
+   0x1fff0154: ldr     r3, [r6, #0]
+   0x1fff0156: ldr     r1, [r1, #8]
+   0x1fff0158: cmp     r1, r3
+   0x1fff015a: beq.n   0x1fff016a
+   0x1fff015c: ldr     r3, [r7, #0]
+   0x1fff015e: cmp     r1, r3
+   0x1fff0160: beq.n   0x1fff016a
+   0x1fff0162: ldr     r3, [pc, #792]  ; (0x1fff047c)
+   0x1fff0164: ldr     r3, [r3, #0]
+   0x1fff0166: cmp     r1, r3
+   0x1fff0168: bne.n   0x1fff016e
+   0x1fff016a: cmp     r2, #1
+   0x1fff016c: beq.n   0x1fff018c
+   0x1fff016e: ldr     r2, [r6, #0]
+   0x1fff0170: cmp     r1, r2
+   0x1fff0172: beq.n   0x1fff017a
+   0x1fff0174: ldr     r2, [r7, #0]
+   0x1fff0176: cmp     r1, r2
+   0x1fff0178: bne.n   0x1fff017e
+   0x1fff017a: cmp     r4, #1
+   0x1fff017c: beq.n   0x1fff018c
+   0x1fff017e: bl      0x1fff0bcc
+   0x1fff0182: b.n     0x1fff00fe
+   0x1fff0184: movs    r2, #1
+   0x1fff0186: b.n     0x1fff0152
+   0x1fff0188: movs    r4, #1
+   0x1fff018a: b.n     0x1fff0152
+   0x1fff018c: movs    r2, #15
+   0x1fff018e: movs    r0, #19
+   0x1fff0190: ldr     r1, [r5, #4]
+   0x1fff0192: bl      0x1fff1064
+   0x1fff0196: bl      0x1ff0d9c       setup_serial
+   0x1fff019a: b.n     0x1fff00fe
+
+
+
+   0x1fff019c: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff019e: ldr     r6, [pc, #736]  ; (0x1fff0480)
+   0x1fff01a0: ldr     r7, [pc, #736]  ; (0x1fff0484)
+   0x1fff01a2: ldr     r4, [pc, #740]  ; (0x1fff0488)
+   0x1fff01a4: movs    r5, #1
+   0x1fff01a6: movs    r0, #2
+   0x1fff01a8: str     r0, [r7, #4]
+   0x1fff01aa: ldr     r0, [r6, #0]
+   0x1fff01ac: lsls    r0, r0, #13
+   0x1fff01ae: bmi.n   0x1fff01aa
+   0x1fff01b0: ldr     r0, [r6, #0]
+   0x1fff01b2: lsls    r0, r0, #13
+   0x1fff01b4: bpl.n   0x1fff01b0
+   0x1fff01b6: str     r5, [r7, #4]
+   0x1fff01b8: ldr     r0, [r6, #0]
+   0x1fff01ba: lsls    r0, r0, #13
+   0x1fff01bc: bmi.n   0x1fff01b8
+   0x1fff01be: ldr     r0, [r6, #0]
+   0x1fff01c0: lsls    r0, r0, #13
+   0x1fff01c2: bpl.n   0x1fff01be
+   0x1fff01c4: movs    r0, #0
+   0x1fff01c6: str     r0, [r7, #4]
+   0x1fff01c8: ldr     r0, [r7, #8]
+   0x1fff01ca: movs    r1, #208        ; 0xd0
+   0x1fff01cc: bl      0x1fff11d4
+   0x1fff01d0: movs    r2, #0
+   0x1fff01d2: movs    r1, #3
+   0x1fff01d4: bl      0x1fff0d28
+   0x1fff01d8: ldr     r0, [r4, #8]
+   0x1fff01da: lsrs    r0, r0, #3
+   0x1fff01dc: lsls    r0, r0, #3
+   0x1fff01de: str     r0, [r4, #8]
+   0x1fff01e0: ldr     r0, [r4, #8]
+   0x1fff01e2: orrs    r0, r5
+   0x1fff01e4: str     r0, [r4, #8]
+   0x1fff01e6: ldr     r0, [r4, #12]
+   0x1fff01e8: lsrs    r0, r0, #3
+   0x1fff01ea: lsls    r0, r0, #3
+   0x1fff01ec: str     r0, [r4, #12]
+   0x1fff01ee: ldr     r0, [r4, #12]
+   0x1fff01f0: orrs    r0, r5
+   0x1fff01f2: str     r0, [r4, #12]
+   0x1fff01f4: ldr     r0, [pc, #660]  ; (0x1fff048c)
+   0x1fff01f6: bl      0x1ff0d9c       setup_serial
+   0x1fff01fa: bl      0x1fff0de2
+   0x1fff01fe: ldr     r0, [pc, #628]  ; (0x1fff0474)
+   0x1fff0200: movs    r2, #0
+   0x1fff0202: movs    r1, #70 ; 0x46
+   0x1fff0204: subs    r0, #152        ; 0x98
+   0x1fff0206: bl      0x1fff0e04
+   0x1fff020a: ldr     r0, [pc, #616]  ; (0x1fff0474)
+   0x1fff020c: ldr     r1, [pc, #636]  ; (0x1fff048c)
+   0x1fff020e: subs    r0, #152        ; 0x98
+   0x1fff0210: bl      0x1fff0fb8
+   0x1fff0214: cmp     r0, #0
+   0x1fff0216: beq.n   0x1fff022a
+   0x1fff0218: ldr     r0, [r4, #8]
+   0x1fff021a: lsrs    r0, r0, #3
+   0x1fff021c: lsls    r0, r0, #3
+   0x1fff021e: str     r0, [r4, #8]
+   0x1fff0220: ldr     r0, [r4, #12]
+   0x1fff0222: lsrs    r0, r0, #3
+   0x1fff0224: lsls    r0, r0, #3
+   0x1fff0226: str     r0, [r4, #12]
+   0x1fff0228: b.n     0x1fff01a6
+   0x1fff022a: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff022c: ldr     r0, [pc, #608]  ; (0x1fff0490)
+   0x1fff022e: ldr     r1, [r0, #0]
+   0x1fff0230: movs    r2, #1
+   0x1fff0232: lsls    r2, r2, #12
+   0x1fff0234: orrs    r1, r2
+   0x1fff0236: str     r1, [r0, #0]
+   0x1fff0238: movs    r1, #1
+   0x1fff023a: str     r1, [r0, #24]
+   0x1fff023c: ldr     r1, [pc, #596]  ; (0x1fff0494)
+   0x1fff023e: movs    r0, #133        ; 0x85
+   0x1fff0240: str     r0, [r1, #40]   ; 0x28
+   0x1fff0242: ldr     r0, [pc, #596]  ; (0x1fff0498)
+   0x1fff0244: ldr     r1, [r0, #0]
+   0x1fff0246: lsls    r2, r2, #6
+   0x1fff0248: bics    r1, r2
+   0x1fff024a: str     r1, [r0, #0]
+   0x1fff024c: ldr     r0, [pc, #568]  ; (0x1fff0488)
+   0x1fff024e: ldr     r1, [r0, #8]
+   0x1fff0250: lsrs    r1, r1, #3
+   0x1fff0252: lsls    r1, r1, #3
+   0x1fff0254: str     r1, [r0, #8]
+   0x1fff0256: ldr     r1, [r0, #8]
+   0x1fff0258: str     r1, [r0, #8]
+   0x1fff025a: ldr     r0, [pc, #576]  ; (0x1fff049c)
+   0x1fff025c: ldr     r1, [r0, #0]
+   0x1fff025e: bics    r1, r2
+   0x1fff0260: str     r1, [r0, #0]
+   0x1fff0262: bx      lr
+
+
+       {
+
+   0x1fff0264: bl      0x1fff022c
+   0x1fff0268: movs    r0, #1
+   0x1fff026a: bl      0x1fff0e54
+   0x1fff026e: bl      0x1fff019c
+   0x1fff0272: ldr     r0, [pc, #556]  ; (0x1fff04a0)  1fff1f24
+   0x1fff0274: bl      0x1ff0d9c       setup_serial
+
+
+   0x1fff0278: ldr     r0, [pc, #504]  ; (0x1fff0474)  100000f8
+   0x1fff027a: movs    r2, #0
+   0x1fff027c: movs    r1, #70 ; 0x46
+   0x1fff027e: subs    r0, #152        ; 0x98
+   0x1fff0280: bl      0x1fff0e04
+   0x1fff0284: ldr     r4, [pc, #496]  ; (0x1fff0478)
+   0x1fff0286: ldr     r0, [pc, #540]  ; (0x1fff04a4)
+   0x1fff0288: str     r0, [r4, #0]
+   0x1fff028a: ldr     r0, [pc, #532]  ; (0x1fff04a0)
+   0x1fff028c: bl      0x1ff0d9c       setup_serial
+   0x1fff0290: movs    r0, #1
+   0x1fff0292: ldr     r1, [pc, #480]  ; (0x1fff0474)
+   0x1fff0294: str     r0, [r4, #4]
+   0x1fff0296: ldr     r0, [pc, #476]  ; (0x1fff0474)
+   0x1fff0298: subs    r1, #80 ; 0x50
+   0x1fff029a: str     r1, [r0, #0]
+   0x1fff029c: adds    r1, #16
+   0x1fff029e: str     r1, [r0, #4]
+   0x1fff02a0: adds    r1, #16
+   0x1fff02a2: str     r1, [r0, #8]
+   0x1fff02a4: adds    r1, #16
+   0x1fff02a6: str     r1, [r0, #12]
+   0x1fff02a8: adds    r1, #16
+   0x1fff02aa: str     r1, [r0, #16]
+   0x1fff02ac: bl      0x1fff00f4
+
+       }
+
+
+Set up clocks
+
+       {
+
+   0x1fff02b0: ldr     r0, [pc, #476]  ; (0x1fff0490)  40048080        SYSAHBCLKCTRL
+   0x1fff02b2: subs    r0, #64 ; 0x40                                  SYSPLLCLKSEL
+   0x1fff02b4: ldr     r3, [r0, #48]   ; 0x30                          MAINCLKSEL
+
+       R1 = 0
+       R1 = 1
+       R3 = 0
+
+   0x1fff02b6: movs    r1, #0
+   0x1fff02b8: movs    r2, #1
+   0x1fff02ba: cmp     r3, #0
+   0x1fff02bc: beq.n   0x1fff02c4
+
+       {
+
+               Switch to IRC osc
+
+   0x1fff02be: str     r1, [r0, #48]   ; 0x30                          MAINCLKSEL
+   0x1fff02c0: str     r1, [r0, #52]   ; 0x34                          MAINCLKUEN
+   0x1fff02c2: str     r2, [r0, #52]   ; 0x34                          MAINCLKUEN
+
+       }
+
+               SYSAHBCLKDIV = 1
+
+   0x1fff02c4: str     r2, [r0, #56]   ; 0x38                          SYSAHBCLKDIV
+
+       SYSAHBCLKCTRL |= 0x02010040
+
+   0x1fff02c6: ldr     r0, [pc, #456]  ; (0x1fff0490)  40048080        SYSAHBCLKCTRL
+   0x1fff02c8: ldr     r2, [r0, #0]
+   0x1fff02ca: ldr     r3, [pc, #476]  ; (0x1fff04a8)  02010040
+   0x1fff02cc: orrs    r2, r3
+   0x1fff02ce: str     r2, [r0, #0]
+
+       CT32B1
+               Prescale = 0
+               Prescale counter = 0
+               CTCR |= 0xc;
+
+
+   0x1fff02d0: ldr     r0, [pc, #432]  ; (0x1fff0484)  40018000        CT32B1
+   0x1fff02d2: str     r1, [r0, #12]
+   0x1fff02d4: str     r1, [r0, #16]
+   0x1fff02d6: ldr     r0, [pc, #428]  ; (0x1fff0484)  40018000        CT32B1
+   0x1fff02d8: adds    r0, #64 ; 0x40
+   0x1fff02da: ldr     r1, [r0, #48]   ; 0x30
+   0x1fff02dc: movs    r2, #12
+   0x1fff02de: ands    r1, r2
+   0x1fff02e0: str     r1, [r0, #48]   ; 0x30
+   0x1fff02e2: bx      lr
+
+       }
+       {
+
+   0x1fff02e4: ldr     r0, [pc, #452]  ; (0x1fff04ac)  1fff00c8
+   0x1fff02e6: ldr     r1, [pc, #400]  ; (0x1fff0478)  10000050
+   0x1fff02e8: ldr     r0, [r0, #0]                    000002fc
+   0x1fff02ea: ldr     r0, [r0, #0]
+   0x1fff02ec: str     r0, [r1, #8]
+   0x1fff02ee: bl      0x1fff02b0      ; Set up clocks
+   0x1fff02f2: bl      0x1fff0264
+
+       }
+       
+       {
+
+   0x1fff02f6: push    {r4, r5, r6, lr}
+
+       Mash flash controller to change memory mapping around again
+   
+   0x1fff02f8: ldr     r1, [pc, #436]  ; (0x1fff04b0)  4003c000        flash controller
+   0x1fff02fa: ldr     r0, [r1, #0]
+   0x1fff02fc: movs    r2, #64 ; 0x40
+   0x1fff02fe: orrs    r0, r2
+   0x1fff0300: str     r0, [r1, #0]
+   0x1fff0302: ldr     r0, [pc, #432]  ; (0x1fff04b4)  00000458
+   0x1fff0304: ldr     r5, [pc, #392]  ; (0x1fff0490)  40048080        system control block + 0x80
+   0x1fff0306: movs    r3, #2
+   0x1fff0308: subs    r5, #128        ; 0x80                          system control block
+   0x1fff030a: ldr     r4, [r0, #0]                    (00000458)
+   0x1fff030c: str     r3, [r5, #0]                    scb[0]          system memory remap
+   0x1fff030e: ldr     r3, [pc, #424]  ; (0x1fff04b8)  000005fc
+   0x1fff0310: ldr     r0, [r0, #0]                    (00000458)
+   0x1fff0312: ldr     r3, [r3, #0]                    (000005fc)
+
+
+       Mash flash controller to revert memory mapping change
+
+   0x1fff0314: ldr     r6, [r1, #0]                    (4003c000)
+   0x1fff0316: bics    r6, r2
+   0x1fff0318: str     r6, [r1, #0]
+
+
+       Compute the application checksum
+
+       sum = 0
+       for (i = 0; i < 8; i++) {
+               v = addr[i];
+               sum += v;
+       }
+
+   0x1fff031a: movs    r2, #0
+   0x1fff031c: mov     r1, r2
+   0x1fff031e: lsls    r6, r1, #2
+   0x1fff0320: ldr     r6, [r0, r6]
+   0x1fff0322: adds    r1, r1, #1
+   0x1fff0324: adds    r2, r6, r2
+   0x1fff0326: cmp     r1, #8
+   0x1fff0328: blt.n   0x1fff031e
+
+       Check and see if the application checksum is zero
+
+   0x1fff032a: cmp     r2, #0
+   0x1fff032c: beq.n   0x1fff0334
+   0x1fff032e: movs    r0, #0
+   0x1fff0330: str     r0, [r5, #0]
+
+       Bail if the application isn't valid
+
+       return;
+
+   0x1fff0332: pop     {r4, r5, r6, pc}
+
+
+       Go start the application
+       
+   0x1fff0334: ldr     r0, [pc, #388]  ; (0x1fff04bc)  1fff1ff8
+   0x1fff0336: ldr     r0, [r0, #0]                    1fff1f54
+   0x1fff0338: ldr     r0, [r0, #12]                   (1fff1f60)      1fff1f34
+   0x1fff033a: ldr     r1, [r0, #8]                    1fff13dd
+   0x1fff033c: mov     r0, r3
+   0x1fff033e: blx     r1
+   0x1fff0340: mov     r0, r4
+   0x1fff0342: bl      0x1fff008c
+   0x1fff0346: pop     {r4, r5, r6, pc}
+
+       }
+
+   0x1fff0348: bl      0x1fff02f6
+   0x1fff034c: bl      0x1fff02e4
+
+called from 1fff0088. Appears to be the main entry, called
+after the memory system and stack are set up
+
+main() {
+}
+
+   0x1fff0350: push    {r0, r1, r2, r3, r4, lr}
+
+       Mash the flash cfg again to change memory mapping around
+
+   0x1fff0352: ldr     r4, [pc, #348]  ; (0x1fff04b0)  4003c000
+   0x1fff0354: ldr     r0, [r4, #0]
+   0x1fff0356: movs    r5, #64 ; 0x40
+   0x1fff0358: bics    r0, r5
+   0x1fff035a: str     r0, [r4, #0]
+
+
+   0x1fff035c: ldr     r0, [pc, #332]  ; (0x1fff04ac)  1fff00c8
+   0x1fff035e: ldr     r0, [r0, #0]                    000005ec
+   0x1fff0360: ldr     r1, [r0, #0]
+   0x1fff0362: ldr     r0, [pc, #276]  ; (0x1fff0478)  10000050
+   0x1fff0364: str     r1, [r0, #8]
+   0x1fff0366: ldr     r0, [r4, #0]
+   0x1fff0368: orrs    r0, r5
+   0x1fff036a: str     r0, [r4, #0]
+   0x1fff036c: ldr     r0, [pc, #336]  ; (0x1fff04c0)  000005d0
+   0x1fff036e: ldr     r1, [pc, #340]  ; (0x1fff04c4)  3456abcd
+   0x1fff0370: ldr     r0, [r0, #0]
+   0x1fff0372: cmp     r0, r1
+   0x1fff0374: beq.n   0x1fff037e
+   0x1fff0376: ldr     r0, [r4, #0]
+   0x1fff0378: bics    r0, r5
+   0x1fff037a: str     r0, [r4, #0]
+   0x1fff037c: b.n     0x1fff037c
+
+
+   0x1fff037e: ldr     r0, [pc, #328]  ; (0x1fff04c8)  000005ec
+   0x1fff0380: ldr     r6, [pc, #268]  ; (0x1fff0490)  40048080
+   0x1fff0382: ldr     r0, [r0, #0]
+   0x1fff0384: ldr     r1, [pc, #324]  ; (0x1fff04cc)  534b4950
+   0x1fff0386: ldr     r7, [pc, #328]  ; (0x1fff04d0)  400483c0
+   0x1fff0388: adds    r6, #192        ; 0xc0
+   0x1fff038a: cmp     r0, r1
+   0x1fff038c: bne.n   0x1fff039e
+   0x1fff038e: ldr     r0, [pc, #324]  ; (0x1fff04d4)  12345678
+   0x1fff0390: str     r0, [r7, #16]
+   0x1fff0392: ldr     r0, [pc, #324]  ; (0x1fff04d8)  000005e8
+   0x1fff0394: ldr     r0, [r0, #0]
+   0x1fff0396: str     r0, [r6, #32]
+   0x1fff0398: movs    r0, #0
+   0x1fff039a: str     r0, [r7, #16]
+   0x1fff039c: b.n     0x1fff03be
+       {
+
+   0x1fff039e: movs    r1, #12
+   0x1fff03a0: ldr     r0, [pc, #312]  ; (0x1fff04dc)  000005f0
+   0x1fff03a2: str     r1, [sp, #0]
+   0x1fff03a4: ldr     r0, [r0, #0]
+   0x1fff03a6: str     r0, [sp, #4]
+   0x1fff03a8: ldr     r0, [pc, #272]  ; (0x1fff04bc)  1fff1ff8
+   0x1fff03aa: str     r1, [sp, #8]
+   0x1fff03ac: ldr     r0, [r0, #0]                    1fff1f54
+   0x1fff03ae: add     r1, sp, #12
+   0x1fff03b0: ldr     r0, [r0, #12]                   1fff1f34
+   0x1fff03b2: ldr     r2, [r0, #4]                    1fff161d        
+   0x1fff03b4: mov     r0, sp
+   0x1fff03b6: blx     r2
+   0x1fff03b8: ldr     r0, [r4, #0]
+   0x1fff03ba: orrs    r0, r5
+   0x1fff03bc: str     r0, [r4, #0]
+       }
+
+
+   0x1fff03be: ldr     r0, [pc, #288]  ; (0x1fff04e0)
+   0x1fff03c0: ldr     r0, [r0, #0]
+   0x1fff03c2: str     r0, [r7, #56]   ; 0x38
+   0x1fff03c4: ldr     r0, [pc, #284]  ; (0x1fff04e4)
+   0x1fff03c6: ldr     r0, [r0, #0]
+   0x1fff03c8: str     r0, [r7, #60]   ; 0x3c
+   0x1fff03ca: ldr     r0, [pc, #284]  ; (0x1fff04e8)
+   0x1fff03cc: movs    r1, #0
+   0x1fff03ce: ldr     r0, [r0, #0]
+   0x1fff03d0: mvns    r1, r1
+   0x1fff03d2: subs    r0, #63 ; 0x3f
+   0x1fff03d4: str     r1, [r0, #60]   ; 0x3c
+   0x1fff03d6: ldr     r2, [pc, #276]  ; (0x1fff04ec)
+   0x1fff03d8: ldr     r1, [pc, #180]  ; (0x1fff0490)
+   0x1fff03da: ldr     r0, [r2, #0]
+   0x1fff03dc: str     r0, [r1, #0]
+   0x1fff03de: ldr     r0, [pc, #272]  ; (0x1fff04f0)
+   0x1fff03e0: ldr     r0, [r0, #0]
+   0x1fff03e2: str     r0, [r6, #20]
+   0x1fff03e4: ldr     r0, [pc, #268]  ; (0x1fff04f4)
+   0x1fff03e6: ldr     r6, [pc, #168]  ; (0x1fff0490)
+   0x1fff03e8: ldr     r0, [r0, #0]
+   0x1fff03ea: subs    r6, #128        ; 0x80
+   0x1fff03ec: str     r0, [r6, #40]   ; 0x28
+   0x1fff03ee: ldr     r0, [r2, #0]
+   0x1fff03f0: lsls    r3, r0, #20
+   0x1fff03f2: movs    r0, #1
+   0x1fff03f4: cmp     r3, #0
+   0x1fff03f6: bge.n   0x1fff03fa
+   0x1fff03f8: str     r0, [r1, #20]
+   0x1fff03fa: ldr     r3, [r2, #0]
+   0x1fff03fc: lsls    r3, r3, #19
+   0x1fff03fe: bpl.n   0x1fff0402
+   0x1fff0400: str     r0, [r1, #24]
+   0x1fff0402: ldr     r1, [r2, #0]
+   0x1fff0404: lsls    r3, r1, #17
+   0x1fff0406: ldr     r1, [pc, #240]  ; (0x1fff04f8)
+   0x1fff0408: bpl.n   0x1fff040c
+   0x1fff040a: str     r0, [r1, #8]
+   0x1fff040c: ldr     r2, [r2, #0]
+   0x1fff040e: lsls    r2, r2, #16
+   0x1fff0410: bpl.n   0x1fff0414
+   0x1fff0412: str     r0, [r1, #24]
+   0x1fff0414: ldr     r0, [pc, #228]  ; (0x1fff04fc)  000005c8
+   0x1fff0416: ldr     r2, [r4, #0]
+   0x1fff0418: ldr     r1, [r0, #0]                    
+   0x1fff041a: ldr     r0, [pc, #228]  ; (0x1fff0500)  000005cc
+   0x1fff041c: ldr     r0, [r0, #0]
+   0x1fff041e: bics    r2, r5
+   0x1fff0420: str     r2, [r4, #0]
+   0x1fff0422: ldr     r2, [pc, #224]  ; (0x1fff0504)  20080620
+   0x1fff0424: cmp     r1, r2
+   0x1fff0426: bne.n   0x1fff042c
+   0x1fff0428: bl      0x1fff0094      ; set sp to r0[0], jump to r0[4]
+
+   0x1fff042c: ldr     r0, [r6, #48]   ; 0x30
+   0x1fff042e: lsls    r0, r0, #29
+   0x1fff0430: bmi.n   0x1fff0450
+
+       {
+
+   0x1fff0432: ldr     r0, [pc, #76]   ; (0x1fff0480)  50002100        GPIO PIN0 register
+   0x1fff0434: ldr     r0, [r0, #0]
+   0x1fff0436: lsls    r0, r0, #30
+   0x1fff0438: bmi.n   0x1fff0450
+   0x1fff043a: ldr     r0, [pc, #60]   ; (0x1fff0478)
+   0x1fff043c: ldr     r1, [pc, #48]   ; (0x1fff0470)
+   0x1fff043e: ldr     r0, [r0, #8]
+   0x1fff0440: ldr     r1, [r1, #0]
+   0x1fff0442: cmp     r0, r1
+   0x1fff0444: beq.n   0x1fff0450
+   0x1fff0446: ldr     r1, [pc, #192]  ; (0x1fff0508)
+   0x1fff0448: cmp     r0, r1
+   0x1fff044a: beq.n   0x1fff0450
+   0x1fff044c: bl      0x1fff02e4
+
+       }
+
+   0x1fff0450: bl      0x1fff0348
+   0x1fff0454: ldr     r2, [pc, #44]   ; (0x1fff0484)
+   0x1fff0456: movs    r3, #2
+   0x1fff0458: str     r3, [r2, #4]
+   0x1fff045a: movs    r3, #1
+   0x1fff045c: str     r3, [r2, #4]
+   0x1fff045e: muls    r1, r0
+   0x1fff0460: ldr     r0, [r2, #8]
+   0x1fff0462: cmp     r0, r1
+   0x1fff0464: bcc.n   0x1fff0460
+   0x1fff0466: movs    r0, #0
+   0x1fff0468: str     r0, [r2, #4]
+   0x1fff046a: bx      lr
+
+0x1fff0460:    0x42886890      0x2000d3fc      0x47706050      0x1fff00cc
+0x1fff0470:    0x1fff00d0      0x100000f8      0x10000050      0x1fff00d4
+0x1fff0480:    0x50002100      0x40018000      0x40044040      0x1fff1f10
+0x1fff0490:    0x40048080      0x40008000      0x50002400      0x50002000
+0x1fff04a0:    0x1fff1f24      0x00002ee0      0x02010440      0x1fff00c8
+0x1fff04b0:    0x4003c000      0x00000458      0x000005fc      0x1fff1ff8
+0x1fff04c0:    0x000005d0      0x3456abcd      0x000005ec      0x534b4950
+0x1fff04d0:    0x400483c0      0x12345678      0x000005e8      0x000005f0
+0x1fff04e0:    0x00000430      0x000005e0      0x0000043c      0x000005b0
+0x1fff04f0:    0x000005b4      0x000005bc      0x400480c0      0x000005c8
+0x1fff0500:    0x000005cc      0x20080620      0x4e697370      0x4dffb57f
+0x1fff0510:    0x68a82264      0x9b004669      0xfdc5f000      0x0e240604
+0x1fff0520:    0x6868d11d      0xa9012267      0xf0009b00      0x0604fdbc
+0x1fff0530:    0xd1140e24      0x22692300      0x68e8a902      0xfdb3f000
+0x1fff0540:    0x9802b2c4      0xd0012808      0xe008240c      0xd1062c00
+0x1fff0550:    0x22692300      0x6928a903      0xfda5f000      0x220fb2c4
+
+   0x1fff046c: lsls    r4, r1, #3
+   0x1fff046e: subs    r7, r7, #7
+   0x1fff0470: lsls    r0, r2, #3
+   0x1fff0472: subs    r7, r7, #7
+   0x1fff0474: lsls    r0, r7, #3
+   0x1fff0476: asrs    r0, r0, #32
+   0x1fff0478: lsls    r0, r2, #1
+   0x1fff047a: asrs    r0, r0, #32
+   0x1fff047c: lsls    r4, r2, #3
+   0x1fff047e: subs    r7, r7, #7
+   0x1fff0480: movs    r1, #0
+   0x1fff0482: str     r0, [r0, r0]
+   0x1fff0484: strh    r0, [r0, #0]
+   0x1fff0486: ands    r1, r0
+   0x1fff0488: eors    r0, r0
+   0x1fff048a: ands    r4, r0
+   0x1fff048c: subs    r0, r2, #4
+   0x1fff048e: subs    r7, r7, #7
+   0x1fff0490: strh    r0, [r0, #4]
+   0x1fff0492: ands    r4, r0
+   0x1fff0494: strh    r0, [r0, #0]
+   0x1fff0496: ands    r0, r0
+   0x1fff0498: movs    r4, #0
+   0x1fff049a: str     r0, [r0, r0]
+   0x1fff049c: movs    r0, #0
+   0x1fff049e: str     r0, [r0, r0]
+   0x1fff04a0: subs    r4, r4, #4
+   0x1fff04a2: subs    r7, r7, #7
+   0x1fff04a4: cmp     r6, #224        ; 0xe0
+   0x1fff04a6: movs    r0, r0
+   0x1fff04a8: lsls    r0, r0, #17
+   0x1fff04aa: lsls    r1, r0, #8
+   0x1fff04ac: lsls    r0, r1, #3
+   0x1fff04ae: subs    r7, r7, #7
+   0x1fff04b0: stmia   r0!, {}
+   0x1fff04b2: ands    r3, r0
+   0x1fff04b4: lsls    r0, r3, #17
+   0x1fff04b6: movs    r0, r0
+   0x1fff04b8: lsls    r4, r7, #23
+   0x1fff04ba: movs    r0, r0
+   0x1fff04bc: subs    r0, r7, #7
+   0x1fff04be: subs    r7, r7, #7
+   0x1fff04c0: lsls    r0, r2, #23
+   0x1fff04c2: movs    r0, r0
+   0x1fff04c4: add     r3, sp, #820    ; 0x334
+   0x1fff04c6: adds    r4, #86 ; 0x56
+   0x1fff04c8: lsls    r4, r5, #23
+   0x1fff04ca: movs    r0, r0
+   0x1fff04cc: ldr     r1, [pc, #320]  ; (0x1fff0610)
+   0x1fff04ce: strh    r3, [r1, r5]
+   0x1fff04d0: strh    r0, [r0, #30]
+   0x1fff04d2: ands    r4, r0
+   0x1fff04d4: ldrsb   r0, [r7, r1]
+   0x1fff04d6: asrs    r4, r6, #8
+   0x1fff04d8: lsls    r0, r5, #23
+   0x1fff04da: movs    r0, r0
+   0x1fff04dc: lsls    r0, r6, #23
+   0x1fff04de: movs    r0, r0
+   0x1fff04e0: lsls    r0, r6, #16
+   0x1fff04e2: movs    r0, r0
+   0x1fff04e4: lsls    r0, r4, #23
+   0x1fff04e6: movs    r0, r0
+   0x1fff04e8: lsls    r4, r7, #16
+   0x1fff04ea: movs    r0, r0
+   0x1fff04ec: lsls    r0, r6, #22
+   0x1fff04ee: movs    r0, r0
+   0x1fff04f0: lsls    r4, r6, #22
+   0x1fff04f2: movs    r0, r0
+   0x1fff04f4: lsls    r4, r7, #22
+   0x1fff04f6: movs    r0, r0
+   0x1fff04f8: strh    r0, [r0, #6]
+   0x1fff04fa: ands    r4, r0
+   0x1fff04fc: lsls    r0, r1, #23
+   0x1fff04fe: movs    r0, r0
+   0x1fff0500: lsls    r4, r1, #23
+   0x1fff0502: movs    r0, r0
+   0x1fff0504: lsls    r0, r4, #24
+   0x1fff0506: movs    r0, #8
+   0x1fff0508: strb    r0, [r6, #13]
+   0x1fff050a: ldr     r6, [pc, #420]  ; (0x1fff06b0)
+
+       {
+
+
+   0x1fff050c: push    {r0, r1, r2, r3, r4, r5, r6, lr}
+   0x1fff050e: ldr     r5, [pc, #1020] ; (0x1fff090c)
+   0x1fff0510: movs    r2, #100        ; 0x64
+   0x1fff0512: ldr     r0, [r5, #8]
+   0x1fff0514: mov     r1, sp
+   0x1fff0516: ldr     r3, [sp, #0]
+   0x1fff0518: bl      0x1fff10a6
+   0x1fff051c: lsls    r4, r0, #24
+   0x1fff051e: lsrs    r4, r4, #24
+   0x1fff0520: bne.n   0x1fff055e
+   0x1fff0522: ldr     r0, [r5, #4]
+   0x1fff0524: movs    r2, #103        ; 0x67
+   0x1fff0526: add     r1, sp, #4
+   0x1fff0528: ldr     r3, [sp, #0]
+   0x1fff052a: bl      0x1fff10a6
+   0x1fff052e: lsls    r4, r0, #24
+   0x1fff0530: lsrs    r4, r4, #24
+   0x1fff0532: bne.n   0x1fff055e
+   0x1fff0534: movs    r3, #0
+   0x1fff0536: movs    r2, #105        ; 0x69
+   0x1fff0538: add     r1, sp, #8
+   0x1fff053a: ldr     r0, [r5, #12]
+   0x1fff053c: bl      0x1fff10a6
+   0x1fff0540: uxtb    r4, r0
+   0x1fff0542: ldr     r0, [sp, #8]
+   0x1fff0544: cmp     r0, #8
+   0x1fff0546: beq.n   0x1fff054c
+   0x1fff0548: movs    r4, #12
+   0x1fff054a: b.n     0x1fff055e
+   0x1fff054c: cmp     r4, #0
+   0x1fff054e: bne.n   0x1fff055e
+   0x1fff0550: movs    r3, #0
+   0x1fff0552: movs    r2, #105        ; 0x69
+   0x1fff0554: add     r1, sp, #12
+   0x1fff0556: ldr     r0, [r5, #16]
+   0x1fff0558: bl      0x1fff10a6
+   0x1fff055c: uxtb    r4, r0
+   0x1fff055e: movs    r2, #15
+   0x1fff0560: mov     r0, r4
+   0x1fff0562: ldr     r1, [r5, #0]
+   0x1fff0564: bl      0x1fff1064
+   0x1fff0568: bl      0x1ff0d9c       setup_serial
+   0x1fff056c: ldr     r0, [pc, #928]  ; (0x1fff0910)
+   0x1fff056e: cmp     r4, #0
+   0x1fff0570: bne.n   0x1fff05a2
+   0x1fff0572: b.n     0x1fff059c
+   0x1fff0574: ldr     r1, [sp, #12]
+   0x1fff0576: cmp     r1, #0
+   0x1fff0578: beq.n   0x1fff0586
+   0x1fff057a: ldr     r1, [r0, #4]
+   0x1fff057c: lsls    r1, r1, #23
+   0x1fff057e: bpl.n   0x1fff057a
+   0x1fff0580: ldr     r1, [r0, #4]
+   0x1fff0582: lsls    r1, r1, #23
+   0x1fff0584: bmi.n   0x1fff0580
+   0x1fff0586: ldr     r1, [sp, #8]
+   0x1fff0588: cmp     r1, #8
+   0x1fff058a: bne.n   0x1fff059c
+   0x1fff058c: ldr     r2, [r0, #4]
+   0x1fff058e: ldr     r1, [sp, #4]
+   0x1fff0590: strb    r2, [r1, #0]
+   0x1fff0592: adds    r1, r1, #1
+   0x1fff0594: str     r1, [sp, #4]
+   0x1fff0596: ldr     r1, [sp, #0]
+   0x1fff0598: subs    r1, r1, #1
+   0x1fff059a: str     r1, [sp, #0]
+   0x1fff059c: ldr     r1, [sp, #0]
+   0x1fff059e: cmp     r1, #0
+   0x1fff05a0: bne.n   0x1fff0574
+   0x1fff05a2: pop     {r0, r1, r2, r3, r4, r5, r6, pc}
+
+       }
+
+
+   0x1fff05a4: push    {r4, r5, r6, lr}
+   0x1fff05a6: ldr     r5, [pc, #868]  ; (0x1fff090c)
+   0x1fff05a8: ldr     r6, [pc, #872]  ; (0x1fff0914)
+   0x1fff05aa: movs    r3, #0
+   0x1fff05ac: movs    r2, #105        ; 0x69
+   0x1fff05ae: adds    r1, r6, #4
+   0x1fff05b0: ldr     r0, [r5, #4]
+   0x1fff05b2: bl      0x1fff10a6
+   0x1fff05b6: mov     r4, r6
+   0x1fff05b8: adds    r4, #20
+   0x1fff05ba: str     r0, [r4, #0]
+   0x1fff05bc: cmp     r0, #0
+   0x1fff05be: bne.n   0x1fff05f4
+   0x1fff05c0: mov     r1, r4
+   0x1fff05c2: movs    r3, #0
+   0x1fff05c4: movs    r2, #105        ; 0x69
+   0x1fff05c6: subs    r1, #12
+   0x1fff05c8: ldr     r0, [r5, #8]
+   0x1fff05ca: bl      0x1fff10a6
+   0x1fff05ce: str     r0, [r4, #0]
+   0x1fff05d0: cmp     r0, #0
+   0x1fff05d2: bne.n   0x1fff05f4
+   0x1fff05d4: mov     r1, r4
+   0x1fff05d6: movs    r3, #0
+   0x1fff05d8: movs    r2, #105        ; 0x69
+   0x1fff05da: subs    r1, #8
+   0x1fff05dc: ldr     r0, [r5, #12]
+   0x1fff05de: bl      0x1fff10a6
+   0x1fff05e2: str     r0, [r4, #0]
+   0x1fff05e4: cmp     r0, #0
+   0x1fff05e6: bne.n   0x1fff05f4
+   0x1fff05e8: movs    r0, #56 ; 0x38
+   0x1fff05ea: str     r0, [r6, #0]
+   0x1fff05ec: mov     r1, r4
+   0x1fff05ee: mov     r0, r6
+   0x1fff05f0: bl      0x1fff1ff0
+   0x1fff05f4: ldr     r1, [r5, #4]
+   0x1fff05f6: movs    r2, #15
+   0x1fff05f8: ldr     r0, [r4, #0]
+   0x1fff05fa: bl      0x1fff1064
+   0x1fff05fe: bl      0x1ff0d9c       setup_serial
+   0x1fff0602: ldr     r0, [r4, #0]
+   0x1fff0604: cmp     r0, #10
+   0x1fff0606: bne.n   0x1fff0616
+   0x1fff0608: ldr     r1, [r5, #4]
+   0x1fff060a: movs    r2, #15
+   0x1fff060c: ldr     r0, [r4, #4]
+   0x1fff060e: bl      0x1fff1064
+   0x1fff0612: bl      0x1ff0d9c       setup_serial
+   0x1fff0616: pop     {r4, r5, r6, pc}
+
+
+
+   0x1fff0618: push    {r4, r5, r6, lr}
+   0x1fff061a: ldr     r5, [pc, #752]  ; (0x1fff090c)
+   0x1fff061c: ldr     r6, [pc, #756]  ; (0x1fff0914)
+   0x1fff061e: movs    r3, #0
+   0x1fff0620: movs    r2, #105        ; 0x69
+   0x1fff0622: adds    r1, r6, #4
+   0x1fff0624: ldr     r0, [r5, #4]
+   0x1fff0626: bl      0x1fff10a6
+   0x1fff062a: mov     r4, r6
+   0x1fff062c: adds    r4, #20
+   0x1fff062e: str     r0, [r4, #0]
+   0x1fff0630: cmp     r0, #0
+   0x1fff0632: bne.n   0x1fff0654
+   0x1fff0634: mov     r1, r4
+   0x1fff0636: movs    r3, #0
+   0x1fff0638: movs    r2, #105        ; 0x69
+   0x1fff063a: subs    r1, #12
+   0x1fff063c: ldr     r0, [r5, #8]
+   0x1fff063e: bl      0x1fff10a6
+   0x1fff0642: str     r0, [r4, #0]
+   0x1fff0644: cmp     r0, #0
+   0x1fff0646: bne.n   0x1fff0654
+   0x1fff0648: movs    r0, #53 ; 0x35
+   0x1fff064a: str     r0, [r6, #0]
+   0x1fff064c: mov     r1, r4
+   0x1fff064e: mov     r0, r6
+   0x1fff0650: bl      0x1fff1ff0
+   0x1fff0654: ldr     r1, [r5, #4]
+   0x1fff0656: movs    r2, #15
+   0x1fff0658: ldr     r0, [r4, #0]
+   0x1fff065a: bl      0x1fff1064
+   0x1fff065e: bl      0x1ff0d9c       setup_serial
+   0x1fff0662: ldr     r0, [r4, #0]
+   0x1fff0664: cmp     r0, #8
+   0x1fff0666: bne.n   0x1fff06a6
+   0x1fff0668: ldr     r0, [pc, #684]  ; (0x1fff0918)
+   0x1fff066a: ldr     r1, [pc, #688]  ; (0x1fff091c)
+   0x1fff066c: ldr     r0, [r0, #0]
+   0x1fff066e: ldr     r1, [r1, #0]
+   0x1fff0670: cmp     r0, r1
+   0x1fff0672: beq.n   0x1fff0684
+   0x1fff0674: ldr     r1, [pc, #680]  ; (0x1fff0920)
+   0x1fff0676: ldr     r1, [r1, #0]
+   0x1fff0678: cmp     r0, r1
+   0x1fff067a: beq.n   0x1fff0684
+   0x1fff067c: ldr     r1, [pc, #676]  ; (0x1fff0924)
+   0x1fff067e: ldr     r1, [r1, #0]
+   0x1fff0680: cmp     r0, r1
+   0x1fff0682: bne.n   0x1fff068a
+   0x1fff0684: movs    r0, #0
+   0x1fff0686: str     r0, [r4, #4]
+   0x1fff0688: str     r0, [r4, #8]
+   0x1fff068a: ldr     r1, [r5, #4]
+   0x1fff068c: movs    r2, #15
+   0x1fff068e: ldr     r0, [r4, #4]
+   0x1fff0690: bl      0x1fff1064
+   0x1fff0694: bl      0x1ff0d9c       setup_serial
+   0x1fff0698: ldr     r1, [r5, #4]
+   0x1fff069a: movs    r2, #15
+   0x1fff069c: ldr     r0, [r4, #8]
+   0x1fff069e: bl      0x1fff1064
+   0x1fff06a2: bl      0x1ff0d9c       setup_serial
+   0x1fff06a6: pop     {r4, r5, r6, pc}
+
+
+
+   0x1fff06a8: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff06aa: ldr     r0, [pc, #636]  ; (0x1fff0928)
+   0x1fff06ac: ldr     r1, [pc, #604]  ; (0x1fff090c)
+   0x1fff06ae: ldr     r2, [r0, #0]
+   0x1fff06b0: ldr     r0, [r1, #4]
+   0x1fff06b2: cmp     r2, #1
+   0x1fff06b4: beq.n   0x1fff06ce
+   0x1fff06b6: ldr     r4, [pc, #604]  ; (0x1fff0914)
+   0x1fff06b8: movs    r3, #0
+   0x1fff06ba: movs    r2, #105        ; 0x69
+   0x1fff06bc: adds    r1, r4, #4
+   0x1fff06be: bl      0x1fff10a6
+   0x1fff06c2: mov     r5, r4
+   0x1fff06c4: adds    r5, #20
+   0x1fff06c6: str     r0, [r5, #0]
+   0x1fff06c8: cmp     r0, #0
+   0x1fff06ca: beq.n   0x1fff06d6
+   0x1fff06cc: b.n     0x1fff06e8
+   0x1fff06ce: movs    r2, #15
+   0x1fff06d0: mov     r1, r0
+   0x1fff06d2: mov     r0, r2
+   0x1fff06d4: b.n     0x1fff0784
+   0x1fff06d6: ldr     r0, [pc, #564]  ; (0x1fff090c)
+   0x1fff06d8: ldr     r1, [pc, #568]  ; (0x1fff0914)
+   0x1fff06da: ldr     r0, [r0, #8]
+   0x1fff06dc: movs    r3, #0
+   0x1fff06de: movs    r2, #105        ; 0x69
+   0x1fff06e0: adds    r1, #8
+   0x1fff06e2: bl      0x1fff10a6
+   0x1fff06e6: str     r0, [r5, #0]
+   0x1fff06e8: ldr     r0, [pc, #556]  ; (0x1fff0918)
+   0x1fff06ea: ldr     r1, [pc, #560]  ; (0x1fff091c)
+   0x1fff06ec: ldr     r0, [r0, #0]
+   0x1fff06ee: ldr     r1, [r1, #0]
+   0x1fff06f0: movs    r2, #19
+   0x1fff06f2: ldr     r6, [pc, #568]  ; (0x1fff092c)
+   0x1fff06f4: movs    r7, #64 ; 0x40
+   0x1fff06f6: cmp     r0, r1
+   0x1fff06f8: beq.n   0x1fff0702
+   0x1fff06fa: ldr     r1, [pc, #548]  ; (0x1fff0920)
+   0x1fff06fc: ldr     r1, [r1, #0]
+   0x1fff06fe: cmp     r0, r1
+   0x1fff0700: bne.n   0x1fff071c
+   0x1fff0702: ldr     r0, [r6, #0]
+   0x1fff0704: orrs    r0, r7
+   0x1fff0706: str     r0, [r6, #0]
+   0x1fff0708: ldr     r0, [r4, #4]
+   0x1fff070a: cmp     r0, #0
+   0x1fff070c: bne.n   0x1fff0718
+   0x1fff070e: ldr     r0, [pc, #544]  ; (0x1fff0930)
+   0x1fff0710: ldr     r1, [r4, #8]
+   0x1fff0712: ldr     r0, [r0, #0]
+   0x1fff0714: cmp     r1, r0
+   0x1fff0716: beq.n   0x1fff0730
+   0x1fff0718: str     r2, [r5, #0]
+   0x1fff071a: b.n     0x1fff0730
+   0x1fff071c: ldr     r1, [pc, #516]  ; (0x1fff0924)
+   0x1fff071e: ldr     r1, [r1, #0]
+   0x1fff0720: cmp     r0, r1
+   0x1fff0722: bne.n   0x1fff0736
+   0x1fff0724: ldr     r0, [r6, #0]
+   0x1fff0726: orrs    r0, r7
+   0x1fff0728: str     r0, [r6, #0]
+   0x1fff072a: ldr     r0, [r4, #4]
+   0x1fff072c: cmp     r0, #0
+   0x1fff072e: beq.n   0x1fff070e
+   0x1fff0730: ldr     r0, [r6, #0]
+   0x1fff0732: bics    r0, r7
+   0x1fff0734: str     r0, [r6, #0]
+   0x1fff0736: ldr     r0, [r5, #0]
+   0x1fff0738: cmp     r0, #0
+   0x1fff073a: bne.n   0x1fff0750
+   0x1fff073c: movs    r0, #52 ; 0x34
+   0x1fff073e: str     r0, [r4, #0]
+   0x1fff0740: ldr     r0, [pc, #496]  ; (0x1fff0934)
+   0x1fff0742: ldr     r1, [pc, #464]  ; (0x1fff0914)
+   0x1fff0744: ldr     r0, [r0, #0]
+   0x1fff0746: str     r0, [r4, #12]
+   0x1fff0748: adds    r1, #20
+   0x1fff074a: ldr     r0, [pc, #456]  ; (0x1fff0914)
+   0x1fff074c: bl      0x1fff1ff0
+   0x1fff0750: ldr     r0, [r6, #0]
+   0x1fff0752: orrs    r0, r7
+   0x1fff0754: str     r0, [r6, #0]
+   0x1fff0756: ldr     r0, [r4, #4]
+   0x1fff0758: cmp     r0, #0
+   0x1fff075a: bne.n   0x1fff0776
+   0x1fff075c: ldr     r0, [pc, #464]  ; (0x1fff0930)
+   0x1fff075e: ldr     r1, [r4, #8]
+   0x1fff0760: ldr     r0, [r0, #0]
+   0x1fff0762: cmp     r1, r0
+   0x1fff0764: bne.n   0x1fff0776
+   0x1fff0766: ldr     r0, [r6, #0]
+   0x1fff0768: bics    r0, r7
+   0x1fff076a: str     r0, [r6, #0]
+   0x1fff076c: ldr     r0, [pc, #456]  ; (0x1fff0938)
+   0x1fff076e: ldr     r0, [r0, #0]
+   0x1fff0770: ldr     r1, [r0, #0]
+   0x1fff0772: ldr     r0, [pc, #420]  ; (0x1fff0918)
+   0x1fff0774: str     r1, [r0, #0]
+   0x1fff0776: ldr     r0, [r6, #0]
+   0x1fff0778: bics    r0, r7
+   0x1fff077a: str     r0, [r6, #0]
+   0x1fff077c: ldr     r0, [pc, #396]  ; (0x1fff090c)
+   0x1fff077e: movs    r2, #15
+   0x1fff0780: ldr     r1, [r0, #4]
+   0x1fff0782: ldr     r0, [r5, #0]
+   0x1fff0784: bl      0x1fff1064
+   0x1fff0788: bl      0x1ff0d9c       setup_serial
+   0x1fff078c: pop     {r3, r4, r5, r6, r7, pc}
+
+
+
+   0x1fff078e: push    {r4, r5, r6, lr}
+   0x1fff0790: ldr     r0, [pc, #404]  ; (0x1fff0928)
+   0x1fff0792: ldr     r5, [pc, #376]  ; (0x1fff090c)
+   0x1fff0794: ldr     r1, [r0, #0]
+   0x1fff0796: ldr     r0, [r5, #4]
+   0x1fff0798: cmp     r1, #1
+   0x1fff079a: beq.n   0x1fff07b4
+   0x1fff079c: ldr     r4, [pc, #372]  ; (0x1fff0914)
+   0x1fff079e: movs    r3, #0
+   0x1fff07a0: movs    r2, #105        ; 0x69
+   0x1fff07a2: adds    r1, r4, #4
+   0x1fff07a4: bl      0x1fff10a6
+   0x1fff07a8: mov     r6, r4
+   0x1fff07aa: adds    r6, #20
+   0x1fff07ac: str     r0, [r6, #0]
+   0x1fff07ae: cmp     r0, #0
+   0x1fff07b0: beq.n   0x1fff07bc
+   0x1fff07b2: b.n     0x1fff07e0
+   0x1fff07b4: movs    r2, #15
+   0x1fff07b6: mov     r1, r0
+   0x1fff07b8: mov     r0, r2
+   0x1fff07ba: b.n     0x1fff082a
+   0x1fff07bc: ldr     r1, [pc, #340]  ; (0x1fff0914)
+   0x1fff07be: movs    r3, #0
+   0x1fff07c0: movs    r2, #105        ; 0x69
+   0x1fff07c2: adds    r1, #8
+   0x1fff07c4: ldr     r0, [r5, #8]
+   0x1fff07c6: bl      0x1fff10a6
+   0x1fff07ca: str     r0, [r6, #0]
+   0x1fff07cc: cmp     r0, #0
+   0x1fff07ce: bne.n   0x1fff07e0
+   0x1fff07d0: ldr     r1, [pc, #320]  ; (0x1fff0914)
+   0x1fff07d2: movs    r3, #0
+   0x1fff07d4: movs    r2, #105        ; 0x69
+   0x1fff07d6: adds    r1, #12
+   0x1fff07d8: ldr     r0, [r5, #12]
+   0x1fff07da: bl      0x1fff10a6
+   0x1fff07de: str     r0, [r6, #0]
+   0x1fff07e0: ldr     r0, [pc, #308]  ; (0x1fff0918)
+   0x1fff07e2: ldr     r1, [pc, #320]  ; (0x1fff0924)
+   0x1fff07e4: ldr     r0, [r0, #0]
+   0x1fff07e6: ldr     r1, [r1, #0]
+   0x1fff07e8: cmp     r0, r1
+   0x1fff07ea: bne.n   0x1fff080a
+   0x1fff07ec: ldr     r0, [pc, #316]  ; (0x1fff092c)
+   0x1fff07ee: ldr     r1, [r0, #0]
+   0x1fff07f0: movs    r2, #64 ; 0x40
+   0x1fff07f2: orrs    r1, r2
+   0x1fff07f4: str     r1, [r0, #0]
+   0x1fff07f6: ldr     r3, [pc, #324]  ; (0x1fff093c)
+   0x1fff07f8: ldr     r1, [r4, #4]
+   0x1fff07fa: ldr     r3, [r3, #0]
+   0x1fff07fc: cmp     r1, r3
+   0x1fff07fe: bcs.n   0x1fff0804
+   0x1fff0800: movs    r1, #19
+   0x1fff0802: str     r1, [r6, #0]
+   0x1fff0804: ldr     r1, [r0, #0]
+   0x1fff0806: bics    r1, r2
+   0x1fff0808: str     r1, [r0, #0]
+   0x1fff080a: ldr     r0, [r6, #0]
+   0x1fff080c: cmp     r0, #0
+   0x1fff080e: bne.n   0x1fff0824
+   0x1fff0810: movs    r0, #51 ; 0x33
+   0x1fff0812: str     r0, [r4, #0]
+   0x1fff0814: ldr     r0, [pc, #284]  ; (0x1fff0934)
+   0x1fff0816: ldr     r1, [pc, #252]  ; (0x1fff0914)
+   0x1fff0818: ldr     r0, [r0, #0]
+   0x1fff081a: str     r0, [r4, #16]
+   0x1fff081c: adds    r1, #20
+   0x1fff081e: ldr     r0, [pc, #244]  ; (0x1fff0914)
+   0x1fff0820: bl      0x1fff1ff0
+   0x1fff0824: ldr     r1, [r5, #4]
+   0x1fff0826: movs    r2, #15
+   0x1fff0828: ldr     r0, [r6, #0]
+   0x1fff082a: bl      0x1fff1064
+   0x1fff082e: bl      0x1ff0d9c       setup_serial
+   0x1fff0832: pop     {r4, r5, r6, pc}
+
+       {
+
+   0x1fff0834: push    {r4, r5, r6, lr}
+   0x1fff0836: ldr     r5, [pc, #212]  ; (0x1fff090c)
+   0x1fff0838: ldr     r6, [pc, #216]  ; (0x1fff0914)
+   0x1fff083a: movs    r3, #0
+   0x1fff083c: movs    r2, #105        ; 0x69
+   0x1fff083e: adds    r1, r6, #4
+   0x1fff0840: ldr     r0, [r5, #4]
+   0x1fff0842: bl      0x1fff10a6
+   0x1fff0846: mov     r4, r6
+   0x1fff0848: adds    r4, #20
+   0x1fff084a: str     r0, [r4, #0]
+   0x1fff084c: cmp     r0, #0
+   0x1fff084e: bne.n   0x1fff0870
+   0x1fff0850: mov     r1, r4
+   0x1fff0852: movs    r3, #0
+   0x1fff0854: movs    r2, #105        ; 0x69
+   0x1fff0856: subs    r1, #12
+   0x1fff0858: ldr     r0, [r5, #8]
+   0x1fff085a: bl      0x1fff10a6
+   0x1fff085e: str     r0, [r4, #0]
+   0x1fff0860: cmp     r0, #0
+   0x1fff0862: bne.n   0x1fff0870
+   0x1fff0864: movs    r0, #50 ; 0x32
+   0x1fff0866: str     r0, [r6, #0]
+   0x1fff0868: mov     r1, r4
+   0x1fff086a: mov     r0, r6
+   0x1fff086c: bl      0x1fff1ff0
+   0x1fff0870: ldr     r1, [r5, #4]
+   0x1fff0872: movs    r2, #15
+   0x1fff0874: ldr     r0, [r4, #0]
+   0x1fff0876: bl      0x1fff1064
+   0x1fff087a: bl      0x1ff0d9c       setup_serial
+   0x1fff087e: pop     {r4, r5, r6, pc}
+
+       }
+       {
+
+   0x1fff0880: push    {r3, r4, r5, lr}
+   0x1fff0882: ldr     r5, [pc, #136]  ; (0x1fff090c)
+   0x1fff0884: movs    r3, #0
+   0x1fff0886: movs    r2, #105        ; 0x69
+   0x1fff0888: mov     r1, sp
+   0x1fff088a: ldr     r0, [r5, #4]
+   0x1fff088c: bl      0x1fff10a6
+   0x1fff0890: uxtb    r4, r0
+   0x1fff0892: movs    r2, #15
+   0x1fff0894: mov     r0, r4
+   0x1fff0896: ldr     r1, [r5, #4]
+   0x1fff0898: bl      0x1fff1064
+   0x1fff089c: bl      0x1ff0d9c       setup_serial
+   0x1fff08a0: cmp     r4, #0
+   0x1fff08a2: bne.n   0x1fff08b0
+   0x1fff08a4: ldr     r0, [sp, #0]
+   0x1fff08a6: cmp     r0, #0
+   0x1fff08a8: beq.n   0x1fff08ac
+   0x1fff08aa: movs    r0, #1
+   0x1fff08ac: bl      0x1fff0e54
+   0x1fff08b0: pop     {r3, r4, r5, pc}
+
+       }
+       {
+
+   0x1fff08b2: push    {r2, r3, r4, r5, r6, lr}
+   0x1fff08b4: ldr     r5, [pc, #84]   ; (0x1fff090c)  100000f8
+   0x1fff08b6: movs    r3, #0
+   0x1fff08b8: movs    r2, #105        ; 0x69
+   0x1fff08ba: add     r1, sp, #4
+   0x1fff08bc: ldr     r0, [r5, #4]
+   0x1fff08be: bl      0x1fff10a6
+   0x1fff08c2: movs    r3, #0
+   0x1fff08c4: movs    r2, #105        ; 0x69
+   0x1fff08c6: mov     r1, sp
+   0x1fff08c8: ldr     r0, [r5, #8]
+   0x1fff08ca: bl      0x1fff10a6
+   0x1fff08ce: lsls    r4, r0, #24
+   0x1fff08d0: lsrs    r4, r4, #24
+   0x1fff08d2: bne.n   0x1fff0942
+   0x1fff08d4: movs    r0, #75 ; 0x4b
+   0x1fff08d6: ldr     r1, [sp, #4]
+   0x1fff08d8: lsls    r0, r0, #7
+   0x1fff08da: cmp     r1, r0
+   0x1fff08dc: beq.n   0x1fff0900
+   0x1fff08de: lsls    r0, r0, #1
+   0x1fff08e0: cmp     r1, r0
+   0x1fff08e2: beq.n   0x1fff0900
+   0x1fff08e4: lsls    r0, r0, #1
+   0x1fff08e6: cmp     r1, r0
+   0x1fff08e8: beq.n   0x1fff0900
+   0x1fff08ea: movs    r0, #225        ; 0xe1
+   0x1fff08ec: lsls    r0, r0, #8
+   0x1fff08ee: cmp     r1, r0
+   0x1fff08f0: beq.n   0x1fff0900
+   0x1fff08f2: lsls    r0, r0, #1
+   0x1fff08f4: cmp     r1, r0
+   0x1fff08f6: beq.n   0x1fff0900
+   0x1fff08f8: lsls    r0, r0, #1
+   0x1fff08fa: cmp     r1, r0
+   0x1fff08fc: beq.n   0x1fff0900
+   0x1fff08fe: movs    r4, #17
+   0x1fff0900: ldr     r0, [sp, #0]
+   0x1fff0902: cmp     r0, #1
+   0x1fff0904: beq.n   0x1fff0942
+   0x1fff0906: cmp     r0, #2
+   0x1fff0908: beq.n   0x1fff0942
+   0x1fff090a: b.n     0x1fff0940
+
+       }
+
+0x1fff0900:    0x28019800      0x2802d01d      0xe019d01b      0x100000f8
+0x1fff0910:    0x50002100      0x1000010c      0x10000058      0x1fff00cc
+0x1fff0920:    0x1fff00d0      0x1fff00d4      0x10000054      0x4003c000
+0x1fff0930:    0x00000440      0x10000050      0x1fff00c8      0x00000520
+0x1fff0940:    0x220f2412      0x68694620      0xfb8cf000      0xfa26f000
+
+   0x1fff090c: lsls    r0, r7, #3
+   0x1fff090e: asrs    r0, r0, #32
+   0x1fff0910: movs    r1, #0
+   0x1fff0912: str     r0, [r0, r0]
+   0x1fff0914: lsls    r4, r1, #4
+   0x1fff0916: asrs    r0, r0, #32
+   0x1fff0918: lsls    r0, r3, #1
+   0x1fff091a: asrs    r0, r0, #32
+   0x1fff091c: lsls    r4, r1, #3
+   0x1fff091e: subs    r7, r7, #7
+   0x1fff0920: lsls    r0, r2, #3
+   0x1fff0922: subs    r7, r7, #7
+   0x1fff0924: lsls    r4, r2, #3
+   0x1fff0926: subs    r7, r7, #7
+   0x1fff0928: lsls    r4, r2, #1
+   0x1fff092a: asrs    r0, r0, #32
+   0x1fff092c: stmia   r0!, {}
+   0x1fff092e: ands    r3, r0
+   0x1fff0930: lsls    r0, r0, #17
+   0x1fff0932: movs    r0, r0
+   0x1fff0934: lsls    r0, r2, #1
+   0x1fff0936: asrs    r0, r0, #32
+   0x1fff0938: lsls    r0, r1, #3
+   0x1fff093a: subs    r7, r7, #7
+   0x1fff093c: lsls    r0, r4, #20
+   0x1fff093e: movs    r0, r0
+
+   0x1fff0940: movs    r4, #18
+   0x1fff0942: movs    r2, #15
+   0x1fff0944: mov     r0, r4
+   0x1fff0946: ldr     r1, [r5, #4]
+   0x1fff0948: bl      0x1fff1064
+   0x1fff094c: bl      0x1ff0d9c       setup_serial
+   0x1fff0950: cmp     r4, #0
+   0x1fff0952: bne.n   0x1fff0960
+   0x1fff0954: ldr     r0, [pc, #920]  ; (0x1fff0cf0)
+   0x1fff0956: ldr     r1, [sp, #0]
+   0x1fff0958: ldr     r2, [r0, #0]
+   0x1fff095a: ldr     r0, [sp, #4]
+   0x1fff095c: bl      0x1fff0d28
+   0x1fff0960: pop     {r2, r3, r4, r5, r6, pc}
+
+
+
+   0x1fff0962: push    {r3, r4, r5, lr}
+   0x1fff0964: ldr     r4, [pc, #908]  ; (0x1fff0cf4)
+   0x1fff0966: movs    r3, #0
+   0x1fff0968: movs    r2, #105        ; 0x69
+   0x1fff096a: mov     r1, sp
+   0x1fff096c: ldr     r0, [r4, #4]
+   0x1fff096e: bl      0x1fff10a6
+   0x1fff0972: lsls    r0, r0, #24
+   0x1fff0974: lsrs    r0, r0, #24
+   0x1fff0976: bne.n   0x1fff098a
+   0x1fff0978: ldr     r2, [pc, #892]  ; (0x1fff0cf8)
+   0x1fff097a: ldr     r1, [sp, #0]
+   0x1fff097c: cmp     r1, r2
+   0x1fff097e: bne.n   0x1fff0988
+   0x1fff0980: ldr     r2, [pc, #888]  ; (0x1fff0cfc)
+   0x1fff0982: movs    r1, #0
+   0x1fff0984: str     r1, [r2, #0]
+   0x1fff0986: b.n     0x1fff098a
+   0x1fff0988: movs    r0, #16
+   0x1fff098a: movs    r2, #15
+   0x1fff098c: ldr     r1, [r4, #4]
+   0x1fff098e: bl      0x1fff1064
+   0x1fff0992: bl      0x1ff0d9c       setup_serial
+   0x1fff0996: pop     {r3, r4, r5, pc}
+
+
+
+   0x1fff0998: push    {r3, r4, r5, lr}
+   0x1fff099a: ldr     r0, [pc, #864]  ; (0x1fff0cfc)
+   0x1fff099c: ldr     r5, [pc, #852]  ; (0x1fff0cf4)
+   0x1fff099e: ldr     r0, [r0, #0]
+   0x1fff09a0: cmp     r0, #0
+   0x1fff09a2: beq.n   0x1fff09a8
+   0x1fff09a4: movs    r4, #15
+   0x1fff09a6: b.n     0x1fff09dc
+   0x1fff09a8: movs    r4, #0
+   0x1fff09aa: ldr     r0, [pc, #852]  ; (0x1fff0d00)
+   0x1fff09ac: ldr     r1, [r5, #4]
+   0x1fff09ae: bl      0x1fff0fb8
+   0x1fff09b2: cmp     r0, #0
+   0x1fff09b4: beq.n   0x1fff09ca
+   0x1fff09b6: movs    r3, #0
+   0x1fff09b8: movs    r2, #102        ; 0x66
+   0x1fff09ba: mov     r1, sp
+   0x1fff09bc: ldr     r0, [r5, #4]
+   0x1fff09be: bl      0x1fff10a6
+   0x1fff09c2: lsls    r4, r0, #24
+   0x1fff09c4: lsrs    r4, r4, #24
+   0x1fff09c6: beq.n   0x1fff09ce
+   0x1fff09c8: b.n     0x1fff09dc
+   0x1fff09ca: ldr     r0, [pc, #824]  ; (0x1fff0d04)
+   0x1fff09cc: str     r0, [sp, #0]
+   0x1fff09ce: ldr     r0, [r5, #8]
+   0x1fff09d0: ldrb    r0, [r0, #0]
+   0x1fff09d2: cmp     r0, #84 ; 0x54
+   0x1fff09d4: beq.n   0x1fff09f4
+   0x1fff09d6: cmp     r0, #65 ; 0x41
+   0x1fff09d8: beq.n   0x1fff09dc
+   0x1fff09da: movs    r4, #12
+   0x1fff09dc: movs    r2, #15
+   0x1fff09de: mov     r0, r4
+   0x1fff09e0: ldr     r1, [r5, #4]
+   0x1fff09e2: bl      0x1fff1064
+   0x1fff09e6: bl      0x1ff0d9c       setup_serial
+   0x1fff09ea: cmp     r4, #0
+   0x1fff09ec: bne.n   0x1fff09f2
+   0x1fff09ee: ldr     r0, [sp, #0]
+   0x1fff09f0: blx     r0
+   0x1fff09f2: pop     {r3, r4, r5, pc}
+   0x1fff09f4: ldr     r0, [sp, #0]
+   0x1fff09f6: movs    r1, #1
+   0x1fff09f8: orrs    r0, r1
+   0x1fff09fa: str     r0, [sp, #0]
+   0x1fff09fc: b.n     0x1fff09dc
+
+
+
+   0x1fff09fe: push    {r4, r5, r6, r7, lr}
+   0x1fff0a00: ldr     r5, [pc, #752]  ; (0x1fff0cf4)
+   0x1fff0a02: sub     sp, #20
+   0x1fff0a04: movs    r3, #0
+   0x1fff0a06: movs    r2, #100        ; 0x64
+   0x1fff0a08: add     r1, sp, #4
+   0x1fff0a0a: ldr     r0, [r5, #8]
+   0x1fff0a0c: bl      0x1fff10a6
+   0x1fff0a10: lsls    r4, r0, #24
+   0x1fff0a12: lsrs    r4, r4, #24
+   0x1fff0a14: bne.n   0x1fff0a24
+   0x1fff0a16: ldr     r0, [r5, #4]
+   0x1fff0a18: movs    r2, #102        ; 0x66
+   0x1fff0a1a: add     r1, sp, #8
+   0x1fff0a1c: ldr     r3, [sp, #4]
+   0x1fff0a1e: bl      0x1fff10a6
+   0x1fff0a22: uxtb    r4, r0
+   0x1fff0a24: movs    r2, #15
+   0x1fff0a26: mov     r0, r4
+   0x1fff0a28: ldr     r1, [r5, #0]
+   0x1fff0a2a: bl      0x1fff1064
+   0x1fff0a2e: bl      0x1ff0d9c       setup_serial
+   0x1fff0a32: cmp     r4, #0
+   0x1fff0a34: bne.n   0x1fff0abe
+   0x1fff0a36: movs    r1, #1
+   0x1fff0a38: ldr     r0, [sp, #8]
+   0x1fff0a3a: lsls    r1, r1, #15
+   0x1fff0a3c: cmp     r0, r1
+   0x1fff0a3e: bcs.n   0x1fff0a44
+   0x1fff0a40: adds    r0, r0, r1
+   0x1fff0a42: str     r0, [sp, #8]
+   0x1fff0a44: mov     r7, r0
+   0x1fff0a46: movs    r6, #0
+   0x1fff0a48: ldr     r0, [sp, #4]
+   0x1fff0a4a: mov     r4, r6
+   0x1fff0a4c: str     r0, [sp, #12]
+   0x1fff0a4e: b.n     0x1fff0ab8
+   0x1fff0a50: cmp     r5, #45 ; 0x2d
+   0x1fff0a52: ble.n   0x1fff0a56
+   0x1fff0a54: movs    r5, #45 ; 0x2d
+   0x1fff0a56: mov     r2, r5
+   0x1fff0a58: ldr     r1, [pc, #684]  ; (0x1fff0d08)
+   0x1fff0a5a: ldr     r0, [sp, #8]
+   0x1fff0a5c: bl      0x1fff0e76
+   0x1fff0a60: adds    r6, r0, r6
+   0x1fff0a62: ldr     r0, [pc, #676]  ; (0x1fff0d08)
+   0x1fff0a64: bl      0x1ff0d9c       setup_serial
+   0x1fff0a68: cmp     r0, #0
+   0x1fff0a6a: bne.n   0x1fff0abe
+   0x1fff0a6c: ldr     r0, [sp, #8]
+   0x1fff0a6e: adds    r4, r4, #1
+   0x1fff0a70: adds    r0, r0, r5
+   0x1fff0a72: str     r0, [sp, #8]
+   0x1fff0a74: ldr     r0, [sp, #4]
+   0x1fff0a76: subs    r0, r0, r5
+   0x1fff0a78: str     r0, [sp, #4]
+   0x1fff0a7a: cmp     r4, #20
+   0x1fff0a7c: beq.n   0x1fff0a82
+   0x1fff0a7e: cmp     r0, #0
+   0x1fff0a80: bne.n   0x1fff0ab8
+   0x1fff0a82: movs    r2, #15
+   0x1fff0a84: ldr     r1, [pc, #640]  ; (0x1fff0d08)
+   0x1fff0a86: mov     r0, r6
+   0x1fff0a88: bl      0x1fff1064
+   0x1fff0a8c: bl      0x1ff0d9c       setup_serial
+   0x1fff0a90: movs    r2, #0
+   0x1fff0a92: movs    r1, #70 ; 0x46
+   0x1fff0a94: ldr     r0, [pc, #624]  ; (0x1fff0d08)
+   0x1fff0a96: bl      0x1fff0e04
+   0x1fff0a9a: lsls    r0, r0, #24
+   0x1fff0a9c: lsrs    r0, r0, #24
+   0x1fff0a9e: bne.n   0x1fff0abe
+   0x1fff0aa0: ldr     r1, [pc, #604]  ; (0x1fff0d00)
+   0x1fff0aa2: ldr     r0, [pc, #612]  ; (0x1fff0d08)
+   0x1fff0aa4: subs    r1, r1, #3
+   0x1fff0aa6: bl      0x1fff0fb8
+   0x1fff0aaa: cmp     r0, #0
+   0x1fff0aac: beq.n   0x1fff0ac2
+   0x1fff0aae: ldr     r0, [sp, #12]
+   0x1fff0ab0: str     r7, [sp, #8]
+   0x1fff0ab2: str     r0, [sp, #4]
+   0x1fff0ab4: movs    r4, #0
+   0x1fff0ab6: mov     r6, r4
+   0x1fff0ab8: ldr     r5, [sp, #4]
+   0x1fff0aba: cmp     r5, #0
+   0x1fff0abc: bgt.n   0x1fff0a50
+   0x1fff0abe: add     sp, #20
+   0x1fff0ac0: pop     {r4, r5, r6, r7, pc}
+   0x1fff0ac2: ldr     r0, [sp, #4]
+   0x1fff0ac4: str     r0, [sp, #12]
+   0x1fff0ac6: ldr     r7, [sp, #8]
+   0x1fff0ac8: b.n     0x1fff0ab4
+
+
+
+   0x1fff0aca: push    {r4, r5, r6, r7, lr}
+   0x1fff0acc: sub     sp, #20
+   0x1fff0ace: ldr     r5, [pc, #548]  ; (0x1fff0cf4)
+   0x1fff0ad0: movs    r2, #100        ; 0x64
+   0x1fff0ad2: ldr     r0, [r5, #8]
+   0x1fff0ad4: add     r1, sp, #4
+   0x1fff0ad6: ldr     r3, [sp, #4]
+   0x1fff0ad8: bl      0x1fff10a6
+   0x1fff0adc: lsls    r4, r0, #24
+   0x1fff0ade: lsrs    r4, r4, #24
+   0x1fff0ae0: bne.n   0x1fff0b00
+   0x1fff0ae2: ldr     r0, [r5, #4]
+   0x1fff0ae4: movs    r2, #103        ; 0x67
+   0x1fff0ae6: add     r1, sp, #8
+   0x1fff0ae8: ldr     r3, [sp, #4]
+   0x1fff0aea: bl      0x1fff10a6
+   0x1fff0aee: uxtb    r4, r0
+   0x1fff0af0: cmp     r4, #4
+   0x1fff0af2: beq.n   0x1fff0afa
+   0x1fff0af4: cmp     r4, #2
+   0x1fff0af6: beq.n   0x1fff0afe
+   0x1fff0af8: b.n     0x1fff0b00
+   0x1fff0afa: movs    r4, #14
+   0x1fff0afc: b.n     0x1fff0b00
+   0x1fff0afe: movs    r4, #13
+   0x1fff0b00: ldr     r0, [pc, #520]  ; (0x1fff0d0c)
+   0x1fff0b02: ldr     r1, [r0, #0]
+   0x1fff0b04: movs    r2, #64 ; 0x40
+   0x1fff0b06: orrs    r1, r2
+   0x1fff0b08: str     r1, [r0, #0]
+   0x1fff0b0a: ldr     r1, [pc, #516]  ; (0x1fff0d10)
+   0x1fff0b0c: ldr     r3, [pc, #516]  ; (0x1fff0d14)
+   0x1fff0b0e: ldr     r1, [r1, #0]
+   0x1fff0b10: ldr     r3, [r3, #0]
+   0x1fff0b12: cmp     r1, r3
+   0x1fff0b14: bne.n   0x1fff0b28
+   0x1fff0b16: ldr     r1, [pc, #512]  ; (0x1fff0d18)
+   0x1fff0b18: ldr     r3, [sp, #8]
+   0x1fff0b1a: ldr     r1, [r1, #0]
+   0x1fff0b1c: adds    r1, #255        ; 0xff
+   0x1fff0b1e: adds    r1, #255        ; 0xff
+   0x1fff0b20: adds    r1, #2
+   0x1fff0b22: cmp     r3, r1
+   0x1fff0b24: bcs.n   0x1fff0b28
+   0x1fff0b26: movs    r4, #19
+   0x1fff0b28: ldr     r1, [r0, #0]
+   0x1fff0b2a: bics    r1, r2
+   0x1fff0b2c: str     r1, [r0, #0]
+   0x1fff0b2e: movs    r2, #15
+   0x1fff0b30: mov     r0, r4
+   0x1fff0b32: ldr     r1, [r5, #0]
+   0x1fff0b34: bl      0x1fff1064
+   0x1fff0b38: bl      0x1ff0d9c       setup_serial
+   0x1fff0b3c: cmp     r4, #0
+   0x1fff0b3e: bne.n   0x1fff0abe
+   0x1fff0b40: mov     r5, r4
+   0x1fff0b42: ldr     r7, [sp, #4]
+   0x1fff0b44: ldr     r6, [sp, #8]
+   0x1fff0b46: b.n     0x1fff0bc4
+   0x1fff0b48: mov     r2, sp
+   0x1fff0b4a: movs    r1, #70 ; 0x46
+   0x1fff0b4c: ldr     r0, [pc, #440]  ; (0x1fff0d08)
+   0x1fff0b4e: bl      0x1fff0e04
+   0x1fff0b52: cmp     r0, #0
+   0x1fff0b54: bne.n   0x1fff0abe
+   0x1fff0b56: ldr     r0, [sp, #0]
+   0x1fff0b58: cmp     r0, #0
+   0x1fff0b5a: beq.n   0x1fff0b78
+   0x1fff0b5c: adds    r5, r5, #1
+   0x1fff0b5e: add     r2, sp, #12
+   0x1fff0b60: ldr     r0, [pc, #420]  ; (0x1fff0d08)
+   0x1fff0b62: ldr     r1, [sp, #8]
+   0x1fff0b64: bl      0x1fff0f00
+   0x1fff0b68: adds    r4, r0, r4
+   0x1fff0b6a: ldr     r1, [sp, #8]
+   0x1fff0b6c: ldr     r0, [sp, #12]
+   0x1fff0b6e: adds    r1, r1, r0
+   0x1fff0b70: str     r1, [sp, #8]
+   0x1fff0b72: ldr     r1, [sp, #4]
+   0x1fff0b74: subs    r0, r1, r0
+   0x1fff0b76: str     r0, [sp, #4]
+   0x1fff0b78: cmp     r5, #20
+   0x1fff0b7a: beq.n   0x1fff0b82
+   0x1fff0b7c: ldr     r0, [sp, #4]
+   0x1fff0b7e: cmp     r0, #0
+   0x1fff0b80: bne.n   0x1fff0bc4
+   0x1fff0b82: movs    r0, #0
+   0x1fff0b84: str     r0, [sp, #0]
+   0x1fff0b86: mov     r2, sp
+   0x1fff0b88: movs    r1, #70 ; 0x46
+   0x1fff0b8a: ldr     r0, [pc, #380]  ; (0x1fff0d08)
+   0x1fff0b8c: bl      0x1fff0e04
+   0x1fff0b90: ldr     r1, [sp, #0]
+   0x1fff0b92: uxtb    r0, r0
+   0x1fff0b94: cmp     r1, #0
+   0x1fff0b96: beq.n   0x1fff0b86
+   0x1fff0b98: cmp     r0, #0
+   0x1fff0b9a: bne.n   0x1fff0abe
+   0x1fff0b9c: add     r1, sp, #16
+   0x1fff0b9e: ldr     r0, [pc, #360]  ; (0x1fff0d08)
+   0x1fff0ba0: bl      0x1fff103a
+   0x1fff0ba4: ldr     r0, [sp, #16]
+   0x1fff0ba6: cmp     r4, r0
+   0x1fff0ba8: bne.n   0x1fff0bb4
+   0x1fff0baa: ldr     r0, [pc, #340]  ; (0x1fff0d00)
+   0x1fff0bac: ldr     r7, [sp, #4]
+   0x1fff0bae: subs    r0, r0, #3
+   0x1fff0bb0: ldr     r6, [sp, #8]
+   0x1fff0bb2: b.n     0x1fff0bbc
+   0x1fff0bb4: ldr     r0, [pc, #328]  ; (0x1fff0d00)
+   0x1fff0bb6: str     r7, [sp, #4]
+   0x1fff0bb8: adds    r0, r0, #5
+   0x1fff0bba: str     r6, [sp, #8]
+   0x1fff0bbc: bl      0x1ff0d9c       setup_serial
+   0x1fff0bc0: movs    r5, #0
+   0x1fff0bc2: mov     r4, r5
+   0x1fff0bc4: ldr     r0, [sp, #4]
+   0x1fff0bc6: cmp     r0, #0
+   0x1fff0bc8: bgt.n   0x1fff0b48
+   0x1fff0bca: b.n     0x1fff0abe
+
+
+
+   0x1fff0bcc: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff0bce: ldr     r4, [pc, #292]  ; (0x1fff0cf4)
+   0x1fff0bd0: ldr     r5, [pc, #312]  ; (0x1fff0d0c)
+   0x1fff0bd2: ldr     r0, [r4, #0]
+   0x1fff0bd4: movs    r6, #64 ; 0x40
+   0x1fff0bd6: ldrb    r3, [r0, #0]
+   0x1fff0bd8: mov     r0, r4
+   0x1fff0bda: subs    r3, #65 ; 0x41
+   0x1fff0bdc: ldr     r1, [r0, #4]
+   0x1fff0bde: bl      0x1fff19b0
+   0x1fff0be2: adds    r7, r2, #0
+   0x1fff0be4: strb    r1, [r3, #20]
+   0x1fff0be6: ldrb    r4, [r0, #2]
+   0x1fff0be8: asrs    r4, r0, #14
+   0x1fff0bea: ldrb    r4, [r0, #14]
+   0x1fff0bec: strb    r7, [r3, r0]
+   0x1fff0bee: ldrb    r4, [r0, #26]
+   0x1fff0bf0: strh    r1, [r5, #32]
+   0x1fff0bf2: strh    r2, [r6, #34]   ; 0x22
+   0x1fff0bf4: strh    r0, [r2, #32]
+   0x1fff0bf6: asrs    r1, r0, #26
+   0x1fff0bf8: lsrs    r4, r0, #22
+   0x1fff0bfa: lsls    r4, r0, #2
+   0x1fff0bfc: bl      0x1fff0aca
+   0x1fff0c00: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c02: bl      0x1fff09fe
+   0x1fff0c06: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c08: bl      0x1fff0998
+   0x1fff0c0c: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c0e: bl      0x1fff0962
+   0x1fff0c12: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c14: bl      0x1fff08b2
+   0x1fff0c18: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c1a: bl      0x1fff0880
+   0x1fff0c1e: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c20: movs    r2, #15
+   0x1fff0c22: movs    r0, #0
+   0x1fff0c24: bl      0x1fff1064
+   0x1fff0c28: bl      0x1ff0d9c       setup_serial
+   0x1fff0c2c: ldr     r0, [pc, #236]  ; (0x1fff0d1c)
+   0x1fff0c2e: ldr     r1, [r4, #4]
+   0x1fff0c30: ldr     r0, [r0, #52]   ; 0x34
+   0x1fff0c32: b.n     0x1fff0cba
+   0x1fff0c34: ldr     r0, [r5, #0]
+   0x1fff0c36: orrs    r0, r6
+   0x1fff0c38: str     r0, [r5, #0]
+   0x1fff0c3a: ldr     r0, [pc, #228]  ; (0x1fff0d20)
+   0x1fff0c3c: movs    r2, #15
+   0x1fff0c3e: ldr     r7, [r0, #0]
+   0x1fff0c40: movs    r0, #0
+   0x1fff0c42: bl      0x1fff1064
+   0x1fff0c46: bl      0x1ff0d9c       setup_serial
+   0x1fff0c4a: ldr     r1, [r4, #4]
+   0x1fff0c4c: movs    r2, #15
+   0x1fff0c4e: ldr     r0, [r7, #0]
+   0x1fff0c50: bl      0x1fff1064
+   0x1fff0c54: bl      0x1ff0d9c       setup_serial
+   0x1fff0c58: ldr     r1, [r4, #4]
+   0x1fff0c5a: movs    r2, #15
+   0x1fff0c5c: ldr     r0, [r7, #4]
+   0x1fff0c5e: bl      0x1fff1064
+   0x1fff0c62: bl      0x1ff0d9c       setup_serial
+   0x1fff0c66: ldr     r1, [r4, #4]
+   0x1fff0c68: movs    r2, #15
+   0x1fff0c6a: ldr     r0, [r7, #8]
+   0x1fff0c6c: bl      0x1fff1064
+   0x1fff0c70: bl      0x1ff0d9c       setup_serial
+   0x1fff0c74: ldr     r1, [r4, #4]
+   0x1fff0c76: movs    r2, #15
+   0x1fff0c78: ldr     r0, [r7, #12]
+   0x1fff0c7a: bl      0x1fff1064
+   0x1fff0c7e: bl      0x1ff0d9c       setup_serial
+   0x1fff0c82: ldr     r0, [r5, #0]
+   0x1fff0c84: bics    r0, r6
+   0x1fff0c86: str     r0, [r5, #0]
+   0x1fff0c88: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0c8a: ldr     r0, [r5, #0]
+   0x1fff0c8c: orrs    r0, r6
+   0x1fff0c8e: str     r0, [r5, #0]
+   0x1fff0c90: ldr     r0, [pc, #144]  ; (0x1fff0d24)
+   0x1fff0c92: ldr     r7, [r0, #0]
+   0x1fff0c94: ldr     r0, [r5, #0]
+   0x1fff0c96: bics    r0, r6
+   0x1fff0c98: str     r0, [r5, #0]
+   0x1fff0c9a: movs    r2, #15
+   0x1fff0c9c: movs    r0, #0
+   0x1fff0c9e: bl      0x1fff1064
+   0x1fff0ca2: bl      0x1ff0d9c       setup_serial
+   0x1fff0ca6: uxtb    r0, r7
+   0x1fff0ca8: movs    r2, #15
+   0x1fff0caa: ldr     r1, [r4, #4]
+   0x1fff0cac: bl      0x1fff1064
+   0x1fff0cb0: bl      0x1ff0d9c       setup_serial
+   0x1fff0cb4: lsls    r0, r7, #16
+   0x1fff0cb6: ldr     r1, [r4, #4]
+   0x1fff0cb8: lsrs    r0, r0, #24
+   0x1fff0cba: movs    r2, #15
+   0x1fff0cbc: bl      0x1fff1064
+   0x1fff0cc0: bl      0x1ff0d9c       setup_serial
+   0x1fff0cc4: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0cc6: bl      0x1fff0834
+   0x1fff0cca: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0ccc: bl      0x1fff078e
+   0x1fff0cd0: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0cd2: bl      0x1fff06a8
+   0x1fff0cd6: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0cd8: bl      0x1fff0618
+   0x1fff0cdc: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0cde: bl      0x1fff05a4
+   0x1fff0ce2: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0ce4: bl      0x1fff050c
+   0x1fff0ce8: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff0cea: movs    r2, #15
+   0x1fff0cec: movs    r0, #1
+   0x1fff0cee: b.n     0x1fff0cbc
+   0x1fff0cf0: lsls    r0, r2, #1
+   0x1fff0cf2: asrs    r0, r0, #32
+   0x1fff0cf4: lsls    r0, r7, #3
+   0x1fff0cf6: asrs    r0, r0, #32
+   0x1fff0cf8: ldrh    r2, [r3, r1]
+   0x1fff0cfa: movs    r0, r0
+   0x1fff0cfc: lsls    r4, r2, #1
+   0x1fff0cfe: asrs    r0, r0, #32
+   0x1fff0d00: subs    r7, r4, #4
+   0x1fff0d02: subs    r7, r7, #7
+   0x1fff0d04: lsls    r0, r6, #17
+   0x1fff0d06: movs    r0, r0
+   0x1fff0d08: lsls    r0, r4, #1
+   0x1fff0d0a: asrs    r0, r0, #32
+   0x1fff0d0c: stmia   r0!, {}
+   0x1fff0d0e: ands    r3, r0
+   0x1fff0d10: lsls    r0, r3, #1
+   0x1fff0d12: asrs    r0, r0, #32
+   0x1fff0d14: lsls    r4, r2, #3
+   0x1fff0d16: subs    r7, r7, #7
+   0x1fff0d18: lsls    r0, r7, #16
+   0x1fff0d1a: movs    r0, r0
+   0x1fff0d1c: strh    r0, [r0, #30]
+   0x1fff0d1e: ands    r4, r0
+   0x1fff0d20: lsls    r4, r3, #23
+   0x1fff0d22: movs    r0, r0
+   0x1fff0d24: lsls    r4, r6, #16
+   0x1fff0d26: movs    r0, r0
+
+
+
+   0x1fff0d28: push    {r4, lr}
+   0x1fff0d2a: mov     r4, r1
+   0x1fff0d2c: cmp     r2, #0
+   0x1fff0d2e: beq.n   0x1fff0d44
+   0x1fff0d30: movs    r1, #26
+   0x1fff0d32: muls    r1, r0
+   0x1fff0d34: movs    r0, #125        ; 0x7d
+   0x1fff0d36: lsls    r0, r0, #3
+   0x1fff0d38: muls    r0, r2
+   0x1fff0d3a: bl      0x1fff11d4
+   0x1fff0d3e: cmp     r4, #1
+   0x1fff0d40: beq.n   0x1fff0d62
+   0x1fff0d42: movs    r4, #7
+   0x1fff0d44: ldr     r1, [pc, #276]  ; (0x1fff0e5c)
+   0x1fff0d46: ldr     r2, [r1, #20]
+   0x1fff0d48: lsls    r2, r2, #25
+   0x1fff0d4a: bpl.n   0x1fff0d46
+   0x1fff0d4c: movs    r2, #128        ; 0x80
+   0x1fff0d4e: str     r2, [r1, #12]
+   0x1fff0d50: str     r0, [r1, #0]
+   0x1fff0d52: asrs    r0, r0, #8
+   0x1fff0d54: str     r0, [r1, #4]
+   0x1fff0d56: movs    r0, #0
+   0x1fff0d58: str     r0, [r1, #12]
+   0x1fff0d5a: movs    r0, #1
+   0x1fff0d5c: str     r0, [r1, #8]
+   0x1fff0d5e: str     r4, [r1, #12]
+   0x1fff0d60: pop     {r4, pc}
+   0x1fff0d62: movs    r4, #3
+   0x1fff0d64: b.n     0x1fff0d44
+
+       serial_wait_autobaud()
+       {
+
+   0x1fff0d66: ldr     r1, [pc, #244]  ; (0x1fff0e5c)  40008000
+   0x1fff0d68: ldr     r2, [r1, #20]                   40008020        ACR (autobaud control register)
+   0x1fff0d6a: lsls    r2, r2, #26
+   0x1fff0d6c: bpl.n   0x1fff0d68
+   0x1fff0d6e: str     r0, [r1, #0]
+   0x1fff0d70: bx      lr
+
+       }
+
+   0x1fff0d72: ldr     r1, [pc, #232]  ; (0x1fff0e5c)
+   0x1fff0d74: ldr     r0, [r1, #20]
+   0x1fff0d76: lsls    r0, r0, #31
+   0x1fff0d78: beq.n   0x1fff0d74
+   0x1fff0d7a: ldr     r0, [r1, #0]
+   0x1fff0d7c: ldr     r2, [pc, #224]  ; (0x1fff0e60)
+   0x1fff0d7e: uxtb    r0, r0
+   0x1fff0d80: ldr     r2, [r2, #0]
+   0x1fff0d82: cmp     r2, #0
+   0x1fff0d84: beq.n   0x1fff0d8e
+   0x1fff0d86: ldr     r2, [r1, #20]
+   0x1fff0d88: lsls    r2, r2, #26
+   0x1fff0d8a: bpl.n   0x1fff0d86
+   0x1fff0d8c: str     r0, [r1, #0]
+   0x1fff0d8e: bx      lr
+
+
+
+   0x1fff0d90: push    {lr}
+   0x1fff0d92: bl      0x1fff0d72
+   0x1fff0d96: cmp     r0, #17
+   0x1fff0d98: bne.n   0x1fff0d92
+   0x1fff0d9a: pop     {pc}
+
+       /*
+        * Detect baud rate on the USART and configure
+        */
+
+       setup_serial()
+       {
+
+   0x1fff0d9c: push    {r4, lr}
+   0x1fff0d9e: ldr     r4, [pc, #188]  ; (0x1fff0e5c)  40008000        USART
+   0x1fff0da0: movs    r3, r0
+   0x1fff0da2: bne.n   0x1fff0dcc
+   0x1fff0da4: b.n     0x1fff0dd2
+   0x1fff0da6: adds    r3, r3, #1
+   0x1fff0da8: bl      0x1fff0d66
+   0x1fff0dac: ldr     r0, [r4, #20]                   40008020        ACR (autobaud control)
+   0x1fff0dae: lsls    r0, r0, #31
+   0x1fff0db0: beq.n   0x1fff0dcc
+
+
+   0x1fff0db2: ldr     r0, [r4, #0]
+   0x1fff0db4: uxtb    r0, r0
+   0x1fff0db6: cmp     r0, #27
+   0x1fff0db8: beq.n   0x1fff0dc0
+   0x1fff0dba: cmp     r0, #19
+   0x1fff0dbc: bne.n   0x1fff0dcc
+   0x1fff0dbe: b.n     0x1fff0dc4
+
+               return 1;
+
+   0x1fff0dc0: movs    r0, #1
+   0x1fff0dc2: pop     {r4, pc}
+
+   0x1fff0dc4: bl      0x1fff0d72
+   0x1fff0dc8: cmp     r0, #17
+   0x1fff0dca: bne.n   0x1fff0dc4
+
+   0x1fff0dcc: ldrb    r0, [r3, #0]
+   0x1fff0dce: cmp     r0, #0
+   0x1fff0dd0: bne.n   0x1fff0da6
+   0x1fff0dd2: movs    r0, #13
+   0x1fff0dd4: bl      0x1fff0d66
+   0x1fff0dd8: movs    r0, #10
+   0x1fff0dda: bl      0x1fff0d66
+   0x1fff0dde: movs    r0, #0
+   0x1fff0de0: pop     {r4, pc}
+   0x1fff0de2: ldr     r0, [pc, #120]  ; (0x1fff0e5c)
+   0x1fff0de4: ldr     r1, [r0, #20]
+   0x1fff0de6: lsls    r1, r1, #31
+   0x1fff0de8: beq.n   0x1fff0df0
+   0x1fff0dea: ldr     r0, [r0, #0]
+   0x1fff0dec: movs    r0, #1
+   0x1fff0dee: bx      lr
+   0x1fff0df0: movs    r0, #0
+   0x1fff0df2: bx      lr
+   0x1fff0df4: ldr     r0, [pc, #108]  ; (0x1fff0e64)
+   0x1fff0df6: ldr     r0, [r0, #8]
+   0x1fff0df8: lsrs    r0, r0, #2
+   0x1fff0dfa: b.n     0x1fff0dfe
+   0x1fff0dfc: subs    r0, r0, #1
+   0x1fff0dfe: cmp     r0, #0
+   0x1fff0e00: bne.n   0x1fff0dfc
+   0x1fff0e02: bx      lr
+
+       }
+
+   0x1fff0e04: push    {r4, r5, r6, lr}
+   0x1fff0e06: mov     r5, r0
+   0x1fff0e08: mov     r6, r2
+   0x1fff0e0a: movs    r3, #0
+   0x1fff0e0c: subs    r4, r1, #1
+   0x1fff0e0e: bl      0x1fff0d72
+   0x1fff0e12: cmp     r0, #27
+   0x1fff0e14: beq.n   0x1fff0e4a
+   0x1fff0e16: cmp     r0, #13
+   0x1fff0e18: beq.n   0x1fff0e22
+   0x1fff0e1a: cmp     r0, #10
+   0x1fff0e1c: beq.n   0x1fff0e22
+   0x1fff0e1e: cmp     r3, r4
+   0x1fff0e20: bne.n   0x1fff0e4e
+   0x1fff0e22: movs    r0, #0
+   0x1fff0e24: strb    r0, [r5, r3]
+   0x1fff0e26: cmp     r6, #0
+   0x1fff0e28: beq.n   0x1fff0e2c
+   0x1fff0e2a: str     r3, [r6, #0]
+   0x1fff0e2c: bl      0x1fff0df4
+   0x1fff0e30: ldr     r0, [pc, #44]   ; (0x1fff0e60)
+   0x1fff0e32: ldr     r0, [r0, #0]
+   0x1fff0e34: cmp     r0, #0
+   0x1fff0e36: beq.n   0x1fff0e46
+   0x1fff0e38: bl      0x1fff0de2
+   0x1fff0e3c: cmp     r0, #0
+   0x1fff0e3e: beq.n   0x1fff0e46
+   0x1fff0e40: movs    r0, #10
+   0x1fff0e42: bl      0x1fff0d66
+   0x1fff0e46: movs    r0, #0
+   0x1fff0e48: pop     {r4, r5, r6, pc}
+   0x1fff0e4a: movs    r0, #1
+   0x1fff0e4c: pop     {r4, r5, r6, pc}
+
+0x1fff0e40:    0xf7ff200a      0x2000ff90      0x2001bd70      0x54e8bd70
+0x1fff0e50:    0xe7dc1c5b      0x60084902      0x00004770      0x40008000
+0x1fff0e60:    0x1000005c      0x40018000      0xd0022800      0xb2c03020
+0x1fff0e70:    0x20604770      0xb5f04770      0x24004603      0xf7ffb2d0
+0x1fff0e80:    0x7008fff3      0xe0281c49      0xdb052a03      0x7818785d
+
+   0x1fff0e4e: strb    r0, [r5, r3]
+   0x1fff0e50: adds    r3, r3, #1
+   0x1fff0e52: b.n     0x1fff0e0e
+   0x1fff0e54: ldr     r1, [pc, #8]    ; (0x1fff0e60)
+   0x1fff0e56: str     r0, [r1, #0]
+   0x1fff0e58: bx      lr
+   0x1fff0e5a: movs    r0, r0
+   0x1fff0e5c: strh    r0, [r0, #0]
+   0x1fff0e5e: ands    r0, r0
+   0x1fff0e60: lsls    r4, r3, #1
+   0x1fff0e62: asrs    r0, r0, #32
+   0x1fff0e64: strh    r0, [r0, #0]
+   0x1fff0e66: ands    r1, r0
+   0x1fff0e68: cmp     r0, #0
+   0x1fff0e6a: beq.n   0x1fff0e72
+   0x1fff0e6c: adds    r0, #32
+   0x1fff0e6e: uxtb    r0, r0
+   0x1fff0e70: bx      lr
+   0x1fff0e72: movs    r0, #96 ; 0x60
+   0x1fff0e74: bx      lr
+
+
+
+   0x1fff0e76: push    {r4, r5, r6, r7, lr}
+   0x1fff0e78: mov     r3, r0
+   0x1fff0e7a: movs    r4, #0
+   0x1fff0e7c: uxtb    r0, r2
+   0x1fff0e7e: bl      0x1fff0e68
+   0x1fff0e82: strb    r0, [r1, #0]
+   0x1fff0e84: adds    r1, r1, #1
+   0x1fff0e86: b.n     0x1fff0eda
+   0x1fff0e88: cmp     r2, #3
+   0x1fff0e8a: blt.n   0x1fff0e98
+   0x1fff0e8c: ldrb    r5, [r3, #1]
+   0x1fff0e8e: ldrb    r0, [r3, #0]
+   0x1fff0e90: ldrb    r6, [r3, #2]
+   0x1fff0e92: adds    r0, r0, r5
+   0x1fff0e94: adds    r4, r6, r4
+   0x1fff0e96: b.n     0x1fff0eee
+   0x1fff0e98: cmp     r2, #2
+   0x1fff0e9a: beq.n   0x1fff0ee6
+   0x1fff0e9c: ldrb    r5, [r3, #0]
+   0x1fff0e9e: mov     r6, r5
+   0x1fff0ea0: adds    r4, r5, r4
+   0x1fff0ea2: ldrb    r0, [r3, #0]
+   0x1fff0ea4: lsrs    r0, r0, #2
+   0x1fff0ea6: bl      0x1fff0e68
+   0x1fff0eaa: strb    r0, [r1, #0]
+   0x1fff0eac: ldrb    r0, [r3, #0]
+   0x1fff0eae: lsrs    r7, r5, #4
+   0x1fff0eb0: lsls    r0, r0, #30
+   0x1fff0eb2: lsrs    r0, r0, #26
+   0x1fff0eb4: adds    r0, r0, r7
+   0x1fff0eb6: bl      0x1fff0e68
+   0x1fff0eba: strb    r0, [r1, #1]
+   0x1fff0ebc: lsls    r0, r5, #28
+   0x1fff0ebe: lsrs    r0, r0, #26
+   0x1fff0ec0: lsrs    r5, r6, #6
+   0x1fff0ec2: adds    r0, r0, r5
+   0x1fff0ec4: bl      0x1fff0e68
+   0x1fff0ec8: strb    r0, [r1, #2]
+   0x1fff0eca: lsls    r0, r6, #26
+   0x1fff0ecc: lsrs    r0, r0, #26
+   0x1fff0ece: bl      0x1fff0e68
+   0x1fff0ed2: strb    r0, [r1, #3]
+   0x1fff0ed4: adds    r1, r1, #4
+   0x1fff0ed6: adds    r3, r3, #3
+   0x1fff0ed8: subs    r2, r2, #3
+   0x1fff0eda: cmp     r2, #0
+   0x1fff0edc: bgt.n   0x1fff0e88
+   0x1fff0ede: movs    r0, #0
+   0x1fff0ee0: strb    r0, [r1, #0]
+   0x1fff0ee2: mov     r0, r4
+   0x1fff0ee4: pop     {r4, r5, r6, r7, pc}
+   0x1fff0ee6: ldrb    r5, [r3, #1]
+   0x1fff0ee8: ldrb    r0, [r3, #0]
+   0x1fff0eea: mov     r6, r5
+   0x1fff0eec: adds    r0, r0, r5
+   0x1fff0eee: adds    r4, r0, r4
+   0x1fff0ef0: b.n     0x1fff0ea2
+   0x1fff0ef2: cmp     r0, #96 ; 0x60
+   0x1fff0ef4: beq.n   0x1fff0efc
+   0x1fff0ef6: subs    r0, #32
+   0x1fff0ef8: uxtb    r0, r0
+   0x1fff0efa: bx      lr
+   0x1fff0efc: movs    r0, #0
+   0x1fff0efe: bx      lr
+
+
+
+   0x1fff0f00: push    {r4, r5, r6, r7, lr}
+   0x1fff0f02: mov     r3, r0
+   0x1fff0f04: movs    r6, #0
+   0x1fff0f06: mov     r12, r2
+   0x1fff0f08: mov     r5, r6
+   0x1fff0f0a: ldrb    r0, [r0, #0]
+   0x1fff0f0c: bl      0x1fff0ef2
+   0x1fff0f10: mov     r4, r0
+   0x1fff0f12: subs    r0, r0, #1
+   0x1fff0f14: cmp     r0, #44 ; 0x2c
+   0x1fff0f16: bhi.n   0x1fff0fb0
+   0x1fff0f18: adds    r3, r3, #1
+   0x1fff0f1a: b.n     0x1fff0fac
+   0x1fff0f1c: cmp     r4, #3
+   0x1fff0f1e: blt.n   0x1fff0f6c
+   0x1fff0f20: ldrb    r0, [r3, #0]
+   0x1fff0f22: bl      0x1fff0ef2
+   0x1fff0f26: lsls    r2, r0, #2
+   0x1fff0f28: ldrb    r0, [r3, #1]
+   0x1fff0f2a: bl      0x1fff0ef2
+   0x1fff0f2e: lsrs    r0, r0, #4
+   0x1fff0f30: orrs    r2, r0
+   0x1fff0f32: strb    r2, [r1, #0]
+   0x1fff0f34: ldrb    r0, [r3, #1]
+   0x1fff0f36: bl      0x1fff0ef2
+   0x1fff0f3a: lsls    r2, r0, #4
+   0x1fff0f3c: ldrb    r0, [r3, #2]
+   0x1fff0f3e: bl      0x1fff0ef2
+   0x1fff0f42: lsrs    r0, r0, #2
+   0x1fff0f44: orrs    r2, r0
+   0x1fff0f46: strb    r2, [r1, #1]
+   0x1fff0f48: ldrb    r0, [r3, #2]
+   0x1fff0f4a: bl      0x1fff0ef2
+   0x1fff0f4e: lsls    r2, r0, #6
+   0x1fff0f50: ldrb    r0, [r3, #3]
+   0x1fff0f52: bl      0x1fff0ef2
+   0x1fff0f56: orrs    r2, r0
+   0x1fff0f58: uxtb    r0, r2
+   0x1fff0f5a: strb    r0, [r1, #2]
+   0x1fff0f5c: ldrb    r7, [r1, #0]
+   0x1fff0f5e: ldrb    r2, [r1, #1]
+   0x1fff0f60: adds    r0, r0, r6
+   0x1fff0f62: adds    r2, r7, r2
+   0x1fff0f64: adds    r5, r5, #3
+   0x1fff0f66: adds    r6, r2, r0
+   0x1fff0f68: adds    r1, r1, #3
+   0x1fff0f6a: b.n     0x1fff0fa8
+   0x1fff0f6c: cmp     r4, #1
+   0x1fff0f6e: blt.n   0x1fff0f8a
+   0x1fff0f70: ldrb    r0, [r3, #0]
+   0x1fff0f72: bl      0x1fff0ef2
+   0x1fff0f76: lsls    r2, r0, #2
+   0x1fff0f78: ldrb    r0, [r3, #1]
+   0x1fff0f7a: bl      0x1fff0ef2
+   0x1fff0f7e: lsrs    r0, r0, #4
+   0x1fff0f80: orrs    r2, r0
+   0x1fff0f82: uxtb    r0, r2
+   0x1fff0f84: adds    r5, r5, #1
+   0x1fff0f86: strb    r0, [r1, #0]
+   0x1fff0f88: adds    r6, r0, r6
+   0x1fff0f8a: cmp     r4, #2
+   0x1fff0f8c: blt.n   0x1fff0fa8
+   0x1fff0f8e: ldrb    r0, [r3, #1]
+   0x1fff0f90: bl      0x1fff0ef2
+   0x1fff0f94: lsls    r2, r0, #4
+   0x1fff0f96: ldrb    r0, [r3, #2]
+   0x1fff0f98: bl      0x1fff0ef2
+   0x1fff0f9c: lsrs    r0, r0, #2
+   0x1fff0f9e: orrs    r2, r0
+   0x1fff0fa0: uxtb    r0, r2
+   0x1fff0fa2: adds    r5, r5, #1
+   0x1fff0fa4: strb    r0, [r1, #1]
+   0x1fff0fa6: adds    r6, r0, r6
+   0x1fff0fa8: adds    r3, r3, #4
+   0x1fff0faa: subs    r4, r4, #3
+   0x1fff0fac: cmp     r4, #0
+   0x1fff0fae: bgt.n   0x1fff0f1c
+   0x1fff0fb0: mov     r0, r12
+   0x1fff0fb2: str     r5, [r0, #0]
+   0x1fff0fb4: mov     r0, r6
+   0x1fff0fb6: pop     {r4, r5, r6, r7, pc}
+
+
+
+   0x1fff0fb8: push    {r4, lr}
+   0x1fff0fba: movs    r2, #0
+   0x1fff0fbc: b.n     0x1fff0fc4
+   0x1fff0fbe: cmp     r3, #0
+   0x1fff0fc0: beq.n   0x1fff0fd4
+   0x1fff0fc2: adds    r2, r2, #1
+   0x1fff0fc4: ldrb    r3, [r0, r2]
+   0x1fff0fc6: ldrb    r4, [r1, r2]
+   0x1fff0fc8: cmp     r3, r4
+   0x1fff0fca: beq.n   0x1fff0fbe
+   0x1fff0fcc: uxtb    r0, r3
+   0x1fff0fce: uxtb    r1, r4
+   0x1fff0fd0: subs    r0, r0, r1
+   0x1fff0fd2: pop     {r4, pc}
+   0x1fff0fd4: movs    r0, #0
+   0x1fff0fd6: pop     {r4, pc}
+
+
+
+   0x1fff0fd8: push    {r0, r1, r2, r3, r4, r5, r6, r7, lr}
+   0x1fff0fda: mov     r5, r0
+   0x1fff0fdc: movs    r0, #0
+   0x1fff0fde: ldrb    r1, [r5, #0]
+   0x1fff0fe0: mov     lr, r3
+   0x1fff0fe2: ldr     r6, [sp, #36]   ; 0x24
+   0x1fff0fe4: mov     r3, r0
+   0x1fff0fe6: mov     r4, r0
+   0x1fff0fe8: cmp     r1, #0
+   0x1fff0fea: beq.n   0x1fff0ff4
+   0x1fff0fec: movs    r1, #0
+   0x1fff0fee: subs    r6, r6, #2
+   0x1fff0ff0: mov     r12, r6
+   0x1fff0ff2: b.n     0x1fff1030
+   0x1fff0ff4: movs    r0, #0
+   0x1fff0ff6: add     sp, #16
+   0x1fff0ff8: pop     {r4, r5, r6, r7, pc}
+   0x1fff0ffa: adds    r6, r0, #1
+   0x1fff0ffc: cmp     r6, lr
+   0x1fff0ffe: bgt.n   0x1fff1036
+   0x1fff1000: ldrb    r6, [r5, r1]
+   0x1fff1002: cmp     r6, #32
+   0x1fff1004: beq.n   0x1fff1016
+   0x1fff1006: cmp     r4, r12
+   0x1fff1008: bge.n   0x1fff1016
+   0x1fff100a: lsls    r7, r0, #2
+   0x1fff100c: ldr     r7, [r2, r7]
+   0x1fff100e: strb    r6, [r7, r3]
+   0x1fff1010: adds    r3, r3, #1
+   0x1fff1012: adds    r4, r4, #1
+   0x1fff1014: b.n     0x1fff102e
+   0x1fff1016: adds    r6, r5, r1
+   0x1fff1018: ldrb    r6, [r6, #1]
+   0x1fff101a: cmp     r6, #32
+   0x1fff101c: bne.n   0x1fff1022
+   0x1fff101e: cmp     r4, r12
+   0x1fff1020: bne.n   0x1fff102e
+   0x1fff1022: lsls    r6, r0, #2
+   0x1fff1024: movs    r4, #0
+   0x1fff1026: ldr     r6, [r2, r6]
+   0x1fff1028: adds    r0, r0, #1
+   0x1fff102a: strb    r4, [r6, r3]
+   0x1fff102c: mov     r3, r4
+   0x1fff102e: adds    r1, r1, #1
+   0x1fff1030: ldr     r6, [sp, #4]
+   0x1fff1032: cmp     r1, r6
+   0x1fff1034: ble.n   0x1fff0ffa
+   0x1fff1036: adds    r0, r0, #1
+   0x1fff1038: b.n     0x1fff0ff6
+
+
+
+   0x1fff103a: push    {r4, r5, lr}
+   0x1fff103c: movs    r3, #0
+   0x1fff103e: mov     r2, r3
+   0x1fff1040: b.n     0x1fff1054
+   0x1fff1042: mov     r5, r4
+   0x1fff1044: subs    r5, #48 ; 0x30
+   0x1fff1046: cmp     r5, #9
+   0x1fff1048: bhi.n   0x1fff1060
+   0x1fff104a: movs    r5, #10
+   0x1fff104c: muls    r3, r5
+   0x1fff104e: subs    r3, #48 ; 0x30
+   0x1fff1050: adds    r3, r4, r3
+   0x1fff1052: adds    r2, r2, #1
+   0x1fff1054: ldrb    r4, [r0, r2]
+   0x1fff1056: cmp     r4, #0
+   0x1fff1058: bne.n   0x1fff1042
+   0x1fff105a: movs    r0, #0
+   0x1fff105c: str     r3, [r1, #0]
+   0x1fff105e: pop     {r4, r5, pc}
+   0x1fff1060: movs    r0, #1
+   0x1fff1062: pop     {r4, r5, pc}
+
+
+
+   0x1fff1064: push    {r4, r5, r6, lr}
+   0x1fff1066: mov     r5, r1
+   0x1fff1068: movs    r1, #0
+   0x1fff106a: subs    r4, r2, #1
+   0x1fff106c: strb    r1, [r5, r4]
+   0x1fff106e: cmp     r0, #0
+   0x1fff1070: bne.n   0x1fff108e
+   0x1fff1072: movs    r0, #48 ; 0x30
+   0x1fff1074: subs    r4, r4, #1
+   0x1fff1076: strb    r0, [r5, r4]
+   0x1fff1078: b.n     0x1fff1096
+   0x1fff107a: subs    r4, r4, #1
+   0x1fff107c: movs    r1, #10
+   0x1fff107e: bl      0x1fff18a0
+   0x1fff1082: cmp     r1, #9
+   0x1fff1084: bhi.n   0x1fff108a
+   0x1fff1086: adds    r1, #48 ; 0x30
+   0x1fff1088: b.n     0x1fff108c
+   0x1fff108a: adds    r1, #55 ; 0x37
+   0x1fff108c: strb    r1, [r5, r4]
+   0x1fff108e: cmp     r4, #0
+   0x1fff1090: beq.n   0x1fff1096
+   0x1fff1092: cmp     r0, #0
+   0x1fff1094: bne.n   0x1fff107a
+   0x1fff1096: adds    r0, r5, r4
+   0x1fff1098: pop     {r4, r5, r6, pc}
+
+
+   0x1fff109a:                 ; <UNDEFINED> instruction: 0xffff1e49
+   0x1fff109e: ands    r0, r1
+   0x1fff10a0: beq.n   0x1fff10a4
+   0x1fff10a2: movs    r0, #1
+   0x1fff10a4: bx      lr
+
+
+
+   0x1fff10a6: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff10a8: movs    r4, #0
+   0x1fff10aa: mov     r6, r1
+   0x1fff10ac: mov     r5, r2
+   0x1fff10ae: mov     r7, r3
+   0x1fff10b0: cmp     r0, #0
+   0x1fff10b2: beq.n   0x1fff10c0
+   0x1fff10b4: bl      0x1fff103a
+   0x1fff10b8: cmp     r0, #0
+   0x1fff10ba: beq.n   0x1fff10c0
+   0x1fff10bc: movs    r0, #12
+   0x1fff10be: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff10c0: cmp     r5, #105        ; 0x69
+   0x1fff10c2: beq.n   0x1fff10e4
+   0x1fff10c4: movs    r1, #4
+   0x1fff10c6: ldr     r0, [r6, #0]
+   0x1fff10c8: bl      0x1fff109c
+   0x1fff10cc: cmp     r0, #0
+   0x1fff10ce: beq.n   0x1fff10f4
+   0x1fff10d0: cmp     r5, #100        ; 0x64
+   0x1fff10d2: beq.n   0x1fff10e8
+   0x1fff10d4: movs    r4, #13
+   0x1fff10d6: cmp     r5, #103        ; 0x67
+   0x1fff10d8: beq.n   0x1fff10ec
+   0x1fff10da: cmp     r5, #104        ; 0x68
+   0x1fff10dc: beq.n   0x1fff10f0
+   0x1fff10de: cmp     r4, #0
+   0x1fff10e0: beq.n   0x1fff1118
+   0x1fff10e2: b.n     0x1fff1190
+   0x1fff10e4: movs    r0, #0
+   0x1fff10e6: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff10e8: movs    r4, #6
+   0x1fff10ea: b.n     0x1fff1190
+   0x1fff10ec: movs    r4, #2
+   0x1fff10ee: b.n     0x1fff1190
+   0x1fff10f0: movs    r4, #3
+   0x1fff10f2: b.n     0x1fff1190
+   0x1fff10f4: cmp     r5, #101        ; 0x65
+   0x1fff10f6: bne.n   0x1fff1118
+   0x1fff10f8: ldr     r0, [r6, #0]
+   0x1fff10fa: subs    r1, r0, #7
+   0x1fff10fc: subs    r1, #249        ; 0xf9
+   0x1fff10fe: beq.n   0x1fff1118
+   0x1fff1100: subs    r1, #255        ; 0xff
+   0x1fff1102: subs    r1, #1
+   0x1fff1104: beq.n   0x1fff1118
+   0x1fff1106: movs    r1, #1
+   0x1fff1108: lsls    r1, r1, #10
+   0x1fff110a: cmp     r0, r1
+   0x1fff110c: beq.n   0x1fff1118
+   0x1fff110e: lsls    r1, r1, #2
+   0x1fff1110: cmp     r0, r1
+   0x1fff1112: beq.n   0x1fff1118
+   0x1fff1114: movs    r0, #6
+   0x1fff1116: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1118: ldr     r3, [pc, #204]  ; (0x1fff11e8)
+   0x1fff111a: ldr     r0, [r3, #0]
+   0x1fff111c: movs    r1, #64 ; 0x40
+   0x1fff111e: orrs    r0, r1
+   0x1fff1120: str     r0, [r3, #0]
+   0x1fff1122: ldr     r0, [pc, #200]  ; (0x1fff11ec)
+   0x1fff1124: ldr     r1, [r6, #0]
+   0x1fff1126: ldr     r0, [r0, #0]
+   0x1fff1128: cmp     r1, r0
+   0x1fff112a: bcc.n   0x1fff113c
+   0x1fff112c: ldr     r0, [pc, #192]  ; (0x1fff11f0)
+   0x1fff112e: adds    r2, r1, r7
+   0x1fff1130: ldr     r0, [r0, #0]
+   0x1fff1132: adds    r0, r0, #1
+   0x1fff1134: cmp     r2, r0
+   0x1fff1136: bhi.n   0x1fff113c
+   0x1fff1138: movs    r0, #1
+   0x1fff113a: b.n     0x1fff113e
+   0x1fff113c: movs    r0, #0
+   0x1fff113e: ldr     r2, [pc, #180]  ; (0x1fff11f4)
+   0x1fff1140: ldr     r2, [r2, #0]
+   0x1fff1142: cmp     r1, r2
+   0x1fff1144: bcc.n   0x1fff1156
+   0x1fff1146: adds    r2, r1, r7
+   0x1fff1148: ldr     r1, [pc, #172]  ; (0x1fff11f8)
+   0x1fff114a: ldr     r1, [r1, #0]
+   0x1fff114c: adds    r1, r1, #1
+   0x1fff114e: cmp     r2, r1
+   0x1fff1150: bhi.n   0x1fff1156
+   0x1fff1152: movs    r1, #1
+   0x1fff1154: b.n     0x1fff1158
+   0x1fff1156: movs    r1, #0
+   0x1fff1158: ldr     r2, [r3, #0]
+   0x1fff115a: movs    r7, #64 ; 0x40
+   0x1fff115c: bics    r2, r7
+   0x1fff115e: str     r2, [r3, #0]
+   0x1fff1160: cmp     r5, #102        ; 0x66
+   0x1fff1162: beq.n   0x1fff116e
+   0x1fff1164: cmp     r5, #103        ; 0x67
+   0x1fff1166: beq.n   0x1fff1176
+   0x1fff1168: cmp     r5, #104        ; 0x68
+   0x1fff116a: beq.n   0x1fff117e
+   0x1fff116c: b.n     0x1fff1190
+   0x1fff116e: orrs    r0, r1
+   0x1fff1170: bne.n   0x1fff1190
+   0x1fff1172: movs    r4, #14
+   0x1fff1174: b.n     0x1fff1190
+   0x1fff1176: cmp     r0, #0
+   0x1fff1178: bne.n   0x1fff1190
+   0x1fff117a: movs    r4, #4
+   0x1fff117c: b.n     0x1fff1190
+   0x1fff117e: cmp     r1, #0
+   0x1fff1180: beq.n   0x1fff1194
+   0x1fff1182: movs    r1, #255        ; 0xff
+   0x1fff1184: adds    r1, #1
+   0x1fff1186: ldr     r0, [r6, #0]
+   0x1fff1188: bl      0x1fff109c
+   0x1fff118c: cmp     r0, #0
+   0x1fff118e: bne.n   0x1fff10f0
+   0x1fff1190: mov     r0, r4
+   0x1fff1192: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1194: movs    r4, #5
+   0x1fff1196: b.n     0x1fff1190
+   0x1fff1198: push    {r4, r5, r6, lr}
+   0x1fff119a: ldr     r3, [pc, #76]   ; (0x1fff11e8)
+   0x1fff119c: mov     r4, r0
+   0x1fff119e: ldr     r6, [r3, #0]
+   0x1fff11a0: movs    r0, #14
+   0x1fff11a2: movs    r5, #64 ; 0x40
+   0x1fff11a4: orrs    r6, r5
+   0x1fff11a6: str     r6, [r3, #0]
+   0x1fff11a8: ldr     r6, [pc, #64]   ; (0x1fff11ec)
+   0x1fff11aa: ldr     r6, [r6, #0]
+   0x1fff11ac: cmp     r1, r6
+   0x1fff11ae: bcc.n   0x1fff11ca
+   0x1fff11b0: adds    r6, r1, r2
+   0x1fff11b2: ldr     r1, [pc, #60]   ; (0x1fff11f0)
+   0x1fff11b4: ldr     r1, [r1, #0]
+   0x1fff11b6: adds    r1, r1, #1
+   0x1fff11b8: cmp     r6, r1
+   0x1fff11ba: bhi.n   0x1fff11ca
+   0x1fff11bc: ldr     r1, [pc, #60]   ; (0x1fff11fc)
+   0x1fff11be: adds    r2, r4, r2
+   0x1fff11c0: ldr     r1, [r1, #0]
+   0x1fff11c2: adds    r1, r1, #1
+   0x1fff11c4: cmp     r2, r1
+   0x1fff11c6: bhi.n   0x1fff11ca
+   0x1fff11c8: movs    r0, #0
+   0x1fff11ca: ldr     r1, [r3, #0]
+   0x1fff11cc: bics    r1, r5
+   0x1fff11ce: str     r1, [r3, #0]
+   0x1fff11d0: pop     {r4, r5, r6, pc}
+   0x1fff11d2: bx      lr
+   0x1fff11d4: push    {r4, lr}
+   0x1fff11d6: mov     r4, r1
+   0x1fff11d8: bl      0x1fff18a0
+   0x1fff11dc: lsrs    r2, r4, #1
+   0x1fff11de: cmp     r2, r1
+   0x1fff11e0: bcs.n   0x1fff11e4
+   0x1fff11e2: adds    r0, r0, #1
+   0x1fff11e4: pop     {r4, pc}
+   0x1fff11e6: movs    r0, r0
+   0x1fff11e8: stmia   r0!, {}
+   0x1fff11ea: ands    r3, r0
+   0x1fff11ec: lsls    r0, r7, #16
+   0x1fff11ee: movs    r0, r0
+   0x1fff11f0: lsls    r4, r7, #16
+   0x1fff11f2: movs    r0, r0
+   0x1fff11f4: lsls    r0, r3, #17
+   0x1fff11f6: movs    r0, r0
+   0x1fff11f8: lsls    r4, r3, #17
+   0x1fff11fa: movs    r0, r0
+   0x1fff11fc: lsls    r0, r7, #23
+   0x1fff11fe: movs    r0, r0
+   0x1fff1200: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff1202: mov     r5, r0
+   0x1fff1204: ldr     r4, [pc, #460]  ; (0x1fff13d4)
+   0x1fff1206: movs    r0, #0
+   0x1fff1208: str     r0, [r4, #24]
+   0x1fff120a: movs    r1, #255        ; 0xff
+   0x1fff120c: adds    r1, #120        ; 0x78
+   0x1fff120e: mov     r0, r5
+   0x1fff1210: bl      0x1fff18a0
+   0x1fff1214: str     r0, [r4, #20]
+   0x1fff1216: ldr     r0, [r4, #20]
+   0x1fff1218: movs    r7, #125        ; 0x7d
+   0x1fff121a: lsls    r7, r7, #3
+   0x1fff121c: mov     r1, r7
+   0x1fff121e: mov     r0, r5
+   0x1fff1220: bl      0x1fff18a0
+   0x1fff1224: mov     r5, r0
+   0x1fff1226: lsls    r1, r0, #4
+   0x1fff1228: subs    r0, r1, r5
+   0x1fff122a: mov     r1, r7
+   0x1fff122c: bl      0x1fff18a0
+   0x1fff1230: adds    r6, r0, #1
+   0x1fff1232: mov     r0, r5
+   0x1fff1234: movs    r1, #55 ; 0x37
+   0x1fff1236: muls    r0, r1
+   0x1fff1238: mov     r1, r7
+   0x1fff123a: bl      0x1fff18a0
+   0x1fff123e: lsls    r1, r0, #8
+   0x1fff1240: adds    r1, #255        ; 0xff
+   0x1fff1242: adds    r1, #1
+   0x1fff1244: orrs    r6, r1
+   0x1fff1246: mov     r0, r5
+   0x1fff1248: movs    r1, #35 ; 0x23
+   0x1fff124a: muls    r0, r1
+   0x1fff124c: mov     r1, r7
+   0x1fff124e: bl      0x1fff18a0
+   0x1fff1252: movs    r1, #1
+   0x1fff1254: lsls    r0, r0, #16
+   0x1fff1256: lsls    r1, r1, #16
+   0x1fff1258: adds    r0, r0, r1
+   0x1fff125a: orrs    r0, r6
+   0x1fff125c: str     r0, [r4, #16]
+   0x1fff125e: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1260: ldr     r3, [pc, #368]  ; (0x1fff13d4)
+   0x1fff1262: str     r2, [r3, #4]
+   0x1fff1264: cmp     r1, #0
+   0x1fff1266: beq.n   0x1fff1274
+   0x1fff1268: cmp     r1, #2
+   0x1fff126a: beq.n   0x1fff1282
+   0x1fff126c: cmp     r0, #0
+   0x1fff126e: beq.n   0x1fff128e
+   0x1fff1270: movs    r0, #4
+   0x1fff1272: b.n     0x1fff127a
+   0x1fff1274: cmp     r0, #0
+   0x1fff1276: beq.n   0x1fff127e
+   0x1fff1278: movs    r0, #3
+   0x1fff127a: str     r0, [r3, #0]
+   0x1fff127c: bx      lr
+   0x1fff127e: movs    r0, #8
+   0x1fff1280: b.n     0x1fff127a
+   0x1fff1282: cmp     r0, #0
+   0x1fff1284: beq.n   0x1fff128a
+   0x1fff1286: movs    r0, #5
+   0x1fff1288: b.n     0x1fff127a
+   0x1fff128a: movs    r0, #10
+   0x1fff128c: b.n     0x1fff127a
+   0x1fff128e: movs    r0, #9
+   0x1fff1290: b.n     0x1fff127a
+   0x1fff1292: movs    r2, #5
+   0x1fff1294: ldr     r1, [pc, #320]  ; (0x1fff13d8)
+   0x1fff1296: lsls    r2, r2, #26
+   0x1fff1298: str     r2, [r1, #40]   ; 0x28
+   0x1fff129a: ldr     r2, [pc, #312]  ; (0x1fff13d4)
+   0x1fff129c: str     r0, [r2, #4]
+   0x1fff129e: movs    r0, #6
+   0x1fff12a0: str     r0, [r2, #0]
+   0x1fff12a2: ldr     r0, [r1, #32]
+   0x1fff12a4: lsls    r0, r0, #3
+   0x1fff12a6: bpl.n   0x1fff12a2
+   0x1fff12a8: bx      lr
+   0x1fff12aa: push    {r4, r5, r6, lr}
+   0x1fff12ac: mov     r4, r1
+   0x1fff12ae: mov     r5, r2
+   0x1fff12b0: mov     r6, r0
+   0x1fff12b2: movs    r1, #4
+   0x1fff12b4: bl      0x1fff109c
+   0x1fff12b8: cmp     r0, #0
+   0x1fff12ba: bne.n   0x1fff12d4
+   0x1fff12bc: movs    r1, #4
+   0x1fff12be: mov     r0, r5
+   0x1fff12c0: bl      0x1fff109c
+   0x1fff12c4: cmp     r0, #0
+   0x1fff12c6: bne.n   0x1fff12d4
+   0x1fff12c8: movs    r1, #4
+   0x1fff12ca: mov     r0, r4
+   0x1fff12cc: bl      0x1fff109c
+   0x1fff12d0: cmp     r0, #0
+   0x1fff12d2: beq.n   0x1fff12e2
+   0x1fff12d4: movs    r1, #2
+   0x1fff12d6: mov     r0, r6
+   0x1fff12d8: bl      0x1fff109c
+   0x1fff12dc: cmp     r0, #0
+   0x1fff12de: beq.n   0x1fff12e6
+   0x1fff12e0: b.n     0x1fff12fe
+   0x1fff12e2: movs    r0, #2
+   0x1fff12e4: pop     {r4, r5, r6, pc}
+   0x1fff12e6: movs    r1, #2
+   0x1fff12e8: mov     r0, r5
+   0x1fff12ea: bl      0x1fff109c
+   0x1fff12ee: cmp     r0, #0
+   0x1fff12f0: bne.n   0x1fff12fe
+   0x1fff12f2: movs    r1, #2
+   0x1fff12f4: mov     r0, r4
+   0x1fff12f6: bl      0x1fff109c
+   0x1fff12fa: cmp     r0, #0
+   0x1fff12fc: beq.n   0x1fff1302
+   0x1fff12fe: movs    r0, #0
+   0x1fff1300: pop     {r4, r5, r6, pc}
+   0x1fff1302: movs    r0, #1
+   0x1fff1304: pop     {r4, r5, r6, pc}
+   0x1fff1306: push    {r1, r2, r3, r4, r5, r6, r7, lr}
+   0x1fff1308: mov     r5, r0
+   0x1fff130a: mov     r4, r1
+   0x1fff130c: mov     r6, r2
+   0x1fff130e: bl      0x1fff12aa
+   0x1fff1312: mov     r1, r0
+   0x1fff1314: str     r0, [sp, #0]
+   0x1fff1316: mov     r2, r5
+   0x1fff1318: movs    r0, #1
+   0x1fff131a: bl      0x1fff1260
+   0x1fff131e: ldr     r7, [pc, #180]  ; (0x1fff13d4)
+   0x1fff1320: str     r5, [sp, #4]
+   0x1fff1322: b.n     0x1fff136e
+   0x1fff1324: ldr     r0, [sp, #0]
+   0x1fff1326: cmp     r0, #0
+   0x1fff1328: beq.n   0x1fff1346
+   0x1fff132a: cmp     r0, #2
+   0x1fff132c: beq.n   0x1fff1352
+   0x1fff132e: ldrh    r0, [r4, #0]
+   0x1fff1330: adds    r4, r4, #2
+   0x1fff1332: str     r0, [r7, #8]
+   0x1fff1334: adds    r5, r5, #2
+   0x1fff1336: subs    r6, r6, #2
+   0x1fff1338: movs    r1, #64 ; 0x40
+   0x1fff133a: mov     r0, r5
+   0x1fff133c: bl      0x1fff109c
+   0x1fff1340: cmp     r0, #0
+   0x1fff1342: bne.n   0x1fff136e
+   0x1fff1344: b.n     0x1fff135c
+   0x1fff1346: ldrb    r0, [r4, #0]
+   0x1fff1348: adds    r4, r4, #1
+   0x1fff134a: str     r0, [r7, #8]
+   0x1fff134c: adds    r5, r5, #1
+   0x1fff134e: subs    r6, r6, #1
+   0x1fff1350: b.n     0x1fff1338
+   0x1fff1352: ldmia   r4!, {r0}
+   0x1fff1354: str     r0, [r7, #8]
+   0x1fff1356: adds    r5, r5, #4
+   0x1fff1358: subs    r6, r6, #4
+   0x1fff135a: b.n     0x1fff1338
+   0x1fff135c: ldr     r0, [sp, #4]
+   0x1fff135e: bl      0x1fff1292
+   0x1fff1362: mov     r2, r5
+   0x1fff1364: str     r5, [sp, #4]
+   0x1fff1366: movs    r0, #1
+   0x1fff1368: ldr     r1, [sp, #0]
+   0x1fff136a: bl      0x1fff1260
+   0x1fff136e: cmp     r6, #0
+   0x1fff1370: bne.n   0x1fff1324
+   0x1fff1372: movs    r1, #64 ; 0x40
+   0x1fff1374: mov     r0, r5
+   0x1fff1376: bl      0x1fff109c
+   0x1fff137a: cmp     r0, #0
+   0x1fff137c: beq.n   0x1fff1384
+   0x1fff137e: ldr     r0, [sp, #4]
+   0x1fff1380: bl      0x1fff1292
+   0x1fff1384: movs    r0, #0
+   0x1fff1386: str     r0, [r7, #0]
+   0x1fff1388: str     r0, [r7, #20]
+   0x1fff138a: pop     {r1, r2, r3, r4, r5, r6, r7, pc}
+   0x1fff138c: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff138e: mov     r7, r0
+   0x1fff1390: mov     r4, r1
+   0x1fff1392: mov     r5, r2
+   0x1fff1394: bl      0x1fff12aa
+   0x1fff1398: mov     r6, r0
+   0x1fff139a: mov     r1, r0
+   0x1fff139c: mov     r2, r7
+   0x1fff139e: movs    r0, #0
+   0x1fff13a0: bl      0x1fff1260
+   0x1fff13a4: ldr     r0, [pc, #44]   ; (0x1fff13d4)
+   0x1fff13a6: b.n     0x1fff13b8
+   0x1fff13a8: cmp     r6, #0
+   0x1fff13aa: beq.n   0x1fff13c4
+   0x1fff13ac: ldr     r1, [r0, #12]
+   0x1fff13ae: cmp     r6, #2
+   0x1fff13b0: beq.n   0x1fff13ce
+   0x1fff13b2: strh    r1, [r4, #0]
+   0x1fff13b4: adds    r4, r4, #2
+   0x1fff13b6: subs    r5, r5, #2
+   0x1fff13b8: cmp     r5, #0
+   0x1fff13ba: bne.n   0x1fff13a8
+   0x1fff13bc: movs    r1, #0
+   0x1fff13be: str     r1, [r0, #0]
+   0x1fff13c0: str     r1, [r0, #20]
+   0x1fff13c2: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff13c4: ldr     r1, [r0, #12]
+   0x1fff13c6: strb    r1, [r4, #0]
+   0x1fff13c8: adds    r4, r4, #1
+   0x1fff13ca: subs    r5, r5, #1
+   0x1fff13cc: b.n     0x1fff13b8
+   0x1fff13ce: stmia   r4!, {r1}
+   0x1fff13d0: subs    r5, r5, #4
+   0x1fff13d2: b.n     0x1fff13b8
+   0x1fff13d4: stmia   r0!, {r7}
+   0x1fff13d6: ands    r3, r0
+   0x1fff13d8: ldmia   r7, {r6, r7}
+   0x1fff13da: ands    r3, r0
+
+       {
+
+   0x1fff13dc: push    {r0, r1, r4, r5, r6, r7, lr}
+   0x1fff13de: sub     sp, #28
+   0x1fff13e0: movs    r0, #1
+   0x1fff13e2: movs    r6, #0
+   0x1fff13e4: str     r0, [sp, #12]
+   0x1fff13e6: bl      0x1fff1616
+   0x1fff13ea: mov     r4, r0
+   0x1fff13ec: bl      0x1fff1610
+   0x1fff13f0: ldr     r1, [pc, #496]  ; (0x1fff15e4)
+   0x1fff13f2: ldr     r0, [r1, #0]
+   0x1fff13f4: movs    r2, #64 ; 0x40
+   0x1fff13f6: orrs    r0, r2
+   0x1fff13f8: str     r0, [r1, #0]
+   0x1fff13fa: ldr     r0, [pc, #492]  ; (0x1fff15e8)
+   0x1fff13fc: ldr     r0, [r0, #0]
+   0x1fff13fe: str     r0, [sp, #8]
+   0x1fff1400: ldr     r0, [r1, #0]
+   0x1fff1402: bics    r0, r2
+   0x1fff1404: str     r0, [r1, #0]
+   0x1fff1406: mov     r0, r4
+   0x1fff1408: bl      0x1fff1600
+   0x1fff140c: ldr     r0, [sp, #28]
+   0x1fff140e: ldr     r1, [r0, #0]
+   0x1fff1410: ldr     r0, [sp, #32]
+   0x1fff1412: str     r1, [r0, #4]
+   0x1fff1414: ldr     r0, [sp, #28]
+   0x1fff1416: ldr     r1, [pc, #472]  ; (0x1fff15f0)
+   0x1fff1418: ldr     r7, [r0, #0]
+   0x1fff141a: ldr     r0, [pc, #464]  ; (0x1fff15ec)
+   0x1fff141c: adds    r0, r7, r0
+   0x1fff141e: cmp     r0, r1
+   0x1fff1420: bcs.n   0x1fff1434
+   0x1fff1422: ldr     r0, [sp, #28]
+   0x1fff1424: ldr     r1, [sp, #8]
+   0x1fff1426: ldr     r0, [r0, #4]
+   0x1fff1428: str     r0, [sp, #0]
+   0x1fff142a: cmp     r0, r1
+   0x1fff142c: bhi.n   0x1fff1434
+   0x1fff142e: lsls    r0, r0, #8
+   0x1fff1430: cmp     r0, r7
+   0x1fff1432: bcs.n   0x1fff143e
+   0x1fff1434: ldr     r1, [sp, #32]
+   0x1fff1436: movs    r0, #1
+   0x1fff1438: str     r0, [r1, #0]
+   0x1fff143a: add     sp, #36 ; 0x24
+   0x1fff143c: pop     {r4, r5, r6, r7, pc}
+
+       }
+
+   0x1fff143e: ldr     r0, [sp, #28]
+   0x1fff1440: ldr     r0, [r0, #8]
+   0x1fff1442: str     r0, [sp, #20]
+   0x1fff1444: cmp     r0, #3
+   0x1fff1446: bls.n   0x1fff1450
+   0x1fff1448: ldr     r0, [sp, #32]
+   0x1fff144a: movs    r1, #2
+   0x1fff144c: str     r1, [r0, #0]
+   0x1fff144e: b.n     0x1fff143a
+   0x1fff1450: movs    r4, #1
+   0x1fff1452: movs    r5, #0
+   0x1fff1454: str     r7, [sp, #4]
+   0x1fff1456: str     r4, [sp, #16]
+   0x1fff1458: b.n     0x1fff14ea
+   0x1fff145a: ldr     r1, [sp, #0]
+   0x1fff145c: ldr     r0, [sp, #4]
+   0x1fff145e: bl      0x1fff18a0
+   0x1fff1462: ldr     r1, [sp, #0]
+   0x1fff1464: ldr     r2, [sp, #4]
+   0x1fff1466: muls    r1, r0
+   0x1fff1468: cmp     r1, r2
+   0x1fff146a: bne.n   0x1fff1474
+   0x1fff146c: str     r0, [sp, #16]
+   0x1fff146e: movs    r0, #0
+   0x1fff1470: str     r0, [sp, #12]
+   0x1fff1472: b.n     0x1fff14ea
+   0x1fff1474: ldr     r2, [sp, #20]
+   0x1fff1476: cmp     r2, #2
+   0x1fff1478: beq.n   0x1fff147e
+   0x1fff147a: cmp     r2, #3
+   0x1fff147c: bne.n   0x1fff14aa
+   0x1fff147e: cmp     r0, #0
+   0x1fff1480: beq.n   0x1fff14aa
+   0x1fff1482: cmp     r5, #0
+   0x1fff1484: beq.n   0x1fff14a6
+   0x1fff1486: ldr     r2, [sp, #0]
+   0x1fff1488: mov     r3, r7
+   0x1fff148a: muls    r3, r5
+   0x1fff148c: muls    r2, r6
+   0x1fff148e: subs    r2, r3, r2
+   0x1fff1490: bpl.n   0x1fff1494
+   0x1fff1492: negs    r2, r2
+   0x1fff1494: mov     r3, r7
+   0x1fff1496: muls    r2, r0
+   0x1fff1498: muls    r3, r4
+   0x1fff149a: subs    r1, r3, r1
+   0x1fff149c: bpl.n   0x1fff14a0
+   0x1fff149e: negs    r1, r1
+   0x1fff14a0: muls    r1, r6
+   0x1fff14a2: cmp     r1, r2
+   0x1fff14a4: bge.n   0x1fff14aa
+   0x1fff14a6: mov     r5, r4
+   0x1fff14a8: mov     r6, r0
+   0x1fff14aa: ldr     r1, [sp, #20]
+   0x1fff14ac: cmp     r1, #1
+   0x1fff14ae: beq.n   0x1fff14b4
+   0x1fff14b0: cmp     r1, #3
+   0x1fff14b2: bne.n   0x1fff14e2
+   0x1fff14b4: cmp     r5, #0
+   0x1fff14b6: beq.n   0x1fff1502
+   0x1fff14b8: ldr     r1, [sp, #0]
+   0x1fff14ba: mov     r2, r7
+   0x1fff14bc: adds    r0, r0, #1
+   0x1fff14be: muls    r2, r5
+   0x1fff14c0: muls    r1, r6
+   0x1fff14c2: subs    r2, r2, r1
+   0x1fff14c4: bpl.n   0x1fff14c8
+   0x1fff14c6: negs    r2, r2
+   0x1fff14c8: ldr     r1, [sp, #0]
+   0x1fff14ca: mov     r3, r7
+   0x1fff14cc: muls    r2, r0
+   0x1fff14ce: muls    r3, r4
+   0x1fff14d0: muls    r1, r0
+   0x1fff14d2: subs    r1, r3, r1
+   0x1fff14d4: bpl.n   0x1fff14d8
+   0x1fff14d6: negs    r1, r1
+   0x1fff14d8: muls    r1, r6
+   0x1fff14da: cmp     r1, r2
+   0x1fff14dc: bge.n   0x1fff14e2
+   0x1fff14de: mov     r5, r4
+   0x1fff14e0: mov     r6, r0
+   0x1fff14e2: ldr     r0, [sp, #4]
+   0x1fff14e4: adds    r0, r7, r0
+   0x1fff14e6: adds    r4, r4, #1
+   0x1fff14e8: str     r0, [sp, #4]
+   0x1fff14ea: ldr     r1, [sp, #8]
+   0x1fff14ec: ldr     r0, [sp, #4]
+   0x1fff14ee: cmp     r0, r1
+   0x1fff14f0: bhi.n   0x1fff14f8
+   0x1fff14f2: ldr     r0, [sp, #12]
+   0x1fff14f4: cmp     r0, #0
+   0x1fff14f6: bne.n   0x1fff145a
+   0x1fff14f8: ldr     r0, [sp, #20]
+   0x1fff14fa: movs    r7, #0
+   0x1fff14fc: cmp     r0, #0
+   0x1fff14fe: beq.n   0x1fff1508
+   0x1fff1500: b.n     0x1fff150e
+   0x1fff1502: mov     r5, r4
+   0x1fff1504: adds    r0, r0, #1
+   0x1fff1506: b.n     0x1fff14e0
+   0x1fff1508: ldr     r0, [sp, #12]
+   0x1fff150a: cmp     r0, #1
+   0x1fff150c: beq.n   0x1fff1532
+   0x1fff150e: cmp     r5, #0
+   0x1fff1510: bne.n   0x1fff1518
+   0x1fff1512: ldr     r0, [sp, #12]
+   0x1fff1514: cmp     r0, #1
+   0x1fff1516: beq.n   0x1fff1532
+   0x1fff1518: ldr     r1, [sp, #32]
+   0x1fff151a: movs    r0, #0
+   0x1fff151c: str     r0, [r1, #0]
+   0x1fff151e: ldr     r0, [sp, #12]
+   0x1fff1520: cmp     r0, #0
+   0x1fff1522: beq.n   0x1fff1544
+   0x1fff1524: mov     r4, r5
+   0x1fff1526: str     r6, [sp, #16]
+   0x1fff1528: ldr     r0, [sp, #28]
+   0x1fff152a: ldr     r2, [pc, #200]  ; (0x1fff15f4)
+   0x1fff152c: ldr     r0, [r0, #0]
+   0x1fff152e: muls    r0, r4
+   0x1fff1530: b.n     0x1fff155a
+   0x1fff1532: movs    r0, #1
+   0x1fff1534: movs    r4, #0
+   0x1fff1536: str     r0, [sp, #16]
+   0x1fff1538: ldr     r1, [sp, #32]
+   0x1fff153a: movs    r0, #3
+   0x1fff153c: str     r0, [r1, #0]
+   0x1fff153e: ldr     r0, [sp, #28]
+   0x1fff1540: ldr     r1, [r0, #0]
+   0x1fff1542: b.n     0x1fff154e
+   0x1fff1544: cmp     r4, #1
+   0x1fff1546: bne.n   0x1fff1528
+   0x1fff1548: ldr     r0, [sp, #28]
+   0x1fff154a: movs    r4, #0
+   0x1fff154c: ldr     r1, [r0, #4]
+   0x1fff154e: ldr     r0, [sp, #32]
+   0x1fff1550: str     r1, [r0, #4]
+   0x1fff1552: b.n     0x1fff156e
+   0x1fff1554: adds    r7, r7, #1
+   0x1fff1556: cmp     r7, #4
+   0x1fff1558: beq.n   0x1fff1564
+   0x1fff155a: mov     r1, r0
+   0x1fff155c: lsls    r1, r7
+   0x1fff155e: lsls    r1, r1, #1
+   0x1fff1560: cmp     r1, r2
+   0x1fff1562: bcc.n   0x1fff1554
+   0x1fff1564: ldr     r1, [sp, #16]
+   0x1fff1566: bl      0x1fff18a0
+   0x1fff156a: ldr     r1, [sp, #32]
+   0x1fff156c: str     r0, [r1, #4]
+   0x1fff156e: ldr     r1, [pc, #136]  ; (0x1fff15f8)
+   0x1fff1570: ldr     r0, [sp, #16]
+   0x1fff1572: str     r0, [r1, #56]   ; 0x38
+   0x1fff1574: ldr     r3, [pc, #132]  ; (0x1fff15fc)
+   0x1fff1576: movs    r5, #128        ; 0x80
+   0x1fff1578: ldr     r0, [r3, #56]   ; 0x38
+   0x1fff157a: cmp     r4, #0
+   0x1fff157c: beq.n   0x1fff1596
+   0x1fff157e: bics    r0, r5
+   0x1fff1580: str     r0, [r3, #56]   ; 0x38
+   0x1fff1582: lsls    r0, r7, #5
+   0x1fff1584: subs    r4, r4, #1
+   0x1fff1586: orrs    r0, r4
+   0x1fff1588: ldr     r4, [pc, #108]  ; (0x1fff15f8)
+   0x1fff158a: subs    r4, #64 ; 0x40
+   0x1fff158c: str     r0, [r4, #8]
+   0x1fff158e: ldr     r0, [sp, #28]
+   0x1fff1590: ldr     r2, [r0, #12]
+   0x1fff1592: adds    r0, r2, #1
+   0x1fff1594: b.n     0x1fff15a2
+   0x1fff1596: orrs    r0, r5
+   0x1fff1598: str     r0, [r3, #56]   ; 0x38
+   0x1fff159a: b.n     0x1fff143a
+   0x1fff159c: cmp     r2, #0
+   0x1fff159e: beq.n   0x1fff15a2
+   0x1fff15a0: subs    r0, r0, #1
+   0x1fff15a2: ldr     r6, [r4, #12]
+   0x1fff15a4: lsls    r6, r6, #31
+   0x1fff15a6: bne.n   0x1fff15ac
+   0x1fff15a8: cmp     r0, #0
+   0x1fff15aa: bne.n   0x1fff159c
+   0x1fff15ac: ldr     r0, [r4, #12]
+   0x1fff15ae: lsls    r0, r0, #31
+   0x1fff15b0: beq.n   0x1fff15c8
+   0x1fff15b2: movs    r0, #3
+   0x1fff15b4: str     r0, [r1, #48]   ; 0x30
+   0x1fff15b6: movs    r0, #1
+   0x1fff15b8: str     r0, [r1, #52]   ; 0x34
+   0x1fff15ba: movs    r2, #0
+   0x1fff15bc: str     r2, [r1, #52]   ; 0x34
+   0x1fff15be: str     r0, [r1, #52]   ; 0x34
+   0x1fff15c0: ldr     r0, [r1, #52]   ; 0x34
+   0x1fff15c2: lsls    r0, r0, #31
+   0x1fff15c4: beq.n   0x1fff15c0
+   0x1fff15c6: b.n     0x1fff143a
+   0x1fff15c8: ldr     r0, [r3, #56]   ; 0x38
+   0x1fff15ca: orrs    r0, r5
+   0x1fff15cc: str     r0, [r3, #56]   ; 0x38
+   0x1fff15ce: ldr     r0, [sp, #32]
+   0x1fff15d0: movs    r2, #4
+   0x1fff15d2: str     r2, [r0, #0]
+   0x1fff15d4: movs    r0, #1
+   0x1fff15d6: str     r0, [r1, #56]   ; 0x38
+   0x1fff15d8: ldr     r0, [sp, #28]
+   0x1fff15da: ldr     r1, [r0, #0]
+   0x1fff15dc: ldr     r0, [sp, #32]
+   0x1fff15de: str     r1, [r0, #4]
+   0x1fff15e0: b.n     0x1fff143a
+   0x1fff15e2: movs    r0, r0
+   0x1fff15e4: stmia   r0!, {}
+   0x1fff15e6: ands    r3, r0
+   0x1fff15e8: lsls    r4, r6, #23
+   0x1fff15ea: movs    r0, r0
+   0x1fff15ec: bhi.n   0x1fff15d0
+   0x1fff15ee:                 ; <UNDEFINED> instruction: 0xffff3a99
+   0x1fff15f2: movs    r0, r0
+   0x1fff15f4: str     r0, [r4, #20]
+   0x1fff15f6: movs    r2, r0
+   0x1fff15f8: strh    r0, [r0, #2]
+   0x1fff15fa: ands    r4, r0
+   0x1fff15fc: strh    r0, [r0, #16]
+   0x1fff15fe: ands    r4, r0
+
+       Reset stuff in preparation for starting application
+       {
+
+   0x1fff1600: ldr     r1, [pc, #244]  ; (0x1fff16f8)  c0de0000
+   0x1fff1602: uxth    r0, r0
+   0x1fff1604: orrs    r0, r1
+   0x1fff1606: ldr     r1, [pc, #244]  ; (0x1fff16fc)  40048200        SCB + 0x200
+   0x1fff1608: str     r0, [r1, #36]   ; 0x24                          (SCB + 0x224)
+   0x1fff160a: ldr     r0, [pc, #244]  ; (0x1fff1700)  4003c000        flash controller
+   0x1fff160c: ldr     r0, [r0, #0]
+   0x1fff160e: bx      lr
+
+       }
+
+
+   0x1fff1610: movs    r1, #96 ; 0x60
+   0x1fff1612: orrs    r0, r1
+   0x1fff1614: b.n     0x1fff1600
+   0x1fff1616: ldr     r0, [pc, #228]  ; (0x1fff16fc)
+   0x1fff1618: ldr     r0, [r0, #36]   ; 0x24
+   0x1fff161a: bx      lr
+
+       }
+       
+       {
+
+   0x1fff161c: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff161e: mov     r2, r0
+   0x1fff1620: ldr     r0, [pc, #216]  ; (0x1fff16fc)
+   0x1fff1622: mov     r4, r1
+   0x1fff1624: ldr     r0, [r0, #36]   ; 0x24
+   0x1fff1626: str     r0, [sp, #0]
+   0x1fff1628: bl      0x1fff1610
+   0x1fff162c: ldr     r3, [pc, #208]  ; (0x1fff1700)
+   0x1fff162e: ldr     r0, [r3, #0]
+   0x1fff1630: movs    r1, #64 ; 0x40
+   0x1fff1632: orrs    r0, r1
+   0x1fff1634: str     r0, [r3, #0]
+   0x1fff1636: ldr     r0, [pc, #208]  ; (0x1fff1708)
+   0x1fff1638: ldr     r1, [pc, #200]  ; (0x1fff1704)
+   0x1fff163a: str     r1, [r0, #16]
+   0x1fff163c: ldr     r5, [pc, #204]  ; (0x1fff170c)
+   0x1fff163e: movs    r1, #125        ; 0x7d
+   0x1fff1640: ldr     r0, [r2, #0]
+   0x1fff1642: lsls    r1, r1, #3
+   0x1fff1644: ldr     r5, [r5, #0]
+   0x1fff1646: muls    r1, r0
+   0x1fff1648: cmp     r1, r5
+   0x1fff164a: bhi.n   0x1fff165c
+   0x1fff164c: cmp     r0, #0
+   0x1fff164e: beq.n   0x1fff165c
+   0x1fff1650: ldr     r0, [r2, #4]
+   0x1fff1652: cmp     r0, #3
+   0x1fff1654: bls.n   0x1fff1660
+   0x1fff1656: movs    r0, #2
+   0x1fff1658: str     r0, [r4, #0]
+   0x1fff165a: b.n     0x1fff16e2
+   0x1fff165c: movs    r0, #1
+   0x1fff165e: b.n     0x1fff1658
+   0x1fff1660: movs    r0, #0
+   0x1fff1662: str     r0, [r4, #0]
+   0x1fff1664: ldr     r4, [pc, #148]  ; (0x1fff16fc)
+   0x1fff1666: subs    r4, #192        ; 0xc0
+   0x1fff1668: ldr     r1, [r4, #32]
+   0x1fff166a: str     r0, [r4, #32]
+   0x1fff166c: uxtb    r1, r1
+   0x1fff166e: mov     r12, r1
+   0x1fff1670: ldr     r0, [r3, #16]
+   0x1fff1672: lsrs    r0, r0, #8
+   0x1fff1674: lsls    r0, r0, #8
+   0x1fff1676: adds    r0, r0, #2
+   0x1fff1678: str     r0, [r3, #16]
+   0x1fff167a: ldr     r0, [r3, #0]
+   0x1fff167c: ldr     r7, [pc, #144]  ; (0x1fff1710)
+   0x1fff167e: ands    r0, r7
+   0x1fff1680: str     r0, [r3, #0]
+   0x1fff1682: ldr     r0, [r2, #4]
+   0x1fff1684: cmp     r0, #0
+   0x1fff1686: beq.n   0x1fff16ce
+   0x1fff1688: ldr     r1, [r2, #0]
+   0x1fff168a: movs    r5, #6
+   0x1fff168c: muls    r1, r5
+   0x1fff168e: ldr     r5, [pc, #132]  ; (0x1fff1714)
+   0x1fff1690: lsls    r0, r0, #1
+   0x1fff1692: adds    r1, r1, r5
+   0x1fff1694: adds    r0, r1, r0
+   0x1fff1696: subs    r0, #8
+   0x1fff1698: ldrb    r1, [r0, #0]
+   0x1fff169a: ldrb    r0, [r0, #1]
+   0x1fff169c: str     r0, [r4, #32]
+   0x1fff169e: ldr     r5, [r3, #16]
+   0x1fff16a0: movs    r4, #3
+   0x1fff16a2: lsls    r4, r4, #14
+   0x1fff16a4: bics    r5, r4
+   0x1fff16a6: lsrs    r4, r1, #4
+   0x1fff16a8: ldr     r6, [pc, #108]  ; (0x1fff1718)
+   0x1fff16aa: lsls    r4, r4, #1
+   0x1fff16ac: ldrh    r6, [r6, r4]
+   0x1fff16ae: orrs    r5, r6
+   0x1fff16b0: str     r5, [r3, #16]
+   0x1fff16b2: ldr     r5, [r3, #0]
+   0x1fff16b4: ldr     r6, [pc, #96]   ; (0x1fff1718)
+   0x1fff16b6: ands    r5, r7
+   0x1fff16b8: subs    r6, #12
+   0x1fff16ba: ldrh    r4, [r6, r4]
+   0x1fff16bc: orrs    r5, r4
+   0x1fff16be: str     r5, [r3, #0]
+   0x1fff16c0: ldr     r4, [r3, #16]
+   0x1fff16c2: lsls    r1, r1, #28
+   0x1fff16c4: lsrs    r4, r4, #8
+   0x1fff16c6: lsls    r4, r4, #8
+   0x1fff16c8: lsrs    r1, r1, #28
+   0x1fff16ca: orrs    r4, r1
+   0x1fff16cc: str     r4, [r3, #16]
+   0x1fff16ce: cmp     r12, r0
+   0x1fff16d0: bls.n   0x1fff16e2
+   0x1fff16d2: ldr     r1, [r2, #8]
+   0x1fff16d4: movs    r0, #0
+   0x1fff16d6: movs    r2, #25
+   0x1fff16d8: muls    r1, r2
+   0x1fff16da: b.n     0x1fff16de
+
+   0x1fff16dc: adds    r0, r0, #1
+   0x1fff16de: cmp     r1, r0
+   0x1fff16e0: bhi.n   0x1fff16dc
+   0x1fff16e2: ldr     r0, [pc, #36]   ; (0x1fff1708)
+   0x1fff16e4: movs    r1, #0
+   0x1fff16e6: str     r1, [r0, #16]
+   0x1fff16e8: ldr     r0, [r3, #0]
+   0x1fff16ea: movs    r1, #64 ; 0x40
+   0x1fff16ec: bics    r0, r1
+   0x1fff16ee: str     r0, [r3, #0]
+   0x1fff16f0: ldr     r0, [sp, #0]
+   0x1fff16f2: bl      0x1fff1600
+   0x1fff16f6: pop     {r3, r4, r5, r6, r7, pc}
+
+0x1fff16f0:    0xf7ff9800      0xbdf8ff85      0xc0de0000      0x40048200
+0x1fff1700:    0x4003c000      0x12345678      0x400483c0      0x000005f4
+0x1fff1710:    0xffffdfef      0x00000680      0x1fff1f80      0x1c04b510
+
+   0x1fff16f8: movs    r0, r0
+   0x1fff16fa: stmia   r0!, {r1, r2, r3, r4, r6, r7}
+   0x1fff16fc: strh    r0, [r0, #16]
+   0x1fff16fe: ands    r4, r0
+   0x1fff1700: stmia   r0!, {}
+   0x1fff1702: ands    r3, r0
+   0x1fff1704: ldrsb   r0, [r7, r1]
+   0x1fff1706: asrs    r4, r6, #8
+   0x1fff1708: strh    r0, [r0, #30]
+   0x1fff170a: ands    r4, r0
+   0x1fff170c: lsls    r4, r6, #23
+   0x1fff170e: movs    r0, r0
+   0x1fff1710: svc     239     ; 0xef
+   0x1fff1712: vcvt.f<illegal width 64>.u<illegal width 64>    d16, d0
+   0x1fff1716: movs    r0, r0
+   0x1fff1718: subs    r0, r0, #6
+   0x1fff171a: subs    r7, r7, #7
+
+
+
+   0x1fff171c: push    {r4, lr}
+   0x1fff171e: adds    r4, r0, #0
+   0x1fff1720: adds    r0, r1, #0
+   0x1fff1722: adds    r1, r2, #0
+   0x1fff1724: bl      0x1fff173c
+   0x1fff1728: stmia   r4!, {r0, r1}
+   0x1fff172a: pop     {r4, pc}
+   0x1fff172c: push    {r4, lr}
+   0x1fff172e: adds    r4, r0, #0
+   0x1fff1730: adds    r0, r1, #0
+   0x1fff1732: adds    r1, r2, #0
+   0x1fff1734: bl      0x1fff1742
+   0x1fff1738: stmia   r4!, {r0, r1}
+   0x1fff173a: pop     {r4, pc}
+   0x1fff173c: adds    r3, r0, #0
+   0x1fff173e: orrs    r3, r1
+   0x1fff1740: bmi.n   0x1fff17d8
+   0x1fff1742: push    {r4, r5, lr}
+   0x1fff1744: mov     r12, r0
+   0x1fff1746: mov     lr, r1
+   0x1fff1748: subs    r2, r1, #1
+   0x1fff174a: bmi.n   0x1fff17cc
+   0x1fff174c: movs    r5, #30
+   0x1fff174e: lsrs    r2, r1, #15
+   0x1fff1750: bne.n   0x1fff1756
+   0x1fff1752: subs    r5, #16
+   0x1fff1754: lsls    r1, r1, #16
+   0x1fff1756: lsrs    r2, r1, #23
+   0x1fff1758: bne.n   0x1fff175e
+   0x1fff175a: subs    r5, #8
+   0x1fff175c: lsls    r1, r1, #8
+   0x1fff175e: lsrs    r2, r1, #27
+   0x1fff1760: bne.n   0x1fff1768
+   0x1fff1762: subs    r5, #4
+   0x1fff1764: lsls    r1, r1, #4
+   0x1fff1766: lsrs    r2, r1, #27
+   0x1fff1768: add     r3, pc, #160    ; (adr r3, 0x1fff180c)
+   0x1fff176a: ldrb    r2, [r3, r2]
+   0x1fff176c: subs    r5, r5, r2
+   0x1fff176e: lsls    r1, r2
+   0x1fff1770: subs    r3, #111        ; 0x6f
+   0x1fff1772: lsrs    r2, r1, #23
+   0x1fff1774: ldrb    r3, [r3, r2]
+   0x1fff1776: adds    r3, #255        ; 0xff
+   0x1fff1778: lsrs    r2, r1, #10
+   0x1fff177a: muls    r2, r3
+   0x1fff177c: asrs    r2, r2, #6
+   0x1fff177e: muls    r2, r3
+   0x1fff1780: lsls    r3, r3, #24
+   0x1fff1782: subs    r3, r3, r2
+   0x1fff1784: lsrs    r3, r3, #15
+   0x1fff1786: subs    r3, #1
+   0x1fff1788: lsrs    r2, r0, #17
+   0x1fff178a: muls    r2, r3
+   0x1fff178c: lsrs    r2, r2, #21
+   0x1fff178e: lsls    r4, r2, #11
+   0x1fff1790: lsls    r0, r0, #9
+   0x1fff1792: muls    r2, r1
+   0x1fff1794: subs    r0, r0, r2
+   0x1fff1796: lsrs    r2, r0, #16
+   0x1fff1798: muls    r2, r3
+   0x1fff179a: lsrs    r2, r2, #20
+   0x1fff179c: add     r4, r2
+   0x1fff179e: lsls    r4, r4, #10
+   0x1fff17a0: lsls    r0, r0, #11
+   0x1fff17a2: muls    r2, r1
+   0x1fff17a4: subs    r0, r0, r2
+   0x1fff17a6: lsrs    r2, r0, #16
+   0x1fff17a8: muls    r2, r3
+   0x1fff17aa: lsrs    r2, r2, #21
+   0x1fff17ac: add     r4, r2
+   0x1fff17ae: lsls    r0, r0, #10
+   0x1fff17b0: muls    r2, r1
+   0x1fff17b2: subs    r0, r0, r2
+   0x1fff17b4: movs    r2, #0
+   0x1fff17b6: cmp     r0, r1
+   0x1fff17b8: adcs    r4, r2
+   0x1fff17ba: lsrs    r4, r5
+   0x1fff17bc: asrs    r5, r5, #8
+   0x1fff17be: eors    r4, r5
+   0x1fff17c0: subs    r0, r4, r5
+   0x1fff17c2: mov     r1, lr
+   0x1fff17c4: muls    r1, r0
+   0x1fff17c6: mov     r2, r12
+   0x1fff17c8: subs    r1, r2, r1
+   0x1fff17ca: pop     {r4, r5, pc}
+   0x1fff17cc: cmp     r1, #0
+   0x1fff17ce: beq.n   0x1fff17f4
+   0x1fff17d0: movs    r4, #0
+   0x1fff17d2: cmp     r0, r1
+   0x1fff17d4: adcs    r4, r4
+   0x1fff17d6: b.n     0x1fff17bc
+   0x1fff17d8: push    {r4, r5, lr}
+   0x1fff17da: mov     r12, r0
+   0x1fff17dc: mov     lr, r1
+   0x1fff17de: asrs    r5, r1, #31
+   0x1fff17e0: eors    r1, r5
+   0x1fff17e2: subs    r1, r1, r5
+   0x1fff17e4: asrs    r2, r0, #31
+   0x1fff17e6: eors    r0, r2
+   0x1fff17e8: subs    r0, r0, r2
+   0x1fff17ea: eors    r5, r2
+   0x1fff17ec: lsls    r5, r5, #8
+   0x1fff17ee: adds    r5, #30
+   0x1fff17f0: cmp     r1, #0
+   0x1fff17f2: bne.n   0x1fff174e
+   0x1fff17f4: movs    r0, #0
+   0x1fff17f6: pop     {r4, r5, pc}
+   0x1fff17f8: strh    r3, [r0, r1]
+   0x1fff17fa: ldrsh   r4, [r2, r5]
+   0x1fff17fc: ldr     r1, [pc, #272]  ; (0x1fff1910)
+   0x1fff17fe: ldr     r1, [pc, #344]  ; (0x1fff1958)
+   0x1fff1800: cmp     r4, r8
+   0x1fff1802: strh    r7, [r3, r1]
+   0x1fff1804: ldr     r5, [pc, #316]  ; (0x1fff1944)
+   0x1fff1806: movs    r0, #32
+   0x1fff1808: movs    r1, r0
+   0x1fff180a: movs    r0, r0
+   0x1fff180c: lsls    r0, r0, #12
+   0x1fff180e: lsls    r2, r0, #8
+   0x1fff1810: lsls    r1, r0, #4
+   0x1fff1812: lsls    r1, r0, #4
+   0x1fff1814: movs    r0, r0
+   0x1fff1816: movs    r0, r0
+   0x1fff1818: movs    r0, r0
+   0x1fff181a: movs    r0, r0
+   0x1fff181c: vaba.u8 <illegal reg q7.5>, q8, <illegal reg q13.5>
+   0x1fff1820: blx     0x200e49fc
+   0x1fff1824: b.n     0x1fff1bf2
+   0x1fff1826: bge.n   0x1fff17e6
+   0x1fff1828: bcc.n   0x1fff17da
+   0x1fff182a: ldmia   r5!, {r4, r6, r7}
+   0x1fff182c: stmia   r7!, {r1, r3, r6, r7}
+   0x1fff182e: stmia   r0!, {r0, r1, r6, r7}
+   0x1fff1830: hlt     0x003d
+   0x1fff1832: push    {r0, r1, r2, r4, r5, r7}
+   0x1fff1834: add     r7, sp, #712    ; 0x2c8
+   0x1fff1836: add     r1, sp, #688    ; 0x2b0
+   0x1fff1838: add     r4, pc, #664    ; (adr r4, 0x1fff1ad4)
+   0x1fff183a: ldr     r6, [sp, #644]  ; 0x284
+   0x1fff183c: ldr     r1, [sp, #624]  ; 0x270
+   0x1fff183e: str     r4, [sp, #604]  ; 0x25c
+   0x1fff1840: ldrh    r2, [r2, #60]   ; 0x3c
+   0x1fff1842: ldrh    r5, [r1, #28]
+   0x1fff1844: strh    r0, [r1, #52]   ; 0x34
+   0x1fff1846: strh    r4, [r0, #12]
+   0x1fff1848: ldrb    r7, [r7, #21]
+   0x1fff184a: ldrb    r3, [r7, #5]
+   0x1fff184c: strb    r6, [r6, #17]
+   0x1fff184e: strb    r2, [r6, #1]
+   0x1fff1850: ldr     r6, [r5, #68]   ; 0x44
+   0x1fff1852: ldr     r2, [r5, #4]
+   0x1fff1854: str     r6, [r4, #68]   ; 0x44
+   0x1fff1856: str     r2, [r4, #4]
+   0x1fff1858: ldrb    r7, [r3, r5]
+   0x1fff185a: ldr     r3, [r3, r5]
+   0x1fff185c: ldrsb   r7, [r2, r1]
+   0x1fff185e: strh    r4, [r2, r1]
+   0x1fff1860: ldr     r7, [pc, #320]  ; (0x1fff19a4)
+   0x1fff1862: ldr     r3, [pc, #308]  ; (0x1fff1998)
+   0x1fff1864: ldr     r0, [pc, #296]  ; (0x1fff1990)
+   0x1fff1866: cmp     r6, r8
+   0x1fff1868: adcs    r3, r0
+   0x1fff186a: subs    r6, #64 ; 0x40
+   0x1fff186c: subs    r3, #61 ; 0x3d
+   0x1fff186e: subs    r0, #58 ; 0x3a
+   0x1fff1870: adds    r5, #55 ; 0x37
+   0x1fff1872: adds    r3, #52 ; 0x34
+   0x1fff1874: adds    r0, #49 ; 0x31
+   0x1fff1876: cmp     r5, #46 ; 0x2e
+   0x1fff1878: cmp     r2, #44 ; 0x2c
+   0x1fff187a: cmp     r0, #41 ; 0x29
+   0x1fff187c: movs    r5, #38 ; 0x26
+   0x1fff187e: movs    r2, #36 ; 0x24
+   0x1fff1880: movs    r0, #33 ; 0x21
+   0x1fff1882: adds    r7, r3, #4
+   0x1fff1884: subs    r4, r3, r4
+   0x1fff1886: adds    r2, r3, r0
+   0x1fff1888: asrs    r7, r2, #24
+   0x1fff188a: asrs    r5, r2, #16
+   0x1fff188c: asrs    r3, r2, #4
+   0x1fff188e: lsrs    r0, r2, #28
+   0x1fff1890: lsrs    r6, r1, #20
+   0x1fff1892: lsrs    r4, r1, #12
+   0x1fff1894: lsrs    r2, r1, #4
+   0x1fff1896: lsls    r0, r1, #28
+   0x1fff1898: lsls    r6, r0, #20
+   0x1fff189a: lsls    r4, r0, #12
+   0x1fff189c: lsls    r1, r0, #4
+   0x1fff189e: nop                     ; (mov r8, r8)
+   0x1fff18a0: push    {r4, r5, lr}
+   0x1fff18a2: mov     r3, r1
+   0x1fff18a4: mov     r1, r0
+   0x1fff18a6: movs    r0, #0
+   0x1fff18a8: movs    r2, #32
+   0x1fff18aa: movs    r4, #1
+   0x1fff18ac: b.n     0x1fff18c2
+   0x1fff18ae: mov     r5, r1
+   0x1fff18b0: lsrs    r5, r2
+   0x1fff18b2: cmp     r5, r3
+   0x1fff18b4: bcc.n   0x1fff18c2
+   0x1fff18b6: mov     r5, r3
+   0x1fff18b8: lsls    r5, r2
+   0x1fff18ba: subs    r1, r1, r5
+   0x1fff18bc: mov     r5, r4
+   0x1fff18be: lsls    r5, r2
+   0x1fff18c0: adds    r0, r0, r5
+   0x1fff18c2: mov     r5, r2
+   0x1fff18c4: subs    r2, r2, #1
+   0x1fff18c6: cmp     r5, #0
+   0x1fff18c8: bgt.n   0x1fff18ae
+   0x1fff18ca: pop     {r4, r5, pc}
+   0x1fff18cc: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff18ce: ldr     r5, [pc, #208]  ; (0x1fff19a0)
+   0x1fff18d0: mov     r7, r0
+   0x1fff18d2: mov     r4, r1
+   0x1fff18d4: ldr     r6, [r5, #0]
+   0x1fff18d6: bl      0x1fff1616
+   0x1fff18da: str     r0, [sp, #0]
+   0x1fff18dc: bl      0x1fff1610
+   0x1fff18e0: ldr     r3, [r7, #0]
+   0x1fff18e2: movs    r1, #0
+   0x1fff18e4: subs    r3, #50 ; 0x32
+   0x1fff18e6: movs    r0, #64 ; 0x40
+   0x1fff18e8: bl      0x1fff19b0
+   0x1fff18ec: lsrs    r5, r1, #32
+   0x1fff18ee: asrs    r5, r1, #8
+   0x1fff18f0: movs    r1, #23
+   0x1fff18f2: adds    r0, r7, #0
+   0x1fff18f4: movs    r6, #70 ; 0x46
+   0x1fff18f6: strh    r3, [r2, r5]
+   0x1fff18f8: ldr     r5, [pc, #292]  ; (0x1fff1a20)
+   0x1fff18fa: lsls    r3, r2, #1
+   0x1fff18fc: mov     r1, r4
+   0x1fff18fe: mov     r0, r7
+   0x1fff1900: bl      0x1fff1e00
+   0x1fff1904: b.n     0x1fff1996
+   0x1fff1906: mov     r1, r4
+   0x1fff1908: mov     r0, r7
+   0x1fff190a: bl      0x1fff1c62
+   0x1fff190e: b.n     0x1fff1996
+   0x1fff1910: mov     r1, r4
+   0x1fff1912: mov     r0, r7
+   0x1fff1914: bl      0x1fff1b30
+   0x1fff1918: b.n     0x1fff1996
+   0x1fff191a: mov     r1, r4
+   0x1fff191c: mov     r0, r7
+   0x1fff191e: bl      0x1fff1a04
+   0x1fff1922: b.n     0x1fff1996
+   0x1fff1924: mov     r1, r4
+   0x1fff1926: mov     r0, r7
+   0x1fff1928: bl      0x1fff1e8c
+   0x1fff192c: b.n     0x1fff1996
+   0x1fff192e: ldr     r0, [pc, #116]  ; (0x1fff19a4)
+   0x1fff1930: str     r1, [r4, #0]
+   0x1fff1932: ldr     r0, [r0, #52]   ; 0x34
+   0x1fff1934: str     r0, [r4, #4]
+   0x1fff1936: b.n     0x1fff1996
+   0x1fff1938: str     r1, [r4, #0]
+   0x1fff193a: ldr     r1, [r5, #0]
+   0x1fff193c: orrs    r1, r0
+   0x1fff193e: str     r1, [r5, #0]
+   0x1fff1940: ldr     r1, [pc, #100]  ; (0x1fff19a8)
+   0x1fff1942: ldr     r2, [r1, #0]
+   0x1fff1944: ldr     r2, [r2, #0]
+   0x1fff1946: str     r2, [r4, #4]
+   0x1fff1948: ldr     r2, [r1, #0]
+   0x1fff194a: ldr     r2, [r2, #4]
+   0x1fff194c: str     r2, [r4, #8]
+   0x1fff194e: ldr     r2, [r1, #0]
+   0x1fff1950: ldr     r2, [r2, #8]
+   0x1fff1952: str     r2, [r4, #12]
+   0x1fff1954: ldr     r1, [r1, #0]
+   0x1fff1956: ldr     r1, [r1, #12]
+   0x1fff1958: str     r1, [r4, #16]
+   0x1fff195a: b.n     0x1fff196a
+   0x1fff195c: str     r1, [r4, #0]
+   0x1fff195e: ldr     r1, [r5, #0]
+   0x1fff1960: orrs    r1, r0
+   0x1fff1962: str     r1, [r5, #0]
+   0x1fff1964: ldr     r1, [pc, #68]   ; (0x1fff19ac)
+   0x1fff1966: ldr     r1, [r1, #0]
+   0x1fff1968: str     r1, [r4, #4]
+   0x1fff196a: ldr     r1, [r5, #0]
+   0x1fff196c: bics    r1, r0
+   0x1fff196e: str     r1, [r5, #0]
+   0x1fff1970: ldr     r1, [r5, #0]
+   0x1fff1972: bics    r1, r0
+   0x1fff1974: str     r1, [r5, #0]
+   0x1fff1976: b.n     0x1fff1996
+   0x1fff1978: bl      0x1fff1e7e
+   0x1fff197c: b.n     0x1fff1996
+   0x1fff197e: mov     r2, r4
+   0x1fff1980: mov     r1, r7
+   0x1fff1982: movs    r0, #1
+   0x1fff1984: b.n     0x1fff198c
+   0x1fff1986: mov     r2, r4
+   0x1fff1988: mov     r1, r7
+   0x1fff198a: movs    r0, #0
+   0x1fff198c: bl      0x1fff1e3c
+   0x1fff1990: b.n     0x1fff1996
+   0x1fff1992: movs    r0, #1
+   0x1fff1994: str     r0, [r4, #0]
+   0x1fff1996: str     r6, [r5, #0]
+   0x1fff1998: ldr     r0, [sp, #0]
+   0x1fff199a: bl      0x1fff1600
+   0x1fff199e: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff19a0: stmia   r0!, {}
+   0x1fff19a2: ands    r3, r0
+   0x1fff19a4: strh    r0, [r0, #30]
+   0x1fff19a6: ands    r4, r0
+   0x1fff19a8: lsls    r4, r3, #23
+   0x1fff19aa: movs    r0, r0
+   0x1fff19ac: lsls    r4, r6, #16
+   0x1fff19ae: movs    r0, r0
+   0x1fff19b0: push    {r4, r5}
+   0x1fff19b2: mov     r4, lr
+   0x1fff19b4: subs    r4, r4, #1
+   0x1fff19b6: ldrb    r5, [r4, #0]
+   0x1fff19b8: adds    r4, r4, #1
+   0x1fff19ba: cmp     r3, r5
+   0x1fff19bc: bcs.n   0x1fff19c0
+   0x1fff19be: mov     r5, r3
+   0x1fff19c0: ldrb    r3, [r4, r5]
+   0x1fff19c2: lsls    r3, r3, #1
+   0x1fff19c4: adds    r3, r4, r3
+   0x1fff19c6: pop     {r4, r5}
+   0x1fff19c8: bx      r3
+   0x1fff19ca: vsli.32 d27, d16, #31
+   0x1fff19ce: ldr     r2, [pc, #1016] ; (0x1fff1dc8)
+   0x1fff19d0: ldr     r4, [r2, #0]
+   0x1fff19d2: movs    r3, #64 ; 0x40
+   0x1fff19d4: orrs    r4, r3
+   0x1fff19d6: str     r4, [r2, #0]
+   0x1fff19d8: ldr     r4, [pc, #1008] ; (0x1fff1dcc)
+   0x1fff19da: ldr     r5, [r4, #0]
+   0x1fff19dc: cmp     r0, r5
+   0x1fff19de: bhi.n   0x1fff19e4
+   0x1fff19e0: cmp     r1, r5
+   0x1fff19e2: bls.n   0x1fff19ec
+   0x1fff19e4: ldr     r0, [r2, #0]
+   0x1fff19e6: bics    r0, r3
+   0x1fff19e8: str     r0, [r2, #0]
+   0x1fff19ea: b.n     0x1fff19f6
+   0x1fff19ec: ldr     r4, [r2, #0]
+   0x1fff19ee: bics    r4, r3
+   0x1fff19f0: str     r4, [r2, #0]
+   0x1fff19f2: cmp     r0, r1
+   0x1fff19f4: bls.n   0x1fff19fa
+   0x1fff19f6: movs    r0, #7
+   0x1fff19f8: pop     {r4, r5, pc}
+   0x1fff19fa: ldr     r0, [r2, #0]
+   0x1fff19fc: bics    r0, r3
+   0x1fff19fe: str     r0, [r2, #0]
+   0x1fff1a00: movs    r0, #0
+   0x1fff1a02: pop     {r4, r5, pc}
+   0x1fff1a04: push    {r4, r5, r6, lr}
+   0x1fff1a06: mov     r4, r1
+   0x1fff1a08: mov     r5, r0
+   0x1fff1a0a: ldr     r1, [r0, #8]
+   0x1fff1a0c: ldr     r0, [r0, #4]
+   0x1fff1a0e: bl      0x1fff19cc
+   0x1fff1a12: str     r0, [r4, #0]
+   0x1fff1a14: cmp     r0, #0
+   0x1fff1a16: bne.n   0x1fff1a54
+   0x1fff1a18: ldr     r0, [pc, #940]  ; (0x1fff1dc8)
+   0x1fff1a1a: ldr     r1, [r0, #0]
+   0x1fff1a1c: movs    r6, #64 ; 0x40
+   0x1fff1a1e: orrs    r1, r6
+   0x1fff1a20: str     r1, [r0, #0]
+   0x1fff1a22: ldr     r1, [r5, #4]
+   0x1fff1a24: ldr     r3, [pc, #940]  ; (0x1fff1dd4)
+   0x1fff1a26: lsls    r2, r1, #2
+   0x1fff1a28: ldr     r1, [pc, #932]  ; (0x1fff1dd0)
+   0x1fff1a2a: ldr     r1, [r1, r2]
+   0x1fff1a2c: ldr     r2, [r5, #8]
+   0x1fff1a2e: ldr     r5, [r0, #0]
+   0x1fff1a30: lsls    r2, r2, #2
+   0x1fff1a32: ldr     r3, [r3, r2]
+   0x1fff1a34: mov     r2, r1
+   0x1fff1a36: bics    r5, r6
+   0x1fff1a38: str     r5, [r0, #0]
+   0x1fff1a3a: lsls    r0, r6, #9
+   0x1fff1a3c: b.n     0x1fff1a58
+   0x1fff1a3e: adds    r5, r2, r0
+   0x1fff1a40: ldr     r5, [r5, #0]
+   0x1fff1a42: adds    r5, r5, #1
+   0x1fff1a44: beq.n   0x1fff1a56
+   0x1fff1a46: movs    r3, #8
+   0x1fff1a48: subs    r1, r2, r1
+   0x1fff1a4a: str     r3, [r4, #0]
+   0x1fff1a4c: adds    r0, r2, r0
+   0x1fff1a4e: str     r1, [r4, #4]
+   0x1fff1a50: ldr     r0, [r0, #0]
+   0x1fff1a52: str     r0, [r4, #8]
+   0x1fff1a54: pop     {r4, r5, r6, pc}
+   0x1fff1a56: adds    r2, r2, #4
+   0x1fff1a58: cmp     r2, r3
+   0x1fff1a5a: bcc.n   0x1fff1a3e
+   0x1fff1a5c: movs    r0, #0
+   0x1fff1a5e: str     r0, [r4, #0]
+   0x1fff1a60: pop     {r4, r5, r6, pc}
+   0x1fff1a62: push    {r4, lr}
+   0x1fff1a64: ldr     r4, [sp, #8]
+   0x1fff1a66: str     r1, [r0, #0]
+   0x1fff1a68: cmp     r2, #0
+   0x1fff1a6a: beq.n   0x1fff1a76
+   0x1fff1a6c: str     r3, [r2, #0]
+   0x1fff1a6e: ldr     r0, [r2, #0]
+   0x1fff1a70: tst     r0, r3
+   0x1fff1a72: bne.n   0x1fff1a6e
+   0x1fff1a74: pop     {r4, pc}
+   0x1fff1a76: ldr     r0, [r4, #0]
+   0x1fff1a78: lsls    r0, r0, #29
+   0x1fff1a7a: beq.n   0x1fff1a76
+   0x1fff1a7c: pop     {r4, pc}
+   0x1fff1a7e: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff1a80: ldr     r7, [pc, #836]  ; (0x1fff1dc8)
+   0x1fff1a82: mov     r4, r0
+   0x1fff1a84: ldr     r0, [r7, #4]
+   0x1fff1a86: mov     r12, r1
+   0x1fff1a88: mov     r6, r2
+   0x1fff1a8a: movs    r5, #0
+   0x1fff1a8c: movs    r1, #5
+   0x1fff1a8e: bics    r1, r0
+   0x1fff1a90: beq.n   0x1fff1ac6
+   0x1fff1a92: movs    r0, #11
+   0x1fff1a94: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1a96: movs    r0, #1
+   0x1fff1a98: lsls    r0, r4
+   0x1fff1a9a: orrs    r5, r0
+   0x1fff1a9c: ldr     r1, [r7, #0]
+   0x1fff1a9e: mov     r0, r7
+   0x1fff1aa0: movs    r3, #64 ; 0x40
+   0x1fff1aa2: orrs    r1, r3
+   0x1fff1aa4: str     r1, [r7, #0]
+   0x1fff1aa6: ldr     r2, [pc, #808]  ; (0x1fff1dd0)
+   0x1fff1aa8: lsls    r1, r4, #2
+   0x1fff1aaa: ldr     r1, [r2, r1]
+   0x1fff1aac: lsls    r2, r3, #9
+   0x1fff1aae: adds    r2, r1, r2
+   0x1fff1ab0: ldr     r1, [r7, #0]
+   0x1fff1ab2: bics    r1, r3
+   0x1fff1ab4: str     r1, [r7, #0]
+   0x1fff1ab6: str     r6, [r2, #0]
+   0x1fff1ab8: movs    r3, #0
+   0x1fff1aba: mov     r2, r3
+   0x1fff1abc: ldr     r1, [pc, #792]  ; (0x1fff1dd8)
+   0x1fff1abe: str     r7, [sp, #0]
+   0x1fff1ac0: bl      0x1fff1a62
+   0x1fff1ac4: adds    r4, r4, #1
+   0x1fff1ac6: cmp     r4, r12
+   0x1fff1ac8: bls.n   0x1fff1a96
+   0x1fff1aca: ldr     r0, [r7, #0]
+   0x1fff1acc: movs    r2, #64 ; 0x40
+   0x1fff1ace: orrs    r0, r2
+   0x1fff1ad0: str     r0, [r7, #0]
+   0x1fff1ad2: ldr     r0, [pc, #776]  ; (0x1fff1ddc)
+   0x1fff1ad4: ldr     r0, [r0, #0]
+   0x1fff1ad6: subs    r0, #63 ; 0x3f
+   0x1fff1ad8: cmp     r6, #0
+   0x1fff1ada: bne.n   0x1fff1ae2
+   0x1fff1adc: ldr     r1, [r0, #60]   ; 0x3c
+   0x1fff1ade: bics    r1, r5
+   0x1fff1ae0: str     r1, [r0, #60]   ; 0x3c
+   0x1fff1ae2: adds    r6, r6, #1
+   0x1fff1ae4: bne.n   0x1fff1aec
+   0x1fff1ae6: ldr     r1, [r0, #60]   ; 0x3c
+   0x1fff1ae8: orrs    r1, r5
+   0x1fff1aea: str     r1, [r0, #60]   ; 0x3c
+   0x1fff1aec: ldr     r0, [r7, #0]
+   0x1fff1aee: bics    r0, r2
+   0x1fff1af0: str     r0, [r7, #0]
+   0x1fff1af2: movs    r0, #0
+   0x1fff1af4: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1af6: push    {r4, lr}
+   0x1fff1af8: movs    r2, #0
+   0x1fff1afa: movs    r4, #1
+   0x1fff1afc: b.n     0x1fff1b06
+   0x1fff1afe: mov     r3, r4
+   0x1fff1b00: lsls    r3, r0
+   0x1fff1b02: orrs    r2, r3
+   0x1fff1b04: adds    r0, r0, #1
+   0x1fff1b06: cmp     r0, r1
+   0x1fff1b08: bls.n   0x1fff1afe
+   0x1fff1b0a: ldr     r0, [pc, #700]  ; (0x1fff1dc8)
+   0x1fff1b0c: ldr     r1, [r0, #0]
+   0x1fff1b0e: movs    r3, #64 ; 0x40
+   0x1fff1b10: orrs    r1, r3
+   0x1fff1b12: str     r1, [r0, #0]
+   0x1fff1b14: ldr     r1, [pc, #708]  ; (0x1fff1ddc)
+   0x1fff1b16: ldr     r1, [r1, #0]
+   0x1fff1b18: subs    r1, #63 ; 0x3f
+   0x1fff1b1a: ldr     r1, [r1, #60]   ; 0x3c
+   0x1fff1b1c: ands    r1, r2
+   0x1fff1b1e: ldr     r2, [r0, #0]
+   0x1fff1b20: bics    r2, r3
+   0x1fff1b22: str     r2, [r0, #0]
+   0x1fff1b24: cmp     r1, #0
+   0x1fff1b26: beq.n   0x1fff1b2c
+   0x1fff1b28: movs    r0, #9
+   0x1fff1b2a: pop     {r4, pc}
+   0x1fff1b2c: movs    r0, #0
+   0x1fff1b2e: pop     {r4, pc}
+   0x1fff1b30: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff1b32: mov     r6, r1
+   0x1fff1b34: mov     r4, r0
+   0x1fff1b36: ldr     r1, [r0, #8]
+   0x1fff1b38: ldr     r0, [r0, #4]
+   0x1fff1b3a: bl      0x1fff19cc
+   0x1fff1b3e: str     r0, [r6, #0]
+   0x1fff1b40: cmp     r0, #0
+   0x1fff1b42: bne.n   0x1fff1c26
+   0x1fff1b44: ldr     r1, [r4, #8]
+   0x1fff1b46: ldr     r0, [r4, #4]
+   0x1fff1b48: bl      0x1fff1af6
+   0x1fff1b4c: str     r0, [r6, #0]
+   0x1fff1b4e: cmp     r0, #0
+   0x1fff1b50: bne.n   0x1fff1c26
+   0x1fff1b52: ldr     r5, [pc, #628]  ; (0x1fff1dc8)
+   0x1fff1b54: ldr     r0, [r5, #0]
+   0x1fff1b56: movs    r1, #64 ; 0x40
+   0x1fff1b58: orrs    r0, r1
+   0x1fff1b5a: str     r0, [r5, #0]
+   0x1fff1b5c: ldr     r1, [pc, #640]  ; (0x1fff1de0)
+   0x1fff1b5e: ldr     r0, [r4, #12]
+   0x1fff1b60: ldr     r1, [r1, #0]
+   0x1fff1b62: bl      0x1fff18a0
+   0x1fff1b66: str     r0, [r5, #28]
+   0x1fff1b68: ldr     r1, [pc, #632]  ; (0x1fff1de4)
+   0x1fff1b6a: ldr     r0, [r4, #12]
+   0x1fff1b6c: ldr     r1, [r1, #0]
+   0x1fff1b6e: muls    r0, r1
+   0x1fff1b70: lsrs    r0, r0, #9
+   0x1fff1b72: adds    r0, r0, #3
+   0x1fff1b74: movs    r1, #1
+   0x1fff1b76: lsls    r1, r1, #15
+   0x1fff1b78: orrs    r0, r1
+   0x1fff1b7a: str     r0, [r5, #8]
+   0x1fff1b7c: ldr     r7, [r4, #4]
+   0x1fff1b7e: ldr     r0, [r4, #8]
+   0x1fff1b80: cmp     r7, r0
+   0x1fff1b82: bne.n   0x1fff1bb4
+   0x1fff1b84: b.n     0x1fff1bbc
+   0x1fff1b86: ldr     r1, [r5, #0]
+   0x1fff1b88: mov     r0, r5
+   0x1fff1b8a: movs    r2, #64 ; 0x40
+   0x1fff1b8c: orrs    r1, r2
+   0x1fff1b8e: str     r1, [r5, #0]
+   0x1fff1b90: ldr     r1, [pc, #572]  ; (0x1fff1dd0)
+   0x1fff1b92: lsls    r3, r7, #2
+   0x1fff1b94: ldr     r3, [r1, r3]
+   0x1fff1b96: lsls    r1, r2, #9
+   0x1fff1b98: adds    r1, r3, r1
+   0x1fff1b9a: ldr     r3, [r5, #0]
+   0x1fff1b9c: bics    r3, r2
+   0x1fff1b9e: str     r3, [r5, #0]
+   0x1fff1ba0: movs    r2, #1
+   0x1fff1ba2: str     r2, [r1, #0]
+   0x1fff1ba4: ldr     r1, [pc, #560]  ; (0x1fff1dd8)
+   0x1fff1ba6: movs    r3, #0
+   0x1fff1ba8: mov     r2, r3
+   0x1fff1baa: subs    r1, r1, #2
+   0x1fff1bac: str     r5, [sp, #0]
+   0x1fff1bae: bl      0x1fff1a62
+   0x1fff1bb2: adds    r7, r7, #1
+   0x1fff1bb4: ldr     r0, [r4, #8]
+   0x1fff1bb6: subs    r0, r0, #1
+   0x1fff1bb8: cmp     r0, r7
+   0x1fff1bba: bcs.n   0x1fff1b86
+   0x1fff1bbc: ldr     r0, [r5, #0]
+   0x1fff1bbe: movs    r1, #64 ; 0x40
+   0x1fff1bc0: orrs    r0, r1
+   0x1fff1bc2: str     r0, [r5, #0]
+   0x1fff1bc4: ldr     r0, [r4, #8]
+   0x1fff1bc6: lsls    r2, r0, #2
+   0x1fff1bc8: ldr     r0, [pc, #516]  ; (0x1fff1dd0)
+   0x1fff1bca: ldr     r2, [r0, r2]
+   0x1fff1bcc: lsls    r0, r1, #9
+   0x1fff1bce: adds    r0, r2, r0
+   0x1fff1bd0: ldr     r2, [r5, #0]
+   0x1fff1bd2: bics    r2, r1
+   0x1fff1bd4: str     r2, [r5, #0]
+   0x1fff1bd6: movs    r1, #1
+   0x1fff1bd8: str     r1, [r0, #0]
+   0x1fff1bda: ldr     r1, [pc, #524]  ; (0x1fff1de8)
+   0x1fff1bdc: movs    r0, #7
+   0x1fff1bde: str     r0, [r1, #40]   ; 0x28
+   0x1fff1be0: ldr     r0, [pc, #520]  ; (0x1fff1dec)
+   0x1fff1be2: ldr     r0, [r0, #32]
+   0x1fff1be4: ldr     r7, [pc, #524]  ; (0x1fff1df4)
+   0x1fff1be6: mov     r12, r0
+   0x1fff1be8: ldr     r0, [pc, #516]  ; (0x1fff1df0)
+   0x1fff1bea: str     r0, [r7, #16]
+   0x1fff1bec: ldr     r1, [pc, #508]  ; (0x1fff1dec)
+   0x1fff1bee: movs    r0, #0
+   0x1fff1bf0: str     r0, [r1, #32]
+   0x1fff1bf2: str     r0, [r7, #16]
+   0x1fff1bf4: ldr     r0, [pc, #496]  ; (0x1fff1de8)
+   0x1fff1bf6: movs    r3, #0
+   0x1fff1bf8: adds    r0, #32
+   0x1fff1bfa: str     r0, [sp, #0]
+   0x1fff1bfc: mov     r2, r3
+   0x1fff1bfe: ldr     r1, [pc, #504]  ; (0x1fff1df8)
+   0x1fff1c00: mov     r0, r5
+   0x1fff1c02: bl      0x1fff1a62
+   0x1fff1c06: ldr     r0, [pc, #488]  ; (0x1fff1df0)
+   0x1fff1c08: str     r0, [r7, #16]
+   0x1fff1c0a: ldr     r1, [pc, #480]  ; (0x1fff1dec)
+   0x1fff1c0c: mov     r0, r12
+   0x1fff1c0e: str     r0, [r1, #32]
+   0x1fff1c10: movs    r0, #0
+   0x1fff1c12: str     r0, [r7, #16]
+   0x1fff1c14: movs    r2, #0
+   0x1fff1c16: mvns    r2, r2
+   0x1fff1c18: ldr     r1, [r4, #8]
+   0x1fff1c1a: ldr     r0, [r4, #4]
+   0x1fff1c1c: bl      0x1fff1a7e
+   0x1fff1c20: str     r0, [r6, #0]
+   0x1fff1c22: movs    r0, #0
+   0x1fff1c24: str     r0, [r5, #28]
+   0x1fff1c26: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1c28: push    {r4, r5, lr}
+   0x1fff1c2a: movs    r5, #1
+   0x1fff1c2c: b.n     0x1fff1c40
+   0x1fff1c2e: ldmia   r1!, {r4}
+   0x1fff1c30: stmia   r0!, {r4}
+   0x1fff1c32: lsls    r4, r5, #30
+   0x1fff1c34: beq.n   0x1fff1c3a
+   0x1fff1c36: b.n     0x1fff1c3e
+   0x1fff1c38: adds    r4, r4, #1
+   0x1fff1c3a: cmp     r4, r2
+   0x1fff1c3c: bcc.n   0x1fff1c38
+   0x1fff1c3e: adds    r5, r5, #1
+   0x1fff1c40: cmp     r5, r3
+   0x1fff1c42: bls.n   0x1fff1c2e
+   0x1fff1c44: pop     {r4, r5, pc}
+   0x1fff1c46: push    {lr}
+   0x1fff1c48: ldr     r2, [pc, #380]  ; (0x1fff1dc8)
+   0x1fff1c4a: ldr     r3, [r2, #4]
+   0x1fff1c4c: movs    r2, #5
+   0x1fff1c4e: bics    r2, r3
+   0x1fff1c50: beq.n   0x1fff1c56
+   0x1fff1c52: movs    r0, #11
+   0x1fff1c54: pop     {pc}
+   0x1fff1c56: movs    r3, #64 ; 0x40
+   0x1fff1c58: movs    r2, #4
+   0x1fff1c5a: bl      0x1fff1c28
+   0x1fff1c5e: movs    r0, #0
+   0x1fff1c60: pop     {pc}
+   0x1fff1c62: push    {r4, r5, r6, r7, lr}
+   0x1fff1c64: sub     sp, #20
+   0x1fff1c66: mov     r7, r0
+   0x1fff1c68: ldr     r0, [r0, #4]
+   0x1fff1c6a: str     r0, [sp, #8]
+   0x1fff1c6c: ldr     r0, [r7, #8]
+   0x1fff1c6e: str     r0, [sp, #4]
+   0x1fff1c70: ldr     r0, [r7, #12]
+   0x1fff1c72: mov     r5, r1
+   0x1fff1c74: movs    r3, #0
+   0x1fff1c76: str     r0, [sp, #12]
+   0x1fff1c78: movs    r2, #101        ; 0x65
+   0x1fff1c7a: add     r1, sp, #12
+   0x1fff1c7c: mov     r0, r3
+   0x1fff1c7e: bl      0x1fff10a6
+   0x1fff1c82: str     r0, [r5, #0]
+   0x1fff1c84: cmp     r0, #0
+   0x1fff1c86: bne.n   0x1fff1d6e
+   0x1fff1c88: movs    r2, #104        ; 0x68
+   0x1fff1c8a: add     r1, sp, #8
+   0x1fff1c8c: ldr     r3, [sp, #12]
+   0x1fff1c8e: bl      0x1fff10a6
+   0x1fff1c92: str     r0, [r5, #0]
+   0x1fff1c94: cmp     r0, #0
+   0x1fff1c96: bne.n   0x1fff1d6e
+   0x1fff1c98: movs    r2, #103        ; 0x67
+   0x1fff1c9a: add     r1, sp, #4
+   0x1fff1c9c: ldr     r3, [sp, #12]
+   0x1fff1c9e: bl      0x1fff10a6
+   0x1fff1ca2: str     r0, [r5, #0]
+   0x1fff1ca4: cmp     r0, #0
+   0x1fff1ca6: bne.n   0x1fff1d6e
+   0x1fff1ca8: str     r0, [sp, #16]
+   0x1fff1caa: movs    r0, #1
+   0x1fff1cac: ldr     r1, [sp, #8]
+   0x1fff1cae: lsls    r0, r0, #15
+   0x1fff1cb0: adds    r0, r1, r0
+   0x1fff1cb2: ldr     r6, [pc, #276]  ; (0x1fff1dc8)
+   0x1fff1cb4: str     r0, [sp, #8]
+   0x1fff1cb6: ldr     r0, [r6, #0]
+   0x1fff1cb8: movs    r1, #64 ; 0x40
+   0x1fff1cba: orrs    r0, r1
+   0x1fff1cbc: str     r0, [r6, #0]
+   0x1fff1cbe: movs    r4, #0
+   0x1fff1cc0: ldr     r0, [pc, #272]  ; (0x1fff1dd4)
+   0x1fff1cc2: ldr     r1, [pc, #264]  ; (0x1fff1dcc)
+   0x1fff1cc4: b.n     0x1fff1cec
+   0x1fff1cc6: lsls    r3, r4, #2
+   0x1fff1cc8: ldr     r3, [r0, r3]
+   0x1fff1cca: ldr     r2, [r7, #4]
+   0x1fff1ccc: cmp     r2, r3
+   0x1fff1cce: bcs.n   0x1fff1cea
+   0x1fff1cd0: mov     r1, r2
+   0x1fff1cd2: ldr     r2, [r7, #12]
+   0x1fff1cd4: adds    r1, r1, r2
+   0x1fff1cd6: lsls    r2, r4, #2
+   0x1fff1cd8: ldr     r0, [r0, r2]
+   0x1fff1cda: adds    r0, r0, #1
+   0x1fff1cdc: cmp     r1, r0
+   0x1fff1cde: bhi.n   0x1fff1ce4
+   0x1fff1ce0: str     r4, [sp, #16]
+   0x1fff1ce2: b.n     0x1fff1cf2
+   0x1fff1ce4: adds    r0, r4, #1
+   0x1fff1ce6: str     r0, [sp, #16]
+   0x1fff1ce8: b.n     0x1fff1cf2
+   0x1fff1cea: adds    r4, r4, #1
+   0x1fff1cec: ldr     r2, [r1, #0]
+   0x1fff1cee: cmp     r4, r2
+   0x1fff1cf0: bls.n   0x1fff1cc6
+   0x1fff1cf2: ldr     r1, [r6, #0]
+   0x1fff1cf4: movs    r0, #64 ; 0x40
+   0x1fff1cf6: bics    r1, r0
+   0x1fff1cf8: str     r1, [r6, #0]
+   0x1fff1cfa: mov     r0, r4
+   0x1fff1cfc: ldr     r1, [sp, #16]
+   0x1fff1cfe: bl      0x1fff1af6
+   0x1fff1d02: str     r0, [r5, #0]
+   0x1fff1d04: cmp     r0, #0
+   0x1fff1d06: bne.n   0x1fff1d6e
+   0x1fff1d08: ldr     r1, [r6, #0]
+   0x1fff1d0a: movs    r0, #64 ; 0x40
+   0x1fff1d0c: orrs    r1, r0
+   0x1fff1d0e: str     r1, [r6, #0]
+   0x1fff1d10: ldr     r1, [pc, #204]  ; (0x1fff1de0)
+   0x1fff1d12: ldr     r0, [r7, #16]
+   0x1fff1d14: ldr     r1, [r1, #0]
+   0x1fff1d16: bl      0x1fff18a0
+   0x1fff1d1a: str     r0, [r6, #28]
+   0x1fff1d1c: ldr     r1, [pc, #220]  ; (0x1fff1dfc)
+   0x1fff1d1e: ldr     r0, [r7, #16]
+   0x1fff1d20: ldr     r1, [r1, #0]
+   0x1fff1d22: muls    r0, r1
+   0x1fff1d24: lsrs    r7, r0, #9
+   0x1fff1d26: adds    r7, r7, #3
+   0x1fff1d28: movs    r0, #1
+   0x1fff1d2a: lsls    r0, r0, #15
+   0x1fff1d2c: ldr     r1, [r6, #0]
+   0x1fff1d2e: orrs    r7, r0
+   0x1fff1d30: movs    r0, #64 ; 0x40
+   0x1fff1d32: bics    r1, r0
+   0x1fff1d34: str     r1, [r6, #0]
+   0x1fff1d36: ldr     r1, [pc, #180]  ; (0x1fff1dec)
+   0x1fff1d38: ldr     r0, [r1, #32]
+   0x1fff1d3a: ldr     r3, [pc, #184]  ; (0x1fff1df4)
+   0x1fff1d3c: ldr     r2, [pc, #176]  ; (0x1fff1df0)
+   0x1fff1d3e: mov     r12, r0
+   0x1fff1d40: str     r2, [r3, #16]
+   0x1fff1d42: movs    r0, #0
+   0x1fff1d44: str     r0, [r1, #32]
+   0x1fff1d46: str     r0, [r3, #16]
+   0x1fff1d48: ldr     r0, [sp, #12]
+   0x1fff1d4a: b.n     0x1fff1da6
+   0x1fff1d4c: movs    r3, #0
+   0x1fff1d4e: mov     r0, r6
+   0x1fff1d50: mov     r2, r3
+   0x1fff1d52: movs    r1, #7
+   0x1fff1d54: str     r6, [sp, #0]
+   0x1fff1d56: bl      0x1fff1a62
+   0x1fff1d5a: ldr     r1, [sp, #4]
+   0x1fff1d5c: ldr     r0, [sp, #8]
+   0x1fff1d5e: bl      0x1fff1c46
+   0x1fff1d62: cmp     r0, #0
+   0x1fff1d64: beq.n   0x1fff1d72
+   0x1fff1d66: movs    r0, #11
+   0x1fff1d68: str     r0, [r5, #0]
+   0x1fff1d6a: movs    r0, #0
+   0x1fff1d6c: str     r0, [r6, #28]
+   0x1fff1d6e: add     sp, #20
+   0x1fff1d70: pop     {r4, r5, r6, r7, pc}
+   0x1fff1d72: ldr     r1, [pc, #116]  ; (0x1fff1de8)
+   0x1fff1d74: movs    r0, #7
+   0x1fff1d76: str     r0, [r1, #40]   ; 0x28
+   0x1fff1d78: mov     r0, r6
+   0x1fff1d7a: str     r7, [r6, #8]
+   0x1fff1d7c: ldr     r1, [pc, #104]  ; (0x1fff1de8)
+   0x1fff1d7e: movs    r3, #0
+   0x1fff1d80: adds    r1, #32
+   0x1fff1d82: str     r1, [sp, #0]
+   0x1fff1d84: ldr     r1, [pc, #112]  ; (0x1fff1df8)
+   0x1fff1d86: mov     r2, r3
+   0x1fff1d88: adds    r1, r1, #2
+   0x1fff1d8a: bl      0x1fff1a62
+   0x1fff1d8e: ldr     r0, [sp, #8]
+   0x1fff1d90: adds    r0, #255        ; 0xff
+   0x1fff1d92: adds    r0, #1
+   0x1fff1d94: str     r0, [sp, #8]
+   0x1fff1d96: ldr     r0, [sp, #4]
+   0x1fff1d98: adds    r0, #255        ; 0xff
+   0x1fff1d9a: adds    r0, #1
+   0x1fff1d9c: str     r0, [sp, #4]
+   0x1fff1d9e: ldr     r0, [sp, #12]
+   0x1fff1da0: subs    r0, #255        ; 0xff
+   0x1fff1da2: subs    r0, #1
+   0x1fff1da4: str     r0, [sp, #12]
+   0x1fff1da6: cmp     r0, #0
+   0x1fff1da8: bne.n   0x1fff1d4c
+   0x1fff1daa: ldr     r0, [pc, #72]   ; (0x1fff1df4)
+   0x1fff1dac: ldr     r1, [pc, #64]   ; (0x1fff1df0)
+   0x1fff1dae: str     r1, [r0, #16]
+   0x1fff1db0: ldr     r2, [pc, #56]   ; (0x1fff1dec)
+   0x1fff1db2: mov     r1, r12
+   0x1fff1db4: str     r1, [r2, #32]
+   0x1fff1db6: movs    r5, #0
+   0x1fff1db8: str     r5, [r0, #16]
+   0x1fff1dba: subs    r2, r5, #1
+   0x1fff1dbc: mov     r0, r4
+   0x1fff1dbe: ldr     r1, [sp, #16]
+   0x1fff1dc0: bl      0x1fff1a7e
+   0x1fff1dc4: str     r5, [r6, #28]
+   0x1fff1dc6: b.n     0x1fff1d6e
+   0x1fff1dc8: stmia   r0!, {}
+   0x1fff1dca: ands    r3, r0
+   0x1fff1dcc: lsls    r0, r0, #17
+   0x1fff1dce: movs    r0, r0
+   0x1fff1dd0: lsls    r0, r2, #18
+   0x1fff1dd2: movs    r0, r0
+   0x1fff1dd4: lsls    r0, r4, #20
+   0x1fff1dd6: movs    r0, r0
+   0x1fff1dd8: strh    r7, [r0, #4]
+   0x1fff1dda: movs    r0, r0
+   0x1fff1ddc: lsls    r4, r7, #16
+   0x1fff1dde: movs    r0, r0
+   0x1fff1de0: lsls    r4, r2, #17
+   0x1fff1de2: movs    r0, r0
+   0x1fff1de4: lsls    r0, r2, #17
+   0x1fff1de6: movs    r0, r0
+   0x1fff1de8: ldmia   r7, {r6, r7}
+   0x1fff1dea: ands    r3, r0
+   0x1fff1dec: strh    r0, [r0, #10]
+   0x1fff1dee: ands    r4, r0
+   0x1fff1df0: ldrsb   r0, [r7, r1]
+   0x1fff1df2: asrs    r4, r6, #8
+   0x1fff1df4: strh    r0, [r0, #30]
+   0x1fff1df6: ands    r4, r0
+   0x1fff1df8: asrs    r1, r0, #2
+   0x1fff1dfa: movs    r0, r0
+   0x1fff1dfc: lsls    r4, r1, #17
+   0x1fff1dfe: movs    r0, r0
+   0x1fff1e00: push    {r4, r5, r6, lr}
+   0x1fff1e02: mov     r6, r1
+   0x1fff1e04: mov     r4, r0
+   0x1fff1e06: ldr     r1, [r0, #8]
+   0x1fff1e08: ldr     r0, [r0, #4]
+   0x1fff1e0a: bl      0x1fff19cc
+   0x1fff1e0e: str     r0, [r6, #0]
+   0x1fff1e10: cmp     r0, #0
+   0x1fff1e12: bne.n   0x1fff1e36
+   0x1fff1e14: ldr     r5, [pc, #32]   ; (0x1fff1e38)
+   0x1fff1e16: ldr     r0, [r5, #28]
+   0x1fff1e18: cmp     r0, #0
+   0x1fff1e1a: bne.n   0x1fff1e20
+   0x1fff1e1c: movs    r0, #64 ; 0x40
+   0x1fff1e1e: str     r0, [r5, #28]
+   0x1fff1e20: movs    r2, #0
+   0x1fff1e22: ldr     r1, [r4, #8]
+   0x1fff1e24: ldr     r0, [r4, #4]
+   0x1fff1e26: bl      0x1fff1a7e
+   0x1fff1e2a: str     r0, [r6, #0]
+   0x1fff1e2c: ldr     r0, [r5, #28]
+   0x1fff1e2e: cmp     r0, #64 ; 0x40
+   0x1fff1e30: bne.n   0x1fff1e36
+   0x1fff1e32: movs    r0, #0
+   0x1fff1e34: str     r0, [r5, #28]
+   0x1fff1e36: pop     {r4, r5, r6, pc}
+   0x1fff1e38: stmia   r0!, {}
+   0x1fff1e3a: ands    r3, r0
+   0x1fff1e3c: push    {r0, r1, r2, r4, r5, r6, r7, lr}
+   0x1fff1e3e: sub     sp, #8
+   0x1fff1e40: ldr     r0, [r1, #4]
+   0x1fff1e42: str     r0, [sp, #0]
+   0x1fff1e44: ldr     r5, [r1, #12]
+   0x1fff1e46: ldr     r7, [r1, #8]
+   0x1fff1e48: mov     r4, r1
+   0x1fff1e4a: mov     r6, r2
+   0x1fff1e4c: mov     r2, r5
+   0x1fff1e4e: mov     r1, r7
+   0x1fff1e50: bl      0x1fff1198
+   0x1fff1e54: str     r0, [r6, #0]
+   0x1fff1e56: cmp     r0, #0
+   0x1fff1e58: bne.n   0x1fff1e74
+   0x1fff1e5a: cmp     r5, #0
+   0x1fff1e5c: beq.n   0x1fff1e74
+   0x1fff1e5e: ldr     r0, [r4, #16]
+   0x1fff1e60: bl      0x1fff1200
+   0x1fff1e64: ldr     r0, [sp, #8]
+   0x1fff1e66: mov     r2, r5
+   0x1fff1e68: cmp     r0, #0
+   0x1fff1e6a: ldr     r0, [sp, #0]
+   0x1fff1e6c: mov     r1, r7
+   0x1fff1e6e: beq.n   0x1fff1e78
+   0x1fff1e70: bl      0x1fff1306
+   0x1fff1e74: add     sp, #20
+   0x1fff1e76: pop     {r4, r5, r6, r7, pc}
+   0x1fff1e78: bl      0x1fff138c
+   0x1fff1e7c: b.n     0x1fff1e74
+   0x1fff1e7e: push    {r4, lr}
+   0x1fff1e80: ldr     r1, [pc, #136]  ; (0x1fff1f0c)
+   0x1fff1e82: movs    r0, #0
+   0x1fff1e84: str     r0, [r1, #0]
+   0x1fff1e86: bl      0x1fff02e4
+   0x1fff1e8a: pop     {r4, pc}
+   0x1fff1e8c: push    {r3, r4, r5, r6, r7, lr}
+   0x1fff1e8e: mov     r5, r1
+   0x1fff1e90: mov     r1, r0
+   0x1fff1e92: mov     r4, r0
+   0x1fff1e94: movs    r3, #0
+   0x1fff1e96: movs    r2, #100        ; 0x64
+   0x1fff1e98: adds    r1, #12
+   0x1fff1e9a: mov     r0, r3
+   0x1fff1e9c: bl      0x1fff10a6
+   0x1fff1ea0: str     r0, [r5, #0]
+   0x1fff1ea2: cmp     r0, #0
+   0x1fff1ea4: bne.n   0x1fff1ef8
+   0x1fff1ea6: movs    r2, #102        ; 0x66
+   0x1fff1ea8: adds    r1, r4, #4
+   0x1fff1eaa: ldr     r3, [r4, #12]
+   0x1fff1eac: bl      0x1fff10a6
+   0x1fff1eb0: str     r0, [r5, #0]
+   0x1fff1eb2: cmp     r0, #0
+   0x1fff1eb4: bne.n   0x1fff1ef8
+   0x1fff1eb6: mov     r1, r4
+   0x1fff1eb8: movs    r2, #102        ; 0x66
+   0x1fff1eba: adds    r1, #8
+   0x1fff1ebc: ldr     r3, [r4, #12]
+   0x1fff1ebe: bl      0x1fff10a6
+   0x1fff1ec2: str     r0, [r5, #0]
+   0x1fff1ec4: cmp     r0, #0
+   0x1fff1ec6: bne.n   0x1fff1ef8
+   0x1fff1ec8: movs    r3, #1
+   0x1fff1eca: ldr     r2, [r4, #4]
+   0x1fff1ecc: lsls    r3, r3, #15
+   0x1fff1ece: cmp     r2, r3
+   0x1fff1ed0: bcs.n   0x1fff1ed4
+   0x1fff1ed2: adds    r2, r2, r3
+   0x1fff1ed4: ldr     r0, [r4, #8]
+   0x1fff1ed6: cmp     r0, r3
+   0x1fff1ed8: bcs.n   0x1fff1edc
+   0x1fff1eda: adds    r0, r0, r3
+   0x1fff1edc: ldr     r1, [r4, #12]
+   0x1fff1ede: b.n     0x1fff1f00
+   0x1fff1ee0: ldr     r6, [r0, #0]
+   0x1fff1ee2: ldr     r7, [r2, #0]
+   0x1fff1ee4: cmp     r6, r7
+   0x1fff1ee6: beq.n   0x1fff1efa
+   0x1fff1ee8: movs    r0, #10
+   0x1fff1eea: str     r0, [r5, #0]
+   0x1fff1eec: ldr     r0, [r4, #4]
+   0x1fff1eee: cmp     r0, r3
+   0x1fff1ef0: bcs.n   0x1fff1ef4
+   0x1fff1ef2: subs    r2, r2, r3
+   0x1fff1ef4: subs    r0, r2, r0
+   0x1fff1ef6: str     r0, [r5, #4]
+   0x1fff1ef8: pop     {r3, r4, r5, r6, r7, pc}
+   0x1fff1efa: adds    r0, r0, #4
+   0x1fff1efc: adds    r2, r2, #4
+   0x1fff1efe: subs    r1, r1, #4
+   0x1fff1f00: cmp     r1, #0
+   0x1fff1f02: bne.n   0x1fff1ee0
+   0x1fff1f04: movs    r0, #0
+   0x1fff1f06: str     r0, [r5, #0]
+   0x1fff1f08: pop     {r3, r4, r5, r6, r7, pc}
+
+0x1fff1f00:    0xd1ed2900      0x60282000      0x0000bdf8      0x40048000
+0x1fff1f10:    0x636e7953      0x6e6f7268      0x64657a69      0xffffff00
+0x1fff1f20:    0x00005a5a      0x74004b4f      0x00547345      0x45534552
+0x1fff1f30:    0xff00444e      0x1fff13dd      0x1fff161d      0x1fff1601
+0x1fff1f40:    0x1fff1617      0x1fff173d      0x1fff1743      0x1fff171d
+0x1fff1f50:    0x1fff172d      0xffffffff      0xffffffff      0xffffffff
+0x1fff1f60:    0x1fff1f34      0x1fff1f44      0xffffffff      0xffffffff
+0x1fff1f70:    0xffffffff      0x00002000
+
+   0x1fff1f0a: movs    r0, r0
+   0x1fff1f0c: strh    r0, [r0, #0]
+   0x1fff1f0e: ands    r4, r0
+   0x1fff1f10: ldrb    r3, [r2, #5]
+   0x1fff1f12: str     r6, [r5, #52]   ; 0x34
+   0x1fff1f14: strb    r0, [r5, #9]
+   0x1fff1f16: ldr     r7, [r5, #100]  ; 0x64
+   0x1fff1f18: ldrb    r1, [r5, #9]
+   0x1fff1f1a: str     r5, [r4, #68]   ; 0x44
+   0x1fff1f1c: vmaxnm.f32      <illegal reg q7.5>, q8, <illegal reg q15.5>
+   0x1fff1f20: ldrh    r2, [r3, r1]
+   0x1fff1f22: movs    r0, r0
+   0x1fff1f24: ldr     r3, [pc, #316]  ; (0x1fff2064)
+   0x1fff1f26: strb    r0, [r0, #16]
+   0x1fff1f28: strb    r5, [r0, #13]
+   0x1fff1f2a: lsls    r4, r2, #1
+   0x1fff1f2c: cmp     r2, r10
+   0x1fff1f2e: cmp     r3, r10
+   0x1fff1f30: add     r6, r9
+   0x1fff1f32: vcge.u8 <illegal reg q0.5>, q8, <illegal reg q6.5>
+   0x1fff1f36: subs    r7, r7, #7
+   0x1fff1f38: asrs    r5, r3, #24
+   0x1fff1f3a: subs    r7, r7, #7
+   0x1fff1f3c: asrs    r1, r0, #24
+   0x1fff1f3e: subs    r7, r7, #7
+   0x1fff1f40: asrs    r7, r2, #24
+   0x1fff1f42: subs    r7, r7, #7
+   0x1fff1f44: asrs    r5, r7, #28
+   0x1fff1f46: subs    r7, r7, #7
+   0x1fff1f48: asrs    r3, r0, #29
+   0x1fff1f4a: subs    r7, r7, #7
+   0x1fff1f4c: asrs    r5, r3, #28
+   0x1fff1f4e: subs    r7, r7, #7
+   0x1fff1f50: asrs    r5, r5, #28
+   0x1fff1f52: subs    r7, r7, #7
+   0x1fff1f54:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f58:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f5c:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f60: subs    r4, r6, #4
+   0x1fff1f62: subs    r7, r7, #7
+   0x1fff1f64: subs    r4, r0, #5
+   0x1fff1f66: subs    r7, r7, #7
+   0x1fff1f68:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f6c:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f70:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f74: movs    r0, #0
+   0x1fff1f76: movs    r0, r0
+   0x1fff1f78: movs    r0, #16
+   0x1fff1f7a: movs    r0, r2
+   0x1fff1f7c: movs    r0, r2
+   0x1fff1f7e: movs    r0, r2
+   0x1fff1f80: movs    r0, r0
+   0x1fff1f82: movs    r0, r0
+   0x1fff1f84: movs    r0, r0
+   0x1fff1f86: movs    r0, r0
+   0x1fff1f88: strh    r0, [r0, #0]
+   0x1fff1f8a: stmia   r0!, {}
+   0x1fff1f8c:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f90:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f94:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f98:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1f9c:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fa0:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fa4:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fa8:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fac:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fb0:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fb4:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fb8:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fbc:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fc0:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fc4:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fc8:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fcc:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fd0:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fd4:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fd8:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fdc:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fe0:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fe4:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fe8:                 ; <UNDEFINED> instruction: 0xffffffff
+   0x1fff1fec:                 ; <UNDEFINED> instruction: 0xffffffff
+
+0x1fff1ff0:    0xf7ffb510      0xbd10fc6b      0x1fff1f54      0xffffffff
+
+   0x1fff1ff0: push    {r4, lr}
+   0x1fff1ff2: bl      0x1fff18cc
+   0x1fff1ff6: pop     {r4, pc}
+   0x1fff1ff8: subs    r4, r2, #5
+   0x1fff1ffa: subs    r7, r7, #7
+   0x1fff1ffc:                 ; <UNDEFINED> instruction: 0xffffffff
diff --git a/datasheets/nxp/lpc11u1x/cortex_m0_r0p0_trm.pdf b/datasheets/nxp/lpc11u1x/cortex_m0_r0p0_trm.pdf
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diff --git a/datasheets/nxp/lpc11u1x/lpc11u1x-datasheet.pdf b/datasheets/nxp/lpc11u1x/lpc11u1x-datasheet.pdf
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diff --git a/datasheets/nxp/lpc11u1x/lpc11u1x-user-manual.pdf b/datasheets/nxp/lpc11u1x/lpc11u1x-user-manual.pdf
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