return error;
}
+#define IS_STM32L(sl) ((sl)->chip_id == STM32_CHIPID_L1_MEDIUM || (sl)->chip_id == STM32_CHIPID_L1_HIGH)
+
int stlink_fread(stlink_t* sl, const char* path, stm32_addr_t addr, size_t size) {
/* read size bytes from addr to file */
int error = -1;
size_t off;
int num_empty = 0;
- unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM)?0:0xff;
+ unsigned char erased_pattern =(IS_STM32L(sl))?0:0xff;
const int fd = open(path, O_RDWR | O_TRUNC | O_CREAT, 00700);
if (fd == -1) {
fprintf(stdout, "Erase Final CR:0x%x\n", read_flash_cr(sl));
#endif
}
- else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM)
+ else if (IS_STM32L(sl))
{
uint32_t val;
}
int stlink_erase_flash_mass(stlink_t *sl) {
- if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) {
+ if (IS_STM32L(sl)) {
/* erase each page */
int i = 0, num_pages = sl->flash_size/sl->flash_pgsz;
for (i = 0; i < num_pages; i++) {
const uint8_t* loader_code;
size_t loader_size;
- if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) /* stm32l */
+ if (IS_STM32L(sl)) /* stm32l */
{
loader_code = loader_code_stm32l;
loader_size = sizeof(loader_code_stm32l);
} //STM32F4END
- else if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) {
+ else if (IS_STM32L(sl)) {
/* use fast word write. todo: half page. */
uint32_t val;
/* write the file in flash at addr */
int err;
unsigned int num_empty = 0, index;
- unsigned char erased_pattern =(sl->chip_id == STM32_CHIPID_L1_MEDIUM)?0:0xff;
+ unsigned char erased_pattern = (IS_STM32L(sl))?0:0xff;
mapped_file_t mf = MAPPED_FILE_INITIALIZER;
if (map_file(&mf, path) == -1) {
WLOG("map_file() == -1\n");
return -1;
}
- if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) {
+ if (IS_STM32L(sl)) {
size_t count = size / sizeof(uint32_t);
if (size % sizeof(uint32_t)) ++count;
}
/* check written byte count */
- if (sl->chip_id == STM32_CHIPID_L1_MEDIUM) {
+ if (IS_STM32L(sl)) {
size_t count = size / sizeof(uint32_t);
if (size % sizeof(uint32_t)) ++count;
#define STM32_CHIPID_F4 0x413
#define STM32_CHIPID_F1_HIGH 0x414
#define STM32_CHIPID_L1_MEDIUM 0x416
+#define STM32_CHIPID_L1_HIGH 0x436
#define STM32_CHIPID_F1_CONN 0x418
#define STM32_CHIPID_F1_VL_MEDIUM 0x420
#define STM32_CHIPID_F1_VL_HIGH 0x428
.sram_size = 0x18000,
.bootrom_base = 0x1fffe000,
.bootrom_size = 0x1800
- }
+ },
+ {
+ // This ignores the EEPROM! (and uses the page erase size,
+ // not the sector write protection...)
+ .chip_id = 0x436,
+ .description = "L1 High-density device",
+ .flash_size_reg = 0x1ff8004c,
+ .flash_pagesize = 0x100,
+ .sram_size = 0xc000,
+ .bootrom_base = 0x1ff00000,
+ .bootrom_size = 0x1000
+ },
};