Read chip and core id in device param loading.

Instead of expecting everyone to read it every time they need to check it.
Just assume it's always there.

diff --git a/src/stlink-common.c b/src/stlink-common.c
index 89c2630461ec982bd175c507592259dcf71cd23a..3391f4ff6e0cf8f07979c6628bdb2acfb0aee2b9 100644 (file)
--- a/src/stlink-common.c
+++ b/src/stlink-common.c
@@ -314,6 +314,7 @@ int stlink_load_device_params(stlink_t *sl) {
     ILOG("Loading device parameters....\n");
     chip_params_t *params = NULL;
     uint32_t chip_id = stlink_chip_id(sl);
+    sl->chip_id = chip_id;
        for(size_t i = 0; i < sizeof(devices) / sizeof(devices[0]); i++) {
                if(devices[i].chip_id == (chip_id & 0xFFF)) {
                        params = &devices[i];
@@ -342,6 +343,8 @@ int stlink_load_device_params(stlink_t *sl) {
     sl->sys_base = params->bootrom_base;
     sl->sys_size = params->bootrom_size;
     
+    sl->core_id = stlink_core_id(sl);
+    
     ILOG("Device connected is: %s\n", params->description);
     ILOG("SRAM size: %#x bytes (%d KiB), Flash: %#x bytes (%d KiB) in pages of %zd bytes\n",
         sl->sram_size, sl->sram_size / 1024, sl->flash_size, sl->flash_size / 1024, 
@@ -742,7 +745,6 @@ int stlink_erase_flash_page(stlink_t *sl, stm32_addr_t page)
 {
   /* page an addr in the page to erase */
 
-  stlink_core_id(sl);
   if (sl->core_id == STM32L_CORE_ID)
   {
 #define STM32L_FLASH_REGS_ADDR ((uint32_t)0x40023c00)
@@ -1020,7 +1022,6 @@ int stlink_write_flash(stlink_t *sl, stm32_addr_t addr, uint8_t* base, unsigned
         }
     }
 
-    stlink_core_id(sl);
     if (sl->core_id == STM32L_CORE_ID)
     {
       /* use fast word write. todo: half page. */

diff --git a/src/stlink-common.h b/src/stlink-common.h
index 5534b6f32619890d1655bf386a114e0e15c55091..9279c37f5e1dd2ded6672d2b8748eab54e53b6be 100644 (file)
--- a/src/stlink-common.h
+++ b/src/stlink-common.h
@@ -283,6 +283,7 @@ extern "C" {
         // transport layer verboseness: 0 for no debug info, 10 for lots
         int verbose;
         uint32_t core_id;
+        uint32_t chip_id;
         int core_stat;
 
 #define STM32_FLASH_PGSZ 1024