1 /**************************************************************************//**
3 * @brief CMSIS Cortex-M Core Instruction Access Header File
8 * Copyright (C) 2009-2011 ARM Limited. All rights reserved.
11 * ARM Limited (ARM) is supplying this software for use with Cortex-M
12 * processor based microcontrollers. This file can be freely distributed
13 * within development tools that are supporting such ARM based processors.
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
20 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 ******************************************************************************/
24 #ifndef __CORE_CMINSTR_H
25 #define __CORE_CMINSTR_H
28 /* ########################## Core Instruction Access ######################### */
29 /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
30 Access to dedicated instructions
34 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
35 /* ARM armcc specific functions */
37 #if (__ARMCC_VERSION < 400677)
38 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
42 /** \brief No Operation
44 No Operation does nothing. This instruction can be used for code alignment purposes.
49 /** \brief Wait For Interrupt
51 Wait For Interrupt is a hint instruction that suspends execution
52 until one of a number of events occurs.
57 /** \brief Wait For Event
59 Wait For Event is a hint instruction that permits the processor to enter
60 a low-power state until one of a number of events occurs.
67 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
72 /** \brief Instruction Synchronization Barrier
74 Instruction Synchronization Barrier flushes the pipeline in the processor,
75 so that all instructions following the ISB are fetched from cache or
76 memory, after the instruction has been completed.
78 #define __ISB() __isb(0xF)
81 /** \brief Data Synchronization Barrier
83 This function acts as a special kind of Data Memory Barrier.
84 It completes when all explicit memory accesses before this instruction complete.
86 #define __DSB() __dsb(0xF)
89 /** \brief Data Memory Barrier
91 This function ensures the apparent order of the explicit memory operations before
92 and after the instruction, without ensuring their completion.
94 #define __DMB() __dmb(0xF)
97 /** \brief Reverse byte order (32 bit)
99 This function reverses the byte order in integer value.
101 \param [in] value Value to reverse
102 \return Reversed value
107 /** \brief Reverse byte order (16 bit)
109 This function reverses the byte order in two unsigned short values.
111 \param [in] value Value to reverse
112 \return Reversed value
114 static __INLINE __ASM uint32_t __REV16(uint32_t value)
121 /** \brief Reverse byte order in signed short value
123 This function reverses the byte order in a signed short value with sign extension to integer.
125 \param [in] value Value to reverse
126 \return Reversed value
128 static __INLINE __ASM int32_t __REVSH(int32_t value)
135 #if (__CORTEX_M >= 0x03)
137 /** \brief Reverse bit order of value
139 This function reverses the bit order of the given value.
141 \param [in] value Value to reverse
142 \return Reversed value
144 #define __RBIT __rbit
147 /** \brief LDR Exclusive (8 bit)
149 This function performs a exclusive LDR command for 8 bit value.
151 \param [in] ptr Pointer to data
152 \return value of type uint8_t at (*ptr)
154 #define __LDREXB(ptr) ((uint8_t ) __ldrex(ptr))
157 /** \brief LDR Exclusive (16 bit)
159 This function performs a exclusive LDR command for 16 bit values.
161 \param [in] ptr Pointer to data
162 \return value of type uint16_t at (*ptr)
164 #define __LDREXH(ptr) ((uint16_t) __ldrex(ptr))
167 /** \brief LDR Exclusive (32 bit)
169 This function performs a exclusive LDR command for 32 bit values.
171 \param [in] ptr Pointer to data
172 \return value of type uint32_t at (*ptr)
174 #define __LDREXW(ptr) ((uint32_t ) __ldrex(ptr))
177 /** \brief STR Exclusive (8 bit)
179 This function performs a exclusive STR command for 8 bit values.
181 \param [in] value Value to store
182 \param [in] ptr Pointer to location
183 \return 0 Function succeeded
184 \return 1 Function failed
186 #define __STREXB(value, ptr) __strex(value, ptr)
189 /** \brief STR Exclusive (16 bit)
191 This function performs a exclusive STR command for 16 bit values.
193 \param [in] value Value to store
194 \param [in] ptr Pointer to location
195 \return 0 Function succeeded
196 \return 1 Function failed
198 #define __STREXH(value, ptr) __strex(value, ptr)
201 /** \brief STR Exclusive (32 bit)
203 This function performs a exclusive STR command for 32 bit values.
205 \param [in] value Value to store
206 \param [in] ptr Pointer to location
207 \return 0 Function succeeded
208 \return 1 Function failed
210 #define __STREXW(value, ptr) __strex(value, ptr)
213 /** \brief Remove the exclusive lock
215 This function removes the exclusive lock which is created by LDREX.
218 #define __CLREX __clrex
221 /** \brief Signed Saturate
223 This function saturates a signed value.
225 \param [in] value Value to be saturated
226 \param [in] sat Bit position to saturate to (1..32)
227 \return Saturated value
229 #define __SSAT __ssat
232 /** \brief Unsigned Saturate
234 This function saturates an unsigned value.
236 \param [in] value Value to be saturated
237 \param [in] sat Bit position to saturate to (0..31)
238 \return Saturated value
240 #define __USAT __usat
243 /** \brief Count leading zeros
245 This function counts the number of leading zeros of a data value.
247 \param [in] value Value to count the leading zeros
248 \return number of leading zeros in value
252 #endif /* (__CORTEX_M >= 0x03) */
256 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
257 /* IAR iccarm specific functions */
259 #include <cmsis_iar.h>
262 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
263 /* GNU gcc specific functions */
265 /** \brief No Operation
267 No Operation does nothing. This instruction can be used for code alignment purposes.
269 __attribute__( ( always_inline ) ) static __INLINE void __NOP(void)
271 __ASM volatile ("nop");
275 /** \brief Wait For Interrupt
277 Wait For Interrupt is a hint instruction that suspends execution
278 until one of a number of events occurs.
280 __attribute__( ( always_inline ) ) static __INLINE void __WFI(void)
282 __ASM volatile ("wfi");
286 /** \brief Wait For Event
288 Wait For Event is a hint instruction that permits the processor to enter
289 a low-power state until one of a number of events occurs.
291 __attribute__( ( always_inline ) ) static __INLINE void __WFE(void)
293 __ASM volatile ("wfe");
297 /** \brief Send Event
299 Send Event is a hint instruction. It causes an event to be signaled to the CPU.
301 __attribute__( ( always_inline ) ) static __INLINE void __SEV(void)
303 __ASM volatile ("sev");
307 /** \brief Instruction Synchronization Barrier
309 Instruction Synchronization Barrier flushes the pipeline in the processor,
310 so that all instructions following the ISB are fetched from cache or
311 memory, after the instruction has been completed.
313 __attribute__( ( always_inline ) ) static __INLINE void __ISB(void)
315 __ASM volatile ("isb");
319 /** \brief Data Synchronization Barrier
321 This function acts as a special kind of Data Memory Barrier.
322 It completes when all explicit memory accesses before this instruction complete.
324 __attribute__( ( always_inline ) ) static __INLINE void __DSB(void)
326 __ASM volatile ("dsb");
330 /** \brief Data Memory Barrier
332 This function ensures the apparent order of the explicit memory operations before
333 and after the instruction, without ensuring their completion.
335 __attribute__( ( always_inline ) ) static __INLINE void __DMB(void)
337 __ASM volatile ("dmb");
341 /** \brief Reverse byte order (32 bit)
343 This function reverses the byte order in integer value.
345 \param [in] value Value to reverse
346 \return Reversed value
348 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV(uint32_t value)
352 __ASM volatile ("rev %0, %1" : "=r" (result) : "r" (value) );
357 /** \brief Reverse byte order (16 bit)
359 This function reverses the byte order in two unsigned short values.
361 \param [in] value Value to reverse
362 \return Reversed value
364 __attribute__( ( always_inline ) ) static __INLINE uint32_t __REV16(uint32_t value)
368 __ASM volatile ("rev16 %0, %1" : "=r" (result) : "r" (value) );
373 /** \brief Reverse byte order in signed short value
375 This function reverses the byte order in a signed short value with sign extension to integer.
377 \param [in] value Value to reverse
378 \return Reversed value
380 __attribute__( ( always_inline ) ) static __INLINE int32_t __REVSH(int32_t value)
384 __ASM volatile ("revsh %0, %1" : "=r" (result) : "r" (value) );
389 #if (__CORTEX_M >= 0x03)
391 /** \brief Reverse bit order of value
393 This function reverses the bit order of the given value.
395 \param [in] value Value to reverse
396 \return Reversed value
398 __attribute__( ( always_inline ) ) static __INLINE uint32_t __RBIT(uint32_t value)
402 __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
407 /** \brief LDR Exclusive (8 bit)
409 This function performs a exclusive LDR command for 8 bit value.
411 \param [in] ptr Pointer to data
412 \return value of type uint8_t at (*ptr)
414 __attribute__( ( always_inline ) ) static __INLINE uint8_t __LDREXB(volatile uint8_t *addr)
418 __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) );
423 /** \brief LDR Exclusive (16 bit)
425 This function performs a exclusive LDR command for 16 bit values.
427 \param [in] ptr Pointer to data
428 \return value of type uint16_t at (*ptr)
430 __attribute__( ( always_inline ) ) static __INLINE uint16_t __LDREXH(volatile uint16_t *addr)
434 __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) );
439 /** \brief LDR Exclusive (32 bit)
441 This function performs a exclusive LDR command for 32 bit values.
443 \param [in] ptr Pointer to data
444 \return value of type uint32_t at (*ptr)
446 __attribute__( ( always_inline ) ) static __INLINE uint32_t __LDREXW(volatile uint32_t *addr)
450 __ASM volatile ("ldrex %0, [%1]" : "=r" (result) : "r" (addr) );
455 /** \brief STR Exclusive (8 bit)
457 This function performs a exclusive STR command for 8 bit values.
459 \param [in] value Value to store
460 \param [in] ptr Pointer to location
461 \return 0 Function succeeded
462 \return 1 Function failed
464 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
468 __ASM volatile ("strexb %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
473 /** \brief STR Exclusive (16 bit)
475 This function performs a exclusive STR command for 16 bit values.
477 \param [in] value Value to store
478 \param [in] ptr Pointer to location
479 \return 0 Function succeeded
480 \return 1 Function failed
482 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
486 __ASM volatile ("strexh %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
491 /** \brief STR Exclusive (32 bit)
493 This function performs a exclusive STR command for 32 bit values.
495 \param [in] value Value to store
496 \param [in] ptr Pointer to location
497 \return 0 Function succeeded
498 \return 1 Function failed
500 __attribute__( ( always_inline ) ) static __INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
504 __ASM volatile ("strex %0, %2, [%1]" : "=r" (result) : "r" (addr), "r" (value) );
509 /** \brief Remove the exclusive lock
511 This function removes the exclusive lock which is created by LDREX.
514 __attribute__( ( always_inline ) ) static __INLINE void __CLREX(void)
516 __ASM volatile ("clrex");
520 /** \brief Signed Saturate
522 This function saturates a signed value.
524 \param [in] value Value to be saturated
525 \param [in] sat Bit position to saturate to (1..32)
526 \return Saturated value
528 #define __SSAT(ARG1,ARG2) \
530 uint32_t __RES, __ARG1 = (ARG1); \
531 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
536 /** \brief Unsigned Saturate
538 This function saturates an unsigned value.
540 \param [in] value Value to be saturated
541 \param [in] sat Bit position to saturate to (0..31)
542 \return Saturated value
544 #define __USAT(ARG1,ARG2) \
546 uint32_t __RES, __ARG1 = (ARG1); \
547 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
552 /** \brief Count leading zeros
554 This function counts the number of leading zeros of a data value.
556 \param [in] value Value to count the leading zeros
557 \return number of leading zeros in value
559 __attribute__( ( always_inline ) ) static __INLINE uint8_t __CLZ(uint32_t value)
563 __ASM volatile ("clz %0, %1" : "=r" (result) : "r" (value) );
567 #endif /* (__CORTEX_M >= 0x03) */
572 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
573 /* TASKING carm specific functions */
576 * The CMSIS functions have been implemented as intrinsics in the compiler.
577 * Please use "carm -?i" to get an up to date list of all intrinsics,
578 * Including the CMSIS ones.
583 /*@}*/ /* end of group CMSIS_Core_InstructionInterface */
585 #endif /* __CORE_CMINSTR_H */