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  50 <h1>arm_biquad_cascade_df1_32x64_init_q31.c</h1>  </div>
  51 </div>
  52 <div class="contents">
  53 <a href="arm__biquad__cascade__df1__32x64__init__q31_8c.html">Go to the documentation of this file.</a><div class="fragment"><pre class="fragment"><a name="l00001"></a>00001 <span class="comment">/* ----------------------------------------------------------------------   </span>
  54 <a name="l00002"></a>00002 <span class="comment">* Copyright (C) 2010 ARM Limited. All rights reserved.   </span>
  55 <a name="l00003"></a>00003 <span class="comment">*   </span>
  56 <a name="l00004"></a>00004 <span class="comment">* $Date:        15. July 2011  </span>
  57 <a name="l00005"></a>00005 <span class="comment">* $Revision:    V1.0.10  </span>
  58 <a name="l00006"></a>00006 <span class="comment">*   </span>
  59 <a name="l00007"></a>00007 <span class="comment">* Project:      CMSIS DSP Library   </span>
  60 <a name="l00008"></a>00008 <span class="comment">* Title:        arm_biquad_cascade_df1_32x64_init_q31.c   </span>
  61 <a name="l00009"></a>00009 <span class="comment">*   </span>
  62 <a name="l00010"></a>00010 <span class="comment">* Description:  High precision Q31 Biquad cascade filter initialization function.   </span>
  63 <a name="l00011"></a>00011 <span class="comment">*   </span>
  64 <a name="l00012"></a>00012 <span class="comment">* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0</span>
  65 <a name="l00013"></a>00013 <span class="comment">*  </span>
  66 <a name="l00014"></a>00014 <span class="comment">* Version 1.0.10 2011/7/15 </span>
  67 <a name="l00015"></a>00015 <span class="comment">*    Big Endian support added and Merged M0 and M3/M4 Source code.  </span>
  68 <a name="l00016"></a>00016 <span class="comment">*   </span>
  69 <a name="l00017"></a>00017 <span class="comment">* Version 1.0.3 2010/11/29  </span>
  70 <a name="l00018"></a>00018 <span class="comment">*    Re-organized the CMSIS folders and updated documentation.   </span>
  71 <a name="l00019"></a>00019 <span class="comment">*    </span>
  72 <a name="l00020"></a>00020 <span class="comment">* Version 1.0.2 2010/11/11   </span>
  73 <a name="l00021"></a>00021 <span class="comment">*    Documentation updated.    </span>
  74 <a name="l00022"></a>00022 <span class="comment">*   </span>
  75 <a name="l00023"></a>00023 <span class="comment">* Version 1.0.1 2010/10/05    </span>
  76 <a name="l00024"></a>00024 <span class="comment">*    Production release and review comments incorporated.   </span>
  77 <a name="l00025"></a>00025 <span class="comment">*   </span>
  78 <a name="l00026"></a>00026 <span class="comment">* Version 1.0.0 2010/09/20    </span>
  79 <a name="l00027"></a>00027 <span class="comment">*    Production release and review comments incorporated.   </span>
  80 <a name="l00028"></a>00028 <span class="comment">*   </span>
  81 <a name="l00029"></a>00029 <span class="comment">* Version 0.0.7  2010/06/10    </span>
  82 <a name="l00030"></a>00030 <span class="comment">*    Misra-C changes done   </span>
  83 <a name="l00031"></a>00031 <span class="comment">* -------------------------------------------------------------------- */</span>
  84 <a name="l00032"></a>00032
  85 <a name="l00033"></a>00033 <span class="preprocessor">#include &quot;<a class="code" href="arm__math_8h.html">arm_math.h</a>&quot;</span>
  86 <a name="l00034"></a>00034
  87 <a name="l00077"></a><a class="code" href="group___biquad_cascade_d_f1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb">00077</a> <span class="keywordtype">void</span> <a class="code" href="group___biquad_cascade_d_f1__32x64.html#ga44900cecb8083afcaabf905ffcd656bb">arm_biquad_cas_df1_32x64_init_q31</a>(
  88 <a name="l00078"></a>00078   <a class="code" href="structarm__biquad__cas__df1__32x64__ins__q31.html" title="Instance structure for the high precision Q31 Biquad cascade filter.">arm_biquad_cas_df1_32x64_ins_q31</a> * S,
  89 <a name="l00079"></a>00079   uint8_t numStages,
  90 <a name="l00080"></a>00080   <a class="code" href="arm__math_8h.html#adc89a3547f5324b7b3b95adec3806bc0" title="32-bit fractional data type in 1.31 format.">q31_t</a> * pCoeffs,
  91 <a name="l00081"></a>00081   <a class="code" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6" title="64-bit fractional data type in 1.63 format.">q63_t</a> * pState,
  92 <a name="l00082"></a>00082   uint8_t postShift)
  93 <a name="l00083"></a>00083 {
  94 <a name="l00084"></a>00084   <span class="comment">/* Assign filter stages */</span>
  95 <a name="l00085"></a>00085   S-&gt;<a class="code" href="structarm__biquad__cas__df1__32x64__ins__q31.html#ad7cb9a9f5df8f4fcfc7a0b633672e574">numStages</a> = numStages;
  96 <a name="l00086"></a>00086
  97 <a name="l00087"></a>00087   <span class="comment">/* Assign postShift to be applied to the output */</span>
  98 <a name="l00088"></a>00088   S-&gt;<a class="code" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a8e9d58e8dba5aa3b2fc4f36d2ed07996">postShift</a> = postShift;
  99 <a name="l00089"></a>00089
 100 <a name="l00090"></a>00090   <span class="comment">/* Assign coefficient pointer */</span>
 101 <a name="l00091"></a>00091   S-&gt;<a class="code" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a490462d6ebe0fecfb6acbf51bed22ecf">pCoeffs</a> = pCoeffs;
 102 <a name="l00092"></a>00092
 103 <a name="l00093"></a>00093   <span class="comment">/* Clear state buffer and size is always 4 * numStages */</span>
 104 <a name="l00094"></a>00094   memset(pState, 0, (4u * (uint32_t) numStages) * <span class="keyword">sizeof</span>(<a class="code" href="arm__math_8h.html#a5aea1cb12fc02d9d44c8abf217eaa5c6" title="64-bit fractional data type in 1.63 format.">q63_t</a>));
 105 <a name="l00095"></a>00095
 106 <a name="l00096"></a>00096   <span class="comment">/* Assign state pointer */</span>
 107 <a name="l00097"></a>00097   S-&gt;<a class="code" href="structarm__biquad__cas__df1__32x64__ins__q31.html#a4c899cdfaf2bb955323e93637bd662e0">pState</a> = pState;
 108 <a name="l00098"></a>00098 }
 109 <a name="l00099"></a>00099
 110 </pre></div></div>
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