2 ******************************************************************************
3 * @file stm32f4xx_spi.c
4 * @author MCD Application Team
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the Serial peripheral interface (SPI):
9 * - Initialization and Configuration
10 * - Data transfers functions
11 * - Hardware CRC Calculation
12 * - DMA transfers management
13 * - Interrupts and flags management
18 * ===================================================================
19 * How to use this driver
20 * ===================================================================
22 * 1. Enable peripheral clock using the following functions
23 * RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE) for SPI1
24 * RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI2, ENABLE) for SPI2
25 * RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE) for SPI3.
27 * 2. Enable SCK, MOSI, MISO and NSS GPIO clocks using RCC_AHB1PeriphClockCmd()
29 * In I2S mode, if an external clock source is used then the I2S CKIN pin GPIO
30 * clock should also be enabled.
32 * 3. Peripherals alternate function:
33 * - Connect the pin to the desired peripherals' Alternate
34 * Function (AF) using GPIO_PinAFConfig() function
35 * - Configure the desired pin in alternate function by:
36 * GPIO_InitStruct->GPIO_Mode = GPIO_Mode_AF
37 * - Select the type, pull-up/pull-down and output speed via
38 * GPIO_PuPd, GPIO_OType and GPIO_Speed members
39 * - Call GPIO_Init() function
40 * In I2S mode, if an external clock source is used then the I2S CKIN pin
41 * should be also configured in Alternate function Push-pull pull-up mode.
43 * 4. Program the Polarity, Phase, First Data, Baud Rate Prescaler, Slave
44 * Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
46 * In I2S mode, program the Mode, Standard, Data Format, MCLK Output, Audio
47 * frequency and Polarity using I2S_Init() function.
48 * For I2S mode, make sure that either:
49 * - I2S PLL is configured using the functions RCC_I2SCLKConfig(RCC_I2S2CLKSource_PLLI2S),
50 * RCC_PLLI2SCmd(ENABLE) and RCC_GetFlagStatus(RCC_FLAG_PLLI2SRDY).
52 * - External clock source is configured using the function
53 * RCC_I2SCLKConfig(RCC_I2S2CLKSource_Ext) and after setting correctly the define constant
54 * I2S_EXTERNAL_CLOCK_VAL in the stm32f4xx_conf.h file.
56 * 5. Enable the NVIC and the corresponding interrupt using the function
57 * SPI_ITConfig() if you need to use interrupt mode.
59 * 6. When using the DMA mode
60 * - Configure the DMA using DMA_Init() function
61 * - Active the needed channel Request using SPI_I2S_DMACmd() function
63 * 7. Enable the SPI using the SPI_Cmd() function or enable the I2S using
66 * 8. Enable the DMA using the DMA_Cmd() function when using DMA mode.
68 * 9. Optionally, you can enable/configure the following parameters without
69 * re-initialization (i.e there is no need to call again SPI_Init() function):
70 * - When bidirectional mode (SPI_Direction_1Line_Rx or SPI_Direction_1Line_Tx)
71 * is programmed as Data direction parameter using the SPI_Init() function
72 * it can be possible to switch between SPI_Direction_Tx or SPI_Direction_Rx
73 * using the SPI_BiDirectionalLineConfig() function.
74 * - When SPI_NSS_Soft is selected as Slave Select Management parameter
75 * using the SPI_Init() function it can be possible to manage the
76 * NSS internal signal using the SPI_NSSInternalSoftwareConfig() function.
77 * - Reconfigure the data size using the SPI_DataSizeConfig() function
78 * - Enable or disable the SS output using the SPI_SSOutputCmd() function
80 * 10. To use the CRC Hardware calculation feature refer to the Peripheral
81 * CRC hardware Calculation subsection.
84 * It is possible to use SPI in I2S full duplex mode, in this case, each SPI
85 * peripheral is able to manage sending and receiving data simultaneously
86 * using two data lines. Each SPI peripheral has an extended block called I2Sxext
87 * (ie. I2S2ext for SPI2 and I2S3ext for SPI3).
88 * The extension block is not a full SPI IP, it is used only as I2S slave to
89 * implement full duplex mode. The extension block uses the same clock sources
91 * To configure I2S full duplex you have to:
93 * 1. Configure SPIx in I2S mode (I2S_Init() function) as described above.
95 * 2. Call the I2S_FullDuplexConfig() function using the same strucutre passed to
96 * I2S_Init() function.
98 * 3. Call I2S_Cmd() for SPIx then for its extended block.
100 * 4. To configure interrupts or DMA requests and to get/clear flag status,
101 * use I2Sxext instance for the extension block.
103 * Functions that can be called with I2Sxext instances are:
104 * I2S_Cmd(), I2S_FullDuplexConfig(), SPI_I2S_ReceiveData(), SPI_I2S_SendData(),
105 * SPI_I2S_DMACmd(), SPI_I2S_ITConfig(), SPI_I2S_GetFlagStatus(), SPI_I2S_ClearFlag(),
106 * SPI_I2S_GetITStatus() and SPI_I2S_ClearITPendingBit().
108 * Example: To use SPI3 in Full duplex mode (SPI3 is Master Tx, I2S3ext is Slave Rx):
110 * RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPI3, ENABLE);
111 * I2S_StructInit(&I2SInitStruct);
112 * I2SInitStruct.Mode = I2S_Mode_MasterTx;
113 * I2S_Init(SPI3, &I2SInitStruct);
114 * I2S_FullDuplexConfig(SPI3ext, &I2SInitStruct)
115 * I2S_Cmd(SPI3, ENABLE);
116 * I2S_Cmd(SPI3ext, ENABLE);
118 * while (SPI_I2S_GetFlagStatus(SPI2, SPI_FLAG_TXE) == RESET)
120 * SPI_I2S_SendData(SPI3, txdata[i]);
122 * while (SPI_I2S_GetFlagStatus(I2S3ext, SPI_FLAG_RXNE) == RESET)
124 * rxdata[i] = SPI_I2S_ReceiveData(I2S3ext);
129 * @note This driver supports only the I2S clock scheme available in Silicon
130 * RevisionB and RevisionY.
132 * @note In I2S mode: if an external clock is used as source clock for the I2S,
133 * then the define I2S_EXTERNAL_CLOCK_VAL in file stm32f4xx_conf.h should
134 * be enabled and set to the value of the source clock frequency (in Hz).
136 * @note In SPI mode: To use the SPI TI mode, call the function SPI_TIModeCmd()
137 * just after calling the function SPI_Init().
141 ******************************************************************************
144 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
145 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
146 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
147 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
148 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
149 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
151 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
152 ******************************************************************************
155 /* Includes ------------------------------------------------------------------*/
156 #include "stm32f4xx_spi.h"
157 #include "stm32f4xx_rcc.h"
159 /** @addtogroup STM32F4xx_StdPeriph_Driver
164 * @brief SPI driver modules
168 /* Private typedef -----------------------------------------------------------*/
169 /* Private define ------------------------------------------------------------*/
171 /* SPI registers Masks */
172 #define CR1_CLEAR_MASK ((uint16_t)0x3040)
173 #define I2SCFGR_CLEAR_MASK ((uint16_t)0xF040)
176 #define PLLCFGR_PPLR_MASK ((uint32_t)0x70000000)
177 #define PLLCFGR_PPLN_MASK ((uint32_t)0x00007FC0)
179 #define SPI_CR2_FRF ((uint16_t)0x0010)
180 #define SPI_SR_TIFRFE ((uint16_t)0x0100)
182 /* Private macro -------------------------------------------------------------*/
183 /* Private variables ---------------------------------------------------------*/
184 /* Private function prototypes -----------------------------------------------*/
185 /* Private functions ---------------------------------------------------------*/
187 /** @defgroup SPI_Private_Functions
191 /** @defgroup SPI_Group1 Initialization and Configuration functions
192 * @brief Initialization and Configuration functions
195 ===============================================================================
196 Initialization and Configuration functions
197 ===============================================================================
199 This section provides a set of functions allowing to initialize the SPI Direction,
200 SPI Mode, SPI Data Size, SPI Polarity, SPI Phase, SPI NSS Management, SPI Baud
201 Rate Prescaler, SPI First Bit and SPI CRC Polynomial.
203 The SPI_Init() function follows the SPI configuration procedures for Master mode
204 and Slave mode (details for these procedures are available in reference manual
212 * @brief Deinitialize the SPIx peripheral registers to their default reset values.
213 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
214 * in SPI mode or 2 or 3 in I2S mode.
216 * @note The extended I2S blocks (ie. I2S2ext and I2S3ext blocks) are deinitialized
217 * when the relative I2S peripheral is deinitialized (the extended block's clock
218 * is managed by the I2S peripheral clock).
222 void SPI_I2S_DeInit(SPI_TypeDef* SPIx)
224 /* Check the parameters */
225 assert_param(IS_SPI_ALL_PERIPH(SPIx));
229 /* Enable SPI1 reset state */
230 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, ENABLE);
231 /* Release SPI1 from reset state */
232 RCC_APB2PeriphResetCmd(RCC_APB2Periph_SPI1, DISABLE);
234 else if (SPIx == SPI2)
236 /* Enable SPI2 reset state */
237 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, ENABLE);
238 /* Release SPI2 from reset state */
239 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI2, DISABLE);
245 /* Enable SPI3 reset state */
246 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, ENABLE);
247 /* Release SPI3 from reset state */
248 RCC_APB1PeriphResetCmd(RCC_APB1Periph_SPI3, DISABLE);
254 * @brief Initializes the SPIx peripheral according to the specified
255 * parameters in the SPI_InitStruct.
256 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
257 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure that
258 * contains the configuration information for the specified SPI peripheral.
261 void SPI_Init(SPI_TypeDef* SPIx, SPI_InitTypeDef* SPI_InitStruct)
265 /* check the parameters */
266 assert_param(IS_SPI_ALL_PERIPH(SPIx));
268 /* Check the SPI parameters */
269 assert_param(IS_SPI_DIRECTION_MODE(SPI_InitStruct->SPI_Direction));
270 assert_param(IS_SPI_MODE(SPI_InitStruct->SPI_Mode));
271 assert_param(IS_SPI_DATASIZE(SPI_InitStruct->SPI_DataSize));
272 assert_param(IS_SPI_CPOL(SPI_InitStruct->SPI_CPOL));
273 assert_param(IS_SPI_CPHA(SPI_InitStruct->SPI_CPHA));
274 assert_param(IS_SPI_NSS(SPI_InitStruct->SPI_NSS));
275 assert_param(IS_SPI_BAUDRATE_PRESCALER(SPI_InitStruct->SPI_BaudRatePrescaler));
276 assert_param(IS_SPI_FIRST_BIT(SPI_InitStruct->SPI_FirstBit));
277 assert_param(IS_SPI_CRC_POLYNOMIAL(SPI_InitStruct->SPI_CRCPolynomial));
279 /*---------------------------- SPIx CR1 Configuration ------------------------*/
280 /* Get the SPIx CR1 value */
282 /* Clear BIDIMode, BIDIOE, RxONLY, SSM, SSI, LSBFirst, BR, MSTR, CPOL and CPHA bits */
283 tmpreg &= CR1_CLEAR_MASK;
284 /* Configure SPIx: direction, NSS management, first transmitted bit, BaudRate prescaler
285 master/salve mode, CPOL and CPHA */
286 /* Set BIDImode, BIDIOE and RxONLY bits according to SPI_Direction value */
287 /* Set SSM, SSI and MSTR bits according to SPI_Mode and SPI_NSS values */
288 /* Set LSBFirst bit according to SPI_FirstBit value */
289 /* Set BR bits according to SPI_BaudRatePrescaler value */
290 /* Set CPOL bit according to SPI_CPOL value */
291 /* Set CPHA bit according to SPI_CPHA value */
292 tmpreg |= (uint16_t)((uint32_t)SPI_InitStruct->SPI_Direction | SPI_InitStruct->SPI_Mode |
293 SPI_InitStruct->SPI_DataSize | SPI_InitStruct->SPI_CPOL |
294 SPI_InitStruct->SPI_CPHA | SPI_InitStruct->SPI_NSS |
295 SPI_InitStruct->SPI_BaudRatePrescaler | SPI_InitStruct->SPI_FirstBit);
296 /* Write to SPIx CR1 */
299 /* Activate the SPI mode (Reset I2SMOD bit in I2SCFGR register) */
300 SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SMOD);
301 /*---------------------------- SPIx CRCPOLY Configuration --------------------*/
302 /* Write to SPIx CRCPOLY */
303 SPIx->CRCPR = SPI_InitStruct->SPI_CRCPolynomial;
307 * @brief Initializes the SPIx peripheral according to the specified
308 * parameters in the I2S_InitStruct.
309 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral (configured in I2S mode).
310 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
311 * contains the configuration information for the specified SPI peripheral
312 * configured in I2S mode.
314 * @note The function calculates the optimal prescaler needed to obtain the most
315 * accurate audio frequency (depending on the I2S clock source, the PLL values
316 * and the product configuration). But in case the prescaler value is greater
317 * than 511, the default value (0x02) will be configured instead.
319 * @note if an external clock is used as source clock for the I2S, then the define
320 * I2S_EXTERNAL_CLOCK_VAL in file stm32f4xx_conf.h should be enabled and set
321 * to the value of the the source clock frequency (in Hz).
325 void I2S_Init(SPI_TypeDef* SPIx, I2S_InitTypeDef* I2S_InitStruct)
327 uint16_t tmpreg = 0, i2sdiv = 2, i2sodd = 0, packetlength = 1;
328 uint32_t tmp = 0, i2sclk = 0;
329 #ifndef I2S_EXTERNAL_CLOCK_VAL
330 uint32_t pllm = 0, plln = 0, pllr = 0;
331 #endif /* I2S_EXTERNAL_CLOCK_VAL */
333 /* Check the I2S parameters */
334 assert_param(IS_SPI_23_PERIPH(SPIx));
335 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
336 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
337 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
338 assert_param(IS_I2S_MCLK_OUTPUT(I2S_InitStruct->I2S_MCLKOutput));
339 assert_param(IS_I2S_AUDIO_FREQ(I2S_InitStruct->I2S_AudioFreq));
340 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
342 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
343 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
344 SPIx->I2SCFGR &= I2SCFGR_CLEAR_MASK;
345 SPIx->I2SPR = 0x0002;
347 /* Get the I2SCFGR register value */
348 tmpreg = SPIx->I2SCFGR;
350 /* If the default value has to be written, reinitialize i2sdiv and i2sodd*/
351 if(I2S_InitStruct->I2S_AudioFreq == I2S_AudioFreq_Default)
353 i2sodd = (uint16_t)0;
354 i2sdiv = (uint16_t)2;
356 /* If the requested audio frequency is not the default, compute the prescaler */
359 /* Check the frame length (For the Prescaler computing) *******************/
360 if(I2S_InitStruct->I2S_DataFormat == I2S_DataFormat_16b)
362 /* Packet length is 16 bits */
367 /* Packet length is 32 bits */
371 /* Get I2S source Clock frequency (only in Silicon RevisionB and RevisionY) */
373 /* If an external I2S clock has to be used, this define should be set
374 in the project configuration or in the stm32f4xx_conf.h file */
375 #ifdef I2S_EXTERNAL_CLOCK_VAL
376 /* Set external clock as I2S clock source */
377 if ((RCC->CFGR & RCC_CFGR_I2SSRC) == 0)
379 RCC->CFGR |= (uint32_t)RCC_CFGR_I2SSRC;
382 /* Set the I2S clock to the external clock value */
383 i2sclk = I2S_EXTERNAL_CLOCK_VAL;
385 #else /* There is no define for External I2S clock source */
386 /* Set PLLI2S as I2S clock source */
387 if ((RCC->CFGR & RCC_CFGR_I2SSRC) != 0)
389 RCC->CFGR &= ~(uint32_t)RCC_CFGR_I2SSRC;
392 /* Get the PLLI2SN value */
393 plln = (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6) & \
394 (RCC_PLLI2SCFGR_PLLI2SN >> 6));
396 /* Get the PLLI2SR value */
397 pllr = (uint32_t)(((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> 28) & \
398 (RCC_PLLI2SCFGR_PLLI2SR >> 28));
400 /* Get the PLLM value */
401 pllm = (uint32_t)(RCC->PLLCFGR & RCC_PLLCFGR_PLLM);
403 /* Get the I2S source clock value */
404 i2sclk = (uint32_t)(((HSE_VALUE / pllm) * plln) / pllr);
405 #endif /* I2S_EXTERNAL_CLOCK_VAL */
407 /* Compute the Real divider depending on the MCLK output state, with a floating point */
408 if(I2S_InitStruct->I2S_MCLKOutput == I2S_MCLKOutput_Enable)
410 /* MCLK output is enabled */
411 tmp = (uint16_t)(((((i2sclk / 256) * 10) / I2S_InitStruct->I2S_AudioFreq)) + 5);
415 /* MCLK output is disabled */
416 tmp = (uint16_t)(((((i2sclk / (32 * packetlength)) *10 ) / I2S_InitStruct->I2S_AudioFreq)) + 5);
419 /* Remove the flatting point */
422 /* Check the parity of the divider */
423 i2sodd = (uint16_t)(tmp & (uint16_t)0x0001);
425 /* Compute the i2sdiv prescaler */
426 i2sdiv = (uint16_t)((tmp - i2sodd) / 2);
428 /* Get the Mask for the Odd bit (SPI_I2SPR[8]) register */
429 i2sodd = (uint16_t) (i2sodd << 8);
432 /* Test if the divider is 1 or 0 or greater than 0xFF */
433 if ((i2sdiv < 2) || (i2sdiv > 0xFF))
435 /* Set the default values */
440 /* Write to SPIx I2SPR register the computed value */
441 SPIx->I2SPR = (uint16_t)((uint16_t)i2sdiv | (uint16_t)(i2sodd | (uint16_t)I2S_InitStruct->I2S_MCLKOutput));
443 /* Configure the I2S with the SPI_InitStruct values */
444 tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(I2S_InitStruct->I2S_Mode | \
445 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
446 (uint16_t)I2S_InitStruct->I2S_CPOL))));
448 /* Write to SPIx I2SCFGR */
449 SPIx->I2SCFGR = tmpreg;
453 * @brief Fills each SPI_InitStruct member with its default value.
454 * @param SPI_InitStruct: pointer to a SPI_InitTypeDef structure which will be initialized.
457 void SPI_StructInit(SPI_InitTypeDef* SPI_InitStruct)
459 /*--------------- Reset SPI init structure parameters values -----------------*/
460 /* Initialize the SPI_Direction member */
461 SPI_InitStruct->SPI_Direction = SPI_Direction_2Lines_FullDuplex;
462 /* initialize the SPI_Mode member */
463 SPI_InitStruct->SPI_Mode = SPI_Mode_Slave;
464 /* initialize the SPI_DataSize member */
465 SPI_InitStruct->SPI_DataSize = SPI_DataSize_8b;
466 /* Initialize the SPI_CPOL member */
467 SPI_InitStruct->SPI_CPOL = SPI_CPOL_Low;
468 /* Initialize the SPI_CPHA member */
469 SPI_InitStruct->SPI_CPHA = SPI_CPHA_1Edge;
470 /* Initialize the SPI_NSS member */
471 SPI_InitStruct->SPI_NSS = SPI_NSS_Hard;
472 /* Initialize the SPI_BaudRatePrescaler member */
473 SPI_InitStruct->SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
474 /* Initialize the SPI_FirstBit member */
475 SPI_InitStruct->SPI_FirstBit = SPI_FirstBit_MSB;
476 /* Initialize the SPI_CRCPolynomial member */
477 SPI_InitStruct->SPI_CRCPolynomial = 7;
481 * @brief Fills each I2S_InitStruct member with its default value.
482 * @param I2S_InitStruct: pointer to a I2S_InitTypeDef structure which will be initialized.
485 void I2S_StructInit(I2S_InitTypeDef* I2S_InitStruct)
487 /*--------------- Reset I2S init structure parameters values -----------------*/
488 /* Initialize the I2S_Mode member */
489 I2S_InitStruct->I2S_Mode = I2S_Mode_SlaveTx;
491 /* Initialize the I2S_Standard member */
492 I2S_InitStruct->I2S_Standard = I2S_Standard_Phillips;
494 /* Initialize the I2S_DataFormat member */
495 I2S_InitStruct->I2S_DataFormat = I2S_DataFormat_16b;
497 /* Initialize the I2S_MCLKOutput member */
498 I2S_InitStruct->I2S_MCLKOutput = I2S_MCLKOutput_Disable;
500 /* Initialize the I2S_AudioFreq member */
501 I2S_InitStruct->I2S_AudioFreq = I2S_AudioFreq_Default;
503 /* Initialize the I2S_CPOL member */
504 I2S_InitStruct->I2S_CPOL = I2S_CPOL_Low;
508 * @brief Enables or disables the specified SPI peripheral.
509 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
510 * @param NewState: new state of the SPIx peripheral.
511 * This parameter can be: ENABLE or DISABLE.
514 void SPI_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
516 /* Check the parameters */
517 assert_param(IS_SPI_ALL_PERIPH(SPIx));
518 assert_param(IS_FUNCTIONAL_STATE(NewState));
519 if (NewState != DISABLE)
521 /* Enable the selected SPI peripheral */
522 SPIx->CR1 |= SPI_CR1_SPE;
526 /* Disable the selected SPI peripheral */
527 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_SPE);
532 * @brief Enables or disables the specified SPI peripheral (in I2S mode).
533 * @param SPIx: where x can be 2 or 3 to select the SPI peripheral (or I2Sxext
534 * for full duplex mode).
535 * @param NewState: new state of the SPIx peripheral.
536 * This parameter can be: ENABLE or DISABLE.
539 void I2S_Cmd(SPI_TypeDef* SPIx, FunctionalState NewState)
541 /* Check the parameters */
542 assert_param(IS_SPI_23_PERIPH_EXT(SPIx));
543 assert_param(IS_FUNCTIONAL_STATE(NewState));
545 if (NewState != DISABLE)
547 /* Enable the selected SPI peripheral (in I2S mode) */
548 SPIx->I2SCFGR |= SPI_I2SCFGR_I2SE;
552 /* Disable the selected SPI peripheral in I2S mode */
553 SPIx->I2SCFGR &= (uint16_t)~((uint16_t)SPI_I2SCFGR_I2SE);
558 * @brief Configures the data size for the selected SPI.
559 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
560 * @param SPI_DataSize: specifies the SPI data size.
561 * This parameter can be one of the following values:
562 * @arg SPI_DataSize_16b: Set data frame format to 16bit
563 * @arg SPI_DataSize_8b: Set data frame format to 8bit
566 void SPI_DataSizeConfig(SPI_TypeDef* SPIx, uint16_t SPI_DataSize)
568 /* Check the parameters */
569 assert_param(IS_SPI_ALL_PERIPH(SPIx));
570 assert_param(IS_SPI_DATASIZE(SPI_DataSize));
572 SPIx->CR1 &= (uint16_t)~SPI_DataSize_16b;
573 /* Set new DFF bit value */
574 SPIx->CR1 |= SPI_DataSize;
578 * @brief Selects the data transfer direction in bidirectional mode for the specified SPI.
579 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
580 * @param SPI_Direction: specifies the data transfer direction in bidirectional mode.
581 * This parameter can be one of the following values:
582 * @arg SPI_Direction_Tx: Selects Tx transmission direction
583 * @arg SPI_Direction_Rx: Selects Rx receive direction
586 void SPI_BiDirectionalLineConfig(SPI_TypeDef* SPIx, uint16_t SPI_Direction)
588 /* Check the parameters */
589 assert_param(IS_SPI_ALL_PERIPH(SPIx));
590 assert_param(IS_SPI_DIRECTION(SPI_Direction));
591 if (SPI_Direction == SPI_Direction_Tx)
593 /* Set the Tx only mode */
594 SPIx->CR1 |= SPI_Direction_Tx;
598 /* Set the Rx only mode */
599 SPIx->CR1 &= SPI_Direction_Rx;
604 * @brief Configures internally by software the NSS pin for the selected SPI.
605 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
606 * @param SPI_NSSInternalSoft: specifies the SPI NSS internal state.
607 * This parameter can be one of the following values:
608 * @arg SPI_NSSInternalSoft_Set: Set NSS pin internally
609 * @arg SPI_NSSInternalSoft_Reset: Reset NSS pin internally
612 void SPI_NSSInternalSoftwareConfig(SPI_TypeDef* SPIx, uint16_t SPI_NSSInternalSoft)
614 /* Check the parameters */
615 assert_param(IS_SPI_ALL_PERIPH(SPIx));
616 assert_param(IS_SPI_NSS_INTERNAL(SPI_NSSInternalSoft));
617 if (SPI_NSSInternalSoft != SPI_NSSInternalSoft_Reset)
619 /* Set NSS pin internally by software */
620 SPIx->CR1 |= SPI_NSSInternalSoft_Set;
624 /* Reset NSS pin internally by software */
625 SPIx->CR1 &= SPI_NSSInternalSoft_Reset;
630 * @brief Enables or disables the SS output for the selected SPI.
631 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
632 * @param NewState: new state of the SPIx SS output.
633 * This parameter can be: ENABLE or DISABLE.
636 void SPI_SSOutputCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
638 /* Check the parameters */
639 assert_param(IS_SPI_ALL_PERIPH(SPIx));
640 assert_param(IS_FUNCTIONAL_STATE(NewState));
641 if (NewState != DISABLE)
643 /* Enable the selected SPI SS output */
644 SPIx->CR2 |= (uint16_t)SPI_CR2_SSOE;
648 /* Disable the selected SPI SS output */
649 SPIx->CR2 &= (uint16_t)~((uint16_t)SPI_CR2_SSOE);
654 * @brief Enables or disables the SPIx/I2Sx DMA interface.
656 * @note This function can be called only after the SPI_Init() function has
658 * @note When TI mode is selected, the control bits SSM, SSI, CPOL and CPHA
659 * are not taken into consideration and are configured by hardware
660 * respectively to the TI mode requirements.
662 * @param SPIx: where x can be 1, 2 or 3
663 * @param NewState: new state of the selected SPI TI communication mode.
664 * This parameter can be: ENABLE or DISABLE.
667 void SPI_TIModeCmd(SPI_TypeDef* SPIx, FunctionalState NewState)
669 /* Check the parameters */
670 assert_param(IS_SPI_ALL_PERIPH(SPIx));
671 assert_param(IS_FUNCTIONAL_STATE(NewState));
673 if (NewState != DISABLE)
675 /* Enable the TI mode for the selected SPI peripheral */
676 SPIx->CR2 |= SPI_CR2_FRF;
680 /* Disable the TI mode for the selected SPI peripheral */
681 SPIx->CR2 &= (uint16_t)~SPI_CR2_FRF;
686 * @brief Configures the full duplex mode for the I2Sx peripheral using its
687 * extension I2Sxext according to the specified parameters in the
689 * @param I2Sxext: where x can be 2 or 3 to select the I2S peripheral extension block.
690 * @param I2S_InitStruct: pointer to an I2S_InitTypeDef structure that
691 * contains the configuration information for the specified I2S peripheral
694 * @note The structure pointed by I2S_InitStruct parameter should be the same
695 * used for the master I2S peripheral. In this case, if the master is
696 * configured as transmitter, the slave will be receiver and vice versa.
697 * Or you can force a different mode by modifying the field I2S_Mode to the
698 * value I2S_SlaveRx or I2S_SlaveTx indepedently of the master configuration.
700 * @note The I2S full duplex extension can be configured in slave mode only.
704 void I2S_FullDuplexConfig(SPI_TypeDef* I2Sxext, I2S_InitTypeDef* I2S_InitStruct)
706 uint16_t tmpreg = 0, tmp = 0;
708 /* Check the I2S parameters */
709 assert_param(IS_I2S_EXT_PERIPH(I2Sxext));
710 assert_param(IS_I2S_MODE(I2S_InitStruct->I2S_Mode));
711 assert_param(IS_I2S_STANDARD(I2S_InitStruct->I2S_Standard));
712 assert_param(IS_I2S_DATA_FORMAT(I2S_InitStruct->I2S_DataFormat));
713 assert_param(IS_I2S_CPOL(I2S_InitStruct->I2S_CPOL));
715 /*----------------------- SPIx I2SCFGR & I2SPR Configuration -----------------*/
716 /* Clear I2SMOD, I2SE, I2SCFG, PCMSYNC, I2SSTD, CKPOL, DATLEN and CHLEN bits */
717 I2Sxext->I2SCFGR &= I2SCFGR_CLEAR_MASK;
718 I2Sxext->I2SPR = 0x0002;
720 /* Get the I2SCFGR register value */
721 tmpreg = I2Sxext->I2SCFGR;
723 /* Get the mode to be configured for the extended I2S */
724 if ((I2S_InitStruct->I2S_Mode == I2S_Mode_MasterTx) || (I2S_InitStruct->I2S_Mode == I2S_Mode_SlaveTx))
726 tmp = I2S_Mode_SlaveRx;
730 if ((I2S_InitStruct->I2S_Mode == I2S_Mode_MasterRx) || (I2S_InitStruct->I2S_Mode == I2S_Mode_SlaveRx))
732 tmp = I2S_Mode_SlaveTx;
737 /* Configure the I2S with the SPI_InitStruct values */
738 tmpreg |= (uint16_t)((uint16_t)SPI_I2SCFGR_I2SMOD | (uint16_t)(tmp | \
739 (uint16_t)(I2S_InitStruct->I2S_Standard | (uint16_t)(I2S_InitStruct->I2S_DataFormat | \
740 (uint16_t)I2S_InitStruct->I2S_CPOL))));
742 /* Write to SPIx I2SCFGR */
743 I2Sxext->I2SCFGR = tmpreg;
750 /** @defgroup SPI_Group2 Data transfers functions
751 * @brief Data transfers functions
754 ===============================================================================
755 Data transfers functions
756 ===============================================================================
758 This section provides a set of functions allowing to manage the SPI data transfers
760 In reception, data are received and then stored into an internal Rx buffer while
761 In transmission, data are first stored into an internal Tx buffer before being
764 The read access of the SPI_DR register can be done using the SPI_I2S_ReceiveData()
765 function and returns the Rx buffered value. Whereas a write access to the SPI_DR
766 can be done using SPI_I2S_SendData() function and stores the written data into
774 * @brief Returns the most recent received data by the SPIx/I2Sx peripheral.
775 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
776 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
777 * @retval The value of the received data.
779 uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx)
781 /* Check the parameters */
782 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
784 /* Return the data in the DR register */
789 * @brief Transmits a Data through the SPIx/I2Sx peripheral.
790 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
791 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
792 * @param Data: Data to be transmitted.
795 void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data)
797 /* Check the parameters */
798 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
800 /* Write in the DR register the data to be sent */
808 /** @defgroup SPI_Group3 Hardware CRC Calculation functions
809 * @brief Hardware CRC Calculation functions
812 ===============================================================================
813 Hardware CRC Calculation functions
814 ===============================================================================
816 This section provides a set of functions allowing to manage the SPI CRC hardware
819 SPI communication using CRC is possible through the following procedure:
820 1. Program the Data direction, Polarity, Phase, First Data, Baud Rate Prescaler,
821 Slave Management, Peripheral Mode and CRC Polynomial values using the SPI_Init()
823 2. Enable the CRC calculation using the SPI_CalculateCRC() function.
824 3. Enable the SPI using the SPI_Cmd() function
825 4. Before writing the last data to the TX buffer, set the CRCNext bit using the
826 SPI_TransmitCRC() function to indicate that after transmission of the last
827 data, the CRC should be transmitted.
828 5. After transmitting the last data, the SPI transmits the CRC. The SPI_CR1_CRCNEXT
829 bit is reset. The CRC is also received and compared against the SPI_RXCRCR
831 If the value does not match, the SPI_FLAG_CRCERR flag is set and an interrupt
832 can be generated when the SPI_I2S_IT_ERR interrupt is enabled.
834 @note It is advised not to read the calculated CRC values during the communication.
836 @note When the SPI is in slave mode, be careful to enable CRC calculation only
837 when the clock is stable, that is, when the clock is in the steady state.
838 If not, a wrong CRC calculation may be done. In fact, the CRC is sensitive
839 to the SCK slave input clock as soon as CRCEN is set, and this, whatever
840 the value of the SPE bit.
842 @note With high bitrate frequencies, be careful when transmitting the CRC.
843 As the number of used CPU cycles has to be as low as possible in the CRC
844 transfer phase, it is forbidden to call software functions in the CRC
845 transmission sequence to avoid errors in the last data and CRC reception.
846 In fact, CRCNEXT bit has to be written before the end of the transmission/reception
849 @note For high bit rate frequencies, it is advised to use the DMA mode to avoid the
850 degradation of the SPI speed performance due to CPU accesses impacting the
853 @note When the STM32F4xx is configured as slave and the NSS hardware mode is
854 used, the NSS pin needs to be kept low between the data phase and the CRC
857 @note When the SPI is configured in slave mode with the CRC feature enabled, CRC
858 calculation takes place even if a high level is applied on the NSS pin.
859 This may happen for example in case of a multi-slave environment where the
860 communication master addresses slaves alternately.
862 @note Between a slave de-selection (high level on NSS) and a new slave selection
863 (low level on NSS), the CRC value should be cleared on both master and slave
864 sides in order to resynchronize the master and slave for their respective
867 @note To clear the CRC, follow the procedure below:
868 1. Disable SPI using the SPI_Cmd() function
869 2. Disable the CRC calculation using the SPI_CalculateCRC() function.
870 3. Enable the CRC calculation using the SPI_CalculateCRC() function.
871 4. Enable SPI using the SPI_Cmd() function.
878 * @brief Enables or disables the CRC value calculation of the transferred bytes.
879 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
880 * @param NewState: new state of the SPIx CRC value calculation.
881 * This parameter can be: ENABLE or DISABLE.
884 void SPI_CalculateCRC(SPI_TypeDef* SPIx, FunctionalState NewState)
886 /* Check the parameters */
887 assert_param(IS_SPI_ALL_PERIPH(SPIx));
888 assert_param(IS_FUNCTIONAL_STATE(NewState));
889 if (NewState != DISABLE)
891 /* Enable the selected SPI CRC calculation */
892 SPIx->CR1 |= SPI_CR1_CRCEN;
896 /* Disable the selected SPI CRC calculation */
897 SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCEN);
902 * @brief Transmit the SPIx CRC value.
903 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
906 void SPI_TransmitCRC(SPI_TypeDef* SPIx)
908 /* Check the parameters */
909 assert_param(IS_SPI_ALL_PERIPH(SPIx));
911 /* Enable the selected SPI CRC transmission */
912 SPIx->CR1 |= SPI_CR1_CRCNEXT;
916 * @brief Returns the transmit or the receive CRC register value for the specified SPI.
917 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
918 * @param SPI_CRC: specifies the CRC register to be read.
919 * This parameter can be one of the following values:
920 * @arg SPI_CRC_Tx: Selects Tx CRC register
921 * @arg SPI_CRC_Rx: Selects Rx CRC register
922 * @retval The selected CRC register value..
924 uint16_t SPI_GetCRC(SPI_TypeDef* SPIx, uint8_t SPI_CRC)
927 /* Check the parameters */
928 assert_param(IS_SPI_ALL_PERIPH(SPIx));
929 assert_param(IS_SPI_CRC(SPI_CRC));
930 if (SPI_CRC != SPI_CRC_Rx)
932 /* Get the Tx CRC register */
933 crcreg = SPIx->TXCRCR;
937 /* Get the Rx CRC register */
938 crcreg = SPIx->RXCRCR;
940 /* Return the selected CRC register */
945 * @brief Returns the CRC Polynomial register value for the specified SPI.
946 * @param SPIx: where x can be 1, 2 or 3 to select the SPI peripheral.
947 * @retval The CRC Polynomial register value.
949 uint16_t SPI_GetCRCPolynomial(SPI_TypeDef* SPIx)
951 /* Check the parameters */
952 assert_param(IS_SPI_ALL_PERIPH(SPIx));
954 /* Return the CRC polynomial register */
962 /** @defgroup SPI_Group4 DMA transfers management functions
963 * @brief DMA transfers management functions
966 ===============================================================================
967 DMA transfers management functions
968 ===============================================================================
975 * @brief Enables or disables the SPIx/I2Sx DMA interface.
976 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
977 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
978 * @param SPI_I2S_DMAReq: specifies the SPI DMA transfer request to be enabled or disabled.
979 * This parameter can be any combination of the following values:
980 * @arg SPI_I2S_DMAReq_Tx: Tx buffer DMA transfer request
981 * @arg SPI_I2S_DMAReq_Rx: Rx buffer DMA transfer request
982 * @param NewState: new state of the selected SPI DMA transfer request.
983 * This parameter can be: ENABLE or DISABLE.
986 void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState)
988 /* Check the parameters */
989 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
990 assert_param(IS_FUNCTIONAL_STATE(NewState));
991 assert_param(IS_SPI_I2S_DMAREQ(SPI_I2S_DMAReq));
993 if (NewState != DISABLE)
995 /* Enable the selected SPI DMA requests */
996 SPIx->CR2 |= SPI_I2S_DMAReq;
1000 /* Disable the selected SPI DMA requests */
1001 SPIx->CR2 &= (uint16_t)~SPI_I2S_DMAReq;
1009 /** @defgroup SPI_Group5 Interrupts and flags management functions
1010 * @brief Interrupts and flags management functions
1013 ===============================================================================
1014 Interrupts and flags management functions
1015 ===============================================================================
1017 This section provides a set of functions allowing to configure the SPI Interrupts
1018 sources and check or clear the flags or pending bits status.
1019 The user should identify which mode will be used in his application to manage
1020 the communication: Polling mode, Interrupt mode or DMA mode.
1024 In Polling Mode, the SPI/I2S communication can be managed by 9 flags:
1025 1. SPI_I2S_FLAG_TXE : to indicate the status of the transmit buffer register
1026 2. SPI_I2S_FLAG_RXNE : to indicate the status of the receive buffer register
1027 3. SPI_I2S_FLAG_BSY : to indicate the state of the communication layer of the SPI.
1028 4. SPI_FLAG_CRCERR : to indicate if a CRC Calculation error occur
1029 5. SPI_FLAG_MODF : to indicate if a Mode Fault error occur
1030 6. SPI_I2S_FLAG_OVR : to indicate if an Overrun error occur
1031 7. I2S_FLAG_TIFRFE: to indicate a Frame Format error occurs.
1032 8. I2S_FLAG_UDR: to indicate an Underrun error occurs.
1033 9. I2S_FLAG_CHSIDE: to indicate Channel Side.
1035 @note Do not use the BSY flag to handle each data transmission or reception. It is
1036 better to use the TXE and RXNE flags instead.
1038 In this Mode it is advised to use the following functions:
1039 - FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
1040 - void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG);
1044 In Interrupt Mode, the SPI communication can be managed by 3 interrupt sources
1048 1. SPI_I2S_IT_TXE : to indicate the status of the transmit buffer register
1049 2. SPI_I2S_IT_RXNE : to indicate the status of the receive buffer register
1050 3. SPI_IT_CRCERR : to indicate if a CRC Calculation error occur (available in SPI mode only)
1051 4. SPI_IT_MODF : to indicate if a Mode Fault error occur (available in SPI mode only)
1052 5. SPI_I2S_IT_OVR : to indicate if an Overrun error occur
1053 6. I2S_IT_UDR : to indicate an Underrun Error occurs (available in I2S mode only).
1054 7. I2S_FLAG_TIFRFE : to indicate a Frame Format error occurs (available in TI mode only).
1058 1. SPI_I2S_IT_TXE: specifies the interrupt source for the Tx buffer empty
1060 2. SPI_I2S_IT_RXNE : specifies the interrupt source for the Rx buffer not
1062 3. SPI_I2S_IT_ERR : specifies the interrupt source for the errors interrupt.
1064 In this Mode it is advised to use the following functions:
1065 - void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState);
1066 - ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
1067 - void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT);
1071 In DMA Mode, the SPI communication can be managed by 2 DMA Channel requests:
1072 1. SPI_I2S_DMAReq_Tx: specifies the Tx buffer DMA transfer request
1073 2. SPI_I2S_DMAReq_Rx: specifies the Rx buffer DMA transfer request
1075 In this Mode it is advised to use the following function:
1076 - void SPI_I2S_DMACmd(SPI_TypeDef* SPIx, uint16_t SPI_I2S_DMAReq, FunctionalState NewState);
1083 * @brief Enables or disables the specified SPI/I2S interrupts.
1084 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
1085 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
1086 * @param SPI_I2S_IT: specifies the SPI interrupt source to be enabled or disabled.
1087 * This parameter can be one of the following values:
1088 * @arg SPI_I2S_IT_TXE: Tx buffer empty interrupt mask
1089 * @arg SPI_I2S_IT_RXNE: Rx buffer not empty interrupt mask
1090 * @arg SPI_I2S_IT_ERR: Error interrupt mask
1091 * @param NewState: new state of the specified SPI interrupt.
1092 * This parameter can be: ENABLE or DISABLE.
1095 void SPI_I2S_ITConfig(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT, FunctionalState NewState)
1097 uint16_t itpos = 0, itmask = 0 ;
1099 /* Check the parameters */
1100 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
1101 assert_param(IS_FUNCTIONAL_STATE(NewState));
1102 assert_param(IS_SPI_I2S_CONFIG_IT(SPI_I2S_IT));
1104 /* Get the SPI IT index */
1105 itpos = SPI_I2S_IT >> 4;
1107 /* Set the IT mask */
1108 itmask = (uint16_t)1 << (uint16_t)itpos;
1110 if (NewState != DISABLE)
1112 /* Enable the selected SPI interrupt */
1113 SPIx->CR2 |= itmask;
1117 /* Disable the selected SPI interrupt */
1118 SPIx->CR2 &= (uint16_t)~itmask;
1123 * @brief Checks whether the specified SPIx/I2Sx flag is set or not.
1124 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
1125 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
1126 * @param SPI_I2S_FLAG: specifies the SPI flag to check.
1127 * This parameter can be one of the following values:
1128 * @arg SPI_I2S_FLAG_TXE: Transmit buffer empty flag.
1129 * @arg SPI_I2S_FLAG_RXNE: Receive buffer not empty flag.
1130 * @arg SPI_I2S_FLAG_BSY: Busy flag.
1131 * @arg SPI_I2S_FLAG_OVR: Overrun flag.
1132 * @arg SPI_FLAG_MODF: Mode Fault flag.
1133 * @arg SPI_FLAG_CRCERR: CRC Error flag.
1134 * @arg SPI_I2S_FLAG_TIFRFE: Format Error.
1135 * @arg I2S_FLAG_UDR: Underrun Error flag.
1136 * @arg I2S_FLAG_CHSIDE: Channel Side flag.
1137 * @retval The new state of SPI_I2S_FLAG (SET or RESET).
1139 FlagStatus SPI_I2S_GetFlagStatus(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
1141 FlagStatus bitstatus = RESET;
1142 /* Check the parameters */
1143 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
1144 assert_param(IS_SPI_I2S_GET_FLAG(SPI_I2S_FLAG));
1146 /* Check the status of the specified SPI flag */
1147 if ((SPIx->SR & SPI_I2S_FLAG) != (uint16_t)RESET)
1149 /* SPI_I2S_FLAG is set */
1154 /* SPI_I2S_FLAG is reset */
1157 /* Return the SPI_I2S_FLAG status */
1162 * @brief Clears the SPIx CRC Error (CRCERR) flag.
1163 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
1164 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
1165 * @param SPI_I2S_FLAG: specifies the SPI flag to clear.
1166 * This function clears only CRCERR flag.
1167 * @arg SPI_FLAG_CRCERR: CRC Error flag.
1169 * @note OVR (OverRun error) flag is cleared by software sequence: a read
1170 * operation to SPI_DR register (SPI_I2S_ReceiveData()) followed by a read
1171 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()).
1172 * @note UDR (UnderRun error) flag is cleared by a read operation to
1173 * SPI_SR register (SPI_I2S_GetFlagStatus()).
1174 * @note MODF (Mode Fault) flag is cleared by software sequence: a read/write
1175 * operation to SPI_SR register (SPI_I2S_GetFlagStatus()) followed by a
1176 * write operation to SPI_CR1 register (SPI_Cmd() to enable the SPI).
1180 void SPI_I2S_ClearFlag(SPI_TypeDef* SPIx, uint16_t SPI_I2S_FLAG)
1182 /* Check the parameters */
1183 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
1184 assert_param(IS_SPI_I2S_CLEAR_FLAG(SPI_I2S_FLAG));
1186 /* Clear the selected SPI CRC Error (CRCERR) flag */
1187 SPIx->SR = (uint16_t)~SPI_I2S_FLAG;
1191 * @brief Checks whether the specified SPIx/I2Sx interrupt has occurred or not.
1192 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
1193 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
1194 * @param SPI_I2S_IT: specifies the SPI interrupt source to check.
1195 * This parameter can be one of the following values:
1196 * @arg SPI_I2S_IT_TXE: Transmit buffer empty interrupt.
1197 * @arg SPI_I2S_IT_RXNE: Receive buffer not empty interrupt.
1198 * @arg SPI_I2S_IT_OVR: Overrun interrupt.
1199 * @arg SPI_IT_MODF: Mode Fault interrupt.
1200 * @arg SPI_IT_CRCERR: CRC Error interrupt.
1201 * @arg I2S_IT_UDR: Underrun interrupt.
1202 * @arg SPI_I2S_IT_TIFRFE: Format Error interrupt.
1203 * @retval The new state of SPI_I2S_IT (SET or RESET).
1205 ITStatus SPI_I2S_GetITStatus(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
1207 ITStatus bitstatus = RESET;
1208 uint16_t itpos = 0, itmask = 0, enablestatus = 0;
1210 /* Check the parameters */
1211 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
1212 assert_param(IS_SPI_I2S_GET_IT(SPI_I2S_IT));
1214 /* Get the SPI_I2S_IT index */
1215 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
1217 /* Get the SPI_I2S_IT IT mask */
1218 itmask = SPI_I2S_IT >> 4;
1220 /* Set the IT mask */
1221 itmask = 0x01 << itmask;
1223 /* Get the SPI_I2S_IT enable bit status */
1224 enablestatus = (SPIx->CR2 & itmask) ;
1226 /* Check the status of the specified SPI interrupt */
1227 if (((SPIx->SR & itpos) != (uint16_t)RESET) && enablestatus)
1229 /* SPI_I2S_IT is set */
1234 /* SPI_I2S_IT is reset */
1237 /* Return the SPI_I2S_IT status */
1242 * @brief Clears the SPIx CRC Error (CRCERR) interrupt pending bit.
1243 * @param SPIx: To select the SPIx/I2Sx peripheral, where x can be: 1, 2 or 3
1244 * in SPI mode or 2 or 3 in I2S mode or I2Sxext for I2S full duplex mode.
1245 * @param SPI_I2S_IT: specifies the SPI interrupt pending bit to clear.
1246 * This function clears only CRCERR interrupt pending bit.
1247 * @arg SPI_IT_CRCERR: CRC Error interrupt.
1249 * @note OVR (OverRun Error) interrupt pending bit is cleared by software
1250 * sequence: a read operation to SPI_DR register (SPI_I2S_ReceiveData())
1251 * followed by a read operation to SPI_SR register (SPI_I2S_GetITStatus()).
1252 * @note UDR (UnderRun Error) interrupt pending bit is cleared by a read
1253 * operation to SPI_SR register (SPI_I2S_GetITStatus()).
1254 * @note MODF (Mode Fault) interrupt pending bit is cleared by software sequence:
1255 * a read/write operation to SPI_SR register (SPI_I2S_GetITStatus())
1256 * followed by a write operation to SPI_CR1 register (SPI_Cmd() to enable
1260 void SPI_I2S_ClearITPendingBit(SPI_TypeDef* SPIx, uint8_t SPI_I2S_IT)
1263 /* Check the parameters */
1264 assert_param(IS_SPI_ALL_PERIPH_EXT(SPIx));
1265 assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
1267 /* Get the SPI_I2S IT index */
1268 itpos = 0x01 << (SPI_I2S_IT & 0x0F);
1270 /* Clear the selected SPI CRC Error (CRCERR) interrupt pending bit */
1271 SPIx->SR = (uint16_t)~itpos;
1290 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/