* src/z80/gen.c (shiftR2Left2Result): Improved the case when v = v >> n for small values of n to use less code space and time.
(genrshTwo): Fixed v = v >> n where v is a negative int and n is > 8: bug 460010.
* src/z80/peeph.def: Added a rule to optimise shift then compare.
* support/regression/tests/bug-460000.c (testShiftByParam): Added test case.
* support/regression/tests/bug-460010.c: Added test case.
* support/regression/Makefile (test-host): Removed a silly 'clean' target when testing against gcc.
git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@1255
4a8a32a2-be11-0410-ad9d-
d568d2c75423
+2001-09-09 Michael Hope <michaelh@juju.net.nz>
+
+ * src/pic/ralloc.c (debugLogRegType): Removed some old types to get it to compile.
+
+ * src/z80/gen.c (shiftR2Left2Result): Improved the case when v = v >> n for small values of n to use less code space and time.
+ (genrshTwo): Fixed v = v >> n where v is a negative int and n is > 8: bug 460010.
+
+ * src/z80/peeph.def: Added a rule to optimise shift then compare.
+
+ * support/regression/tests/bug-460000.c (testShiftByParam): Added test case.
+
+ * support/regression/tests/bug-460010.c: Added test case.
+
+ * support/regression/Makefile (test-host): Removed a silly 'clean' target when testing against gcc.
+
2001-09-09 Bernhard Held <bernhard@bernhardheld.de>
* support/regression/Makefile: inter-port-clean adjusted for mcs51
First looking in SDCCicode.c for the stuff that generates function calls:
Probably a bug in geniCodeParams.
Nope, a bug in my stuff :)
+
+Michael
+-------
+Comparing the dhrystone code vs Hitech C v7.50
+
+cp:
+ ld hl,__r
+ ld (_Next_Ptr_Glob),hl
+vs:
+ ld hl,#__r
+ ld iy,#_Next_Ptr_Glob
+ ld 0(iy),l
+ ld 1(iy),h
+
+cp:
+ ld a,#<__r
+ add a,#0x27
+ ld iy,#_Ptr_Glob
+ ld 0(iy),a
+ ld a,#>__r
+ adc a,#0x00
+ ld 1(iy),a
+vs:
+ ld hl,__r+027h
+ ld (_Ptr_Glob),hl
+
+cp:
+ ld iy,#_Next_Ptr_Glob
+ ld a,0(iy)
+ ld (hl),a
+ inc hl
+ ld a,1(iy)
+ ld (hl),a
+
+vs:
+ ld bc,(_Next_Ptr_Glob)
+ ld hl,(_Ptr_Glob)
+ ld (hl),c
+ inc hl
+ ld (hl),b
+
+
+cp:
+ ld bc,(_Ptr_Glob)
+ ld l,c
+ ld h,b
+ inc hl
+ inc hl
+ ld (hl),#0x00
+ inc hl
+ ld (hl),#0x00
+vs:
+ ld iy,(_Ptr_Glob)
+ ld (iy+2),0
+ ld (iy+3),0
+
+
+strcpy is inlined as:
+u12:
+ ld a,(hl)
+ ldi
+ or a
+ jp nz,u12
+
+cp:
+ ld a,#<_Arr_2_Glob
+ add a,#0x2E
+ ld -80(ix),a
+ ld a,#>_Arr_2_Glob
+ adc a,#0x03
+ ld -79(ix),a
+; genAssign (pointer)
+; AOP_STK for _main_sloc1_1_0
+ ld l,-80(ix)
+ ld h,-79(ix)
+ ld (hl),#0x0A
+ inc hl
+ ld (hl),#0x00
+vs:
+ ld hl,0Ah
+ ld (_Arr_2_Glob+032Eh),hl
+
+cp:
+ ld a,-72(ix)
+ or a,a
+ jp nz,00126$
+ ld a,-71(ix)
+ and a,#0x03
+; Rule 4: Changed jp order
+ jp z,00127$
+00126$:
+ jp 00102$
+00127$:
+
+vs:
+ ld (ix+-7),c
+ ld (ix+-6),b
+ ld a,c
+ ld l,a
+ ld a,b
+ and 03h
+ ld h,a
+ ld a,l
+ or h
+ jp nz,l12
+
+cp:
+ ld a,-82(ix)
+ or a,-81(ix)
+ sub a,#0x01
+ ld a,#0x00
+ rla
+ ld iy,#_Bool_Glob
+ ld 0(iy),a
+ ld 1(iy),#0x00
+
+vs:
+ ld a,l
+ or h
+ ld hl,01h
+ jp z,u42
+ dec hl
+u42:
+ ld (_Bool_Glob),hl
+
+;C:\TEMP\DHRY.C: 173: Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc;
+is turned into:
+ ld l,(ix+-13)
+ ld h,(ix+-12)
+ ld d,h
+ ld e,l
+ add hl,hl
+ add hl,hl
+ add hl,de
+
+Comapring two types of cmpeq:
+ ld a,c ; 4
+ cp a,#0xFB ; 7
+ jp nz,00119$ ; 10
+ ld a,b ; 4
+ cp a,#0xFF ; 7
+; Rule 5: Changed jump logic
+ jp z,00101$ ; 10
+00119$:
+ ; 21 to 42
+
+vs:
+ ld hl,#val ; 10
+ or a ; 4
+ sbc hl,bc ; 15
+ jp z,... ; 10
+ ; Always 39 - worse
+
+Comaring break even point for shift:
+ ld a,#0x03+1 ; 7
+ jp 00114$ ; 10
+00113$:
+ sra b ; 8
+ rr c ; 8
+00114$:
+ dec a ; 4
+ jp nz,00113$ ; 10
+
+ ; Bytes: 2+3+1+1+1+3 = 11
+ ; t-states = 17+n*30
+vs
+ sra b
+ rr c ...
+ ; Bytes: 2*n
+ ; t-states = 16*n
+
+ Ah, pick 4
\ No newline at end of file
return "RANGE";
case FAR:
return "FAR";
- case _XDATA:
- return "_XDATA";
- case _CODE:
- return "_CODE";
- case _GENERIC:
- return "_GENERIC";
- case _NEAR:
- return "_NEAR";
- case _PDATA:
- return "_PDATA";
- case _IDATA:
- return "_IDATA";
- case _EEPROM:
- return "_EEPROM";
case CASE:
return "CASE";
case DEFAULT:
tlbl1 = newiTempLabel (NULL);
/* Left is already in result - so now do the shift */
- if (shCount <= 2)
+ if (shCount <= 4)
{
while (shCount--)
{
l = aopGet (AOP (left), 0, FALSE);
- emit2 ("or a,a");
-
if (AOP (result)->type == AOP_REG)
{
aopPut (AOP (result), l, 0);
{
movLeft2Result (left, MSB16, result, LSB, sign);
}
- aopPut (AOP (result), "!zero", 1);
+ if (sign)
+ {
+ /* Sign extend the result */
+ _moveA(aopGet (AOP (result), 0, FALSE));
+ emit2 ("rlc a");
+ emit2 ("sbc a,a");
+
+ aopPut (AOP (result), ACC_NAME, MSB16);
+ }
+ else
+ {
+ aopPut (AOP (result), "!zero", 1);
+ }
}
/* 1 <= shCount <= 7 */
else
genrshOne (result, left, shCount, sign);
break;
case 2:
- /* PENDING: sign support */
genrshTwo (result, left, shCount, sign);
break;
case 4:
} by {
ld de,#0x0000
}
+replace restart {
+ ld %1,a
+ ld a,%1
+} by {
+ ld %1,a
+}
# Helper rule for testing the host cc only
test-host:
- $(MAKE) inter-port-clean clean test-port PORT=host
+ $(MAKE) inter-port-clean test-port PORT=host
test-host2:
$(MAKE) test-port PORT=host
--- /dev/null
+/* bug 460000
+ */
+#include <testfwk.h>
+
+int
+func( int a )
+{
+ return a;
+}
+
+int x = -1024;
+
+void
+testByteShift(void)
+{
+ ASSERT(func( x >> 8 ) == -4);
+ ASSERT(func( x / 256 ) == -4);
+}
+
+void
+testOtherSignedShifts(void)
+{
+ volatile int left;
+
+ left = -2345;
+ ASSERT(left >> 3 == (-2345>>3));
+ ASSERT(left >> 8 == (-2345>>8));
+ ASSERT(left >> 9 == (-2345>>9));
+}
+
+void
+testShiftByParam(void)
+{
+ volatile int left, count;
+
+ left = -2345;
+
+ count = 3;
+ ASSERT(left >> count == (-2345>>3));
+ count = 8;
+ ASSERT(left >> count == (-2345>>8));
+ count = 9;
+ ASSERT(left >> count == (-2345>>9));
+}
--- /dev/null
+/* bug 460010
+ */
+#include <testfwk.h>
+
+void
+func( unsigned char a )
+{
+ UNUSED(a);
+}
+
+void
+testBadPromotion(void)
+{
+ unsigned char c=*((unsigned char*)(0xa000));
+
+ func(c);
+
+ c+='0'; /* is evaluated as an 8-bit expr */
+
+ func(c);
+
+ c+='A'-'0'; /* is a 16-bit expr ??? */
+
+ func(c);
+}
projects / fw / sdcc / commitdiff