Changed default documentation dir to share/doc/sdcc

Fixed z80/mul.s and div.s
Minor changes to the regression tests to slowly bring them up.

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@1077 4a8a32a2-be11-0410-ad9d-d568d2c75423

diff --git a/Makefile.common.in b/Makefile.common.in
index fe510cd2cb9d06c870b79388185f18794fa03843..52fa00254ed85bdf01c320221fbfbe90f6c70889 100644 (file)
--- a/Makefile.common.in
+++ b/Makefile.common.in
@@ -32,7 +32,7 @@ man1dir         = $(mandir)/man1
 man2dir         = $(mandir)/man2
 infodir         = @infodir@
 srcdir          = @srcdir@
-docdir          = @exec_prefix@/doc
+docdir          = @datadir@/doc/sdcc
 
 # Modules to enable/disable
 OPT_ENABLE_UCSIM = @OPT_ENABLE_UCSIM@

diff --git a/device/lib/z80/div.s b/device/lib/z80/div.s
index 92d2ee2f81df742ff962ee4453d2b43ec5622a5b..ba07423963682b1e598f42c745b80fbcc7799742 100644 (file)
--- a/device/lib/z80/div.s
+++ b/device/lib/z80/div.s
@@ -99,19 +99,13 @@ __divuchar_rr_s::
         ld      l,(hl)
         
         ;; Fall through
-__divuchar_rr_hds::    
-       push    ix
-       ld      ix,#0
-       add     ix,sp
-
-       ld      c,8(ix)
-       ld      e,9(ix)
+__divuchar_rr_hds::
+        ld      c,l
        call    .divu8
 
        ld      l,c
         ld      h,b
-               
-       pop     ix
+        
        ret
        
 __moduchar_rr_s::       
@@ -124,19 +118,13 @@ __moduchar_rr_s::
         
         ;; Fall through
 __moduchar_rr_hds::
-       push    ix
-       ld      ix,#0
-       add     ix,sp
-
-       ld      c,8(ix)
-       ld      e,9(ix)
+        ld      c,l
        call    .divu8
 
        ld      l,e
         ld      h,d
-               
-       pop     ix
-       ret
+
+        ret
 
 __divuint_rr_s::                
         ld      hl,#2+3

diff --git a/device/lib/z80/mul.s b/device/lib/z80/mul.s
index 92e0ceba34f13775946193b327f8f1ef5d7a4a5d..fa3fb63ebfcebfa43eb9e0686ef39e767a8daa55 100644 (file)
--- a/device/lib/z80/mul.s
+++ b/device/lib/z80/mul.s
@@ -28,6 +28,15 @@ __mulschar_rr_hds::
         jp      .mul16
 
 __muluchar_rr_s::
+        ld      hl,#2
+        add     hl,sp
+
+        ld      e,(hl)
+        inc     hl
+        ld      c,(hl)                
+
+        jp      .mulu16
+        
 __mulsint_rr_s::
 __muluint_rr_s::
         ld      hl,#2
@@ -49,7 +58,6 @@ __mulsint_rr_hds::
 __muluint_rr_hds::
        ;; Parameters:
        ;;      HL, DE (left, right irrelivent)
-       ;; Must preserve BC
        ld      b,h
        ld      c,l
        

diff --git a/support/regression/Makefile b/support/regression/Makefile
index 1b3e6d5de2249e6db10ee10fed4df583d6c57f59..6f3d751fa0b875e17c073c827c37b2437cedb7ea 100644 (file)
--- a/support/regression/Makefile
+++ b/support/regression/Makefile
@@ -37,10 +37,11 @@
 
 # Uncomment this to show only errors and the summary.
 # Comment this out for debugging.
-.SILENT:
+#.SILENT:
 
 # All original tests live in TESTS_DIR and below
-TESTS_DIR = tests
+TESTS_DIR = tests-min
+TESTS_NAME = $(TESTS_DIR)
 # All suite results go in RESULTS_DIR
 RESULTS_DIR = results
 # All data relating to supported ports live in their own directory
@@ -117,11 +118,11 @@ SDCCFLAGS += -Ifwk/include
 # Rule to generate the iterations of a test suite off the soure suite.
 $(PORT_CASES_DIR)/%$(DIREXT): $(TESTS_DIR)/%.c $(GENERATE_CASES)
        echo Processing $<
-       rm -rf $(CASES_DIR)/tests
-       mkdir -p $(CASES_DIR)/tests
+       rm -rf $(CASES_DIR)/$(TESTS_NAME)
+       mkdir -p $(CASES_DIR)/$(TESTS_NAME)
        mkdir -p $@
        python $(GENERATE_CASES) $< > /dev/null
-       cp $(CASES_DIR)/tests/*.c $@
+       cp $(CASES_DIR)/$(TESTS_NAME)/*.c $@
        touch $@
 
 # Rule linking the combined results log to all of the files in the

diff --git a/support/regression/ports/z80/spec.mk b/support/regression/ports/z80/spec.mk
index aafc6f4b6a377c00610e9a213c4dc8a7937123b2..dab2071e7d40e39e147f06503a4b551c912f87bc 100644 (file)
--- a/support/regression/ports/z80/spec.mk
+++ b/support/regression/ports/z80/spec.mk
@@ -1,29 +1,22 @@
 # Port specification for the z80 port running ontop of the Java based
 # 'ConsoleZ80' emulator.
 
-# PENDING: Path to gbdk-lib for stdarg
-GBDK_LIB = ../../../gbdk-lib
 RRZ80 = $(SDCC_EXTRA_DIR)/emu/rrz80/rrz80
 
-SDCCFLAGS += -I$(GBDK_LIB)/include --lesspedantic
+SDCCFLAGS += --lesspedantic
 
 EXEEXT = .bin
 
 # Needs parts of gbdk-lib, namely the internal mul/div/mod functions.
-EXTRAS = fwk/lib/testfwk$(OBJEXT) ports/$(PORT)/support$(OBJEXT) \
-       $(GBDK_LIB)/libc/asm/z80/mul$(OBJEXT) \
-       $(GBDK_LIB)/libc/asm/z80/div$(OBJEXT)
+EXTRAS = fwk/lib/testfwk$(OBJEXT) ports/$(PORT)/support$(OBJEXT)
 
 # Rule to generate a Emulator .bin file from the .ihx linker output.
 %$(EXEEXT): %.ihx
        ../makebin/makebin -s 32768 < $< > $@  # Must be 32768 due to a bug in ConsoleZ80
 
 # Rule to link into .ihx
-%.ihx: %$(OBJEXT) $(EXTRAS)
-       ../../bin/link-z80 -n -- -b_CODE=0x200 -b_DATA=0x8000 -j -i $@ $< $(EXTRAS)
-
-%$(OBJEXT): %.c fwk/include/*.h
-       $(SDCC) $(SDCCFLAGS) -c $<
+%.ihx: %.c $(EXTRAS)
+       $(SDCC) $(SDCCFLAGS) $< $(EXTRAS)
 
 %$(OBJEXT): %.asm
        ../../bin/as-z80 -plosgff $@ $<

diff --git a/support/regression/ports/z80/support.asm b/support/regression/ports/z80/support.asm
index 2686711ae96e2f69eca88c5745b323b2cb0ef0d3..4c4c35ada29dde3abe2b9348a7fbf1da637ac06e 100644 (file)
--- a/support/regression/ports/z80/support.asm
+++ b/support/regression/ports/z80/support.asm
@@ -1,42 +1,5 @@
-       ;; ****************************************
-        ;; Minimal crt0 and support functions for the sdcc test suite.
-       ;; Beginning of module
-       .title  "Test runtime"
-       .module Runtime
-
-        .globl _main
-        .STACK = 0xE000
-
-               .area   _INIT (ABS)
-        .org    0x0
-        jp      0x100
-                                
-               .org    0x100
-__init::
-       ;; Beginning of the code
-       DI                      ; Disable interrupts
-       LD      SP,#.STACK
-       ;; Call the main function
-       CALL    _main
-        ld      a, #0
-        rst     8
+        .area   _CODE
+        .globl  _putchar
 
 __putchar::
-        ld      a,#1
-        rst     #8
-        ret
-
-        ;; Segment order
-        .org    0x200
-       .area _HOME
-        .area _CODE
-       .area _OVERLAY
-       .area _ISEG
-       .area _BSEG
-       .area _XSEG
-       .area _GSINIT
-       .area _GSFINAL
-       .area _GSINIT
-       .area _CODE
-
-       .area _DATA
+        jp      _putchar

diff --git a/support/regression/tests/muldiv.c b/support/regression/tests/muldiv.c
index 354501dc695f43be3e49e2de9474e9c48e63a356..c1bb3e513aa0fc193bde7228ac4a60208e88e80c 100644 (file)
--- a/support/regression/tests/muldiv.c
+++ b/support/regression/tests/muldiv.c
@@ -1,16 +1,53 @@
 /** Simple test for the mul/div/mod operations.
 
-    type: int, signed char, short
+    type: int, char, short
     storage: static,
     attr: volatile,
 */
 #include <testfwk.h>
 
+static void
+testUnsignedModDiv(void)
+{
+    {attr} {storage} unsigned {type} i;
+    unsigned {type} result;
+
+    i = 100;
+
+    result = i/3;
+    ASSERT(result == 33);
+
+    result = i/12;
+    ASSERT(result == 8);
+
+    result = i%7;
+    ASSERT(result == 2);
+
+    result = i%34;
+    ASSERT(result == 32);
+}
+
+static void
+testUnsignedMul(void)
+{
+    {attr} {storage} unsigned {type} i;
+    unsigned {type} result;
+
+    i = 37;
+
+    LOG(("i*3 == 111 = %u\n", i*3));
+    result = i*3;
+    ASSERT(result == 111);
+
+    result = i*12;
+    ASSERT(result == (({type})444));
+}
+
 static void
 testMul(void)
 {
-    {attr} {storage} {type} i;
-    {type} result;
+    {attr} {storage} signed {type} i;
+    signed {type} result;
 
     i = 5;
 
@@ -32,7 +69,7 @@ testMul(void)
 static void
 testDiv(void)
 {
-    {attr} {storage} {type} i;
+    {attr} {storage} signed {type} i;
 
     i = 100;
     LOG(("i/5 == 20 = %u\n", (int)i/5));
@@ -50,7 +87,7 @@ testDiv(void)
 static void
 testMod(void)
 {
-    {attr} {storage} {type} i;
+    {attr} {storage} signed {type} i;
 
     // Disabled the LOG functions due to a bug in sdcc involving
     // vaargs.