* sim/ucsim/cmd.src/cmdmem.cc, sim/ucsim/cmd.src/mem.cc:

  corrected handling of the highest_valid_address

git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@4974 4a8a32a2-be11-0410-ad9d-d568d2c75423

diff --git a/ChangeLog b/ChangeLog
index 01d654a4d8f53a358c842db2708d4bb9bcb23540..bc017136e83544819b7b3885aa3f72834df73838 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2007-12-01 Borut Razem <borut.razem AT siol.net>
+
+       * sim/ucsim/cmd.src/cmdmem.cc, sim/ucsim/cmd.src/mem.cc:
+         corrected handling of the highest_valid_address
+
 2007-11-17 Raphael Neider <rneider AT web.de>
 
        * src/pic/main.c (_asmCmd): include debug arguments (-g as $3)

diff --git a/sim/ucsim/cmd.src/cmdmem.cc b/sim/ucsim/cmd.src/cmdmem.cc
index 3aafc9a180101ac81bf6567feb7eb69144ced02b..b2cdcaa7e3e65e43d7075d361207be13dded0abd 100644 (file)
--- a/sim/ucsim/cmd.src/cmdmem.cc
+++ b/sim/ucsim/cmd.src/cmdmem.cc
@@ -2,7 +2,7 @@
  * Simulator of microcontrollers (cmd.src/cmdmem.cc)
  *
  * Copyright (C) 2001,01 Drotos Daniel, Talker Bt.
- * 
+ *
  * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
  *
  */
@@ -151,7 +151,7 @@ COMMAND_DO_WORK_UC(cl_memory_createaddressdecoder_cmd)
                                  cmdline->param(4) };
   class cl_memory *as= 0, *chip= 0;
   t_addr as_begin= 0, as_end= 0, chip_begin= 0;
-  
+
   if (cmdline->syntax_match(uc, MEMORY MEMORY)) {
     as= params[0]->value.memory.memory;
     as_end= as->highest_valid_address();
@@ -201,7 +201,7 @@ COMMAND_DO_WORK_UC(cl_memory_createaddressdecoder_cmd)
   else if (chip_begin >= chip->get_size())
     con->dd_printf("Wrong chip area specification\n");
   else if (as_begin < as->start_address ||
-           as_end >= as->highest_valid_address())
+           as_end > as->highest_valid_address())
     con->dd_printf("Specified area is out of address space\n");
   else if (as_end-as_begin > chip->get_size()-chip_begin)
     con->dd_printf("Specified area is out of chip size\n");

diff --git a/sim/ucsim/sim.src/mem.cc b/sim/ucsim/sim.src/mem.cc
index b0bc0d4146d927a0b5ce7054a4667c3d913580b1..a3508cfe88964547d7ed5518231074b6ed71a71d 100644 (file)
--- a/sim/ucsim/sim.src/mem.cc
+++ b/sim/ucsim/sim.src/mem.cc
@@ -2,27 +2,27 @@
  * Simulator of microcontrollers (mem.cc)
  *
  * Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
- * 
+ *
  * To contact author send email to drdani@mazsola.iit.uni-miskolc.hu
  *
  */
 
-/* 
+/*
    This file is part of microcontroller simulator: ucsim.
-    
+
    UCSIM is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
-   
+
    UCSIM is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
-   
+
    You should have received a copy of the GNU General Public License
    along with UCSIM; see the file COPYING.  If not, write to the Free
-   Software Foundation, 59 Temple Place - Suite 330, Boston, MA 
+   Software Foundation, 59 Temple Place - Suite 330, Boston, MA
    02111-1307, USA.
 */
 /*@1@*/
@@ -175,12 +175,12 @@ cl_memory::dump(t_addr start, t_addr stop, int bpl, class cl_console_base *con)
   if (stop > hva)
     stop= hva;
   while ((start <= stop) &&
-         (start < hva))
+         (start <= hva))
     {
       con->dd_printf(addr_format, start); con->dd_printf(" ");
       for (i= 0;
            (i < bpl) &&
-             (start+i < hva) &&
+             (start+i <= hva) &&
              (start+i <= stop);
            i++)
         {
@@ -198,7 +198,7 @@ cl_memory::dump(t_addr start, t_addr stop, int bpl, class cl_console_base *con)
           i++;
         }
       for (i= 0; (i < bpl) &&
-             (start+i < hva) &&
+             (start+i <= hva) &&
              (start+i <= stop);
            i++)
         {
@@ -236,7 +236,7 @@ cl_memory::search_next(bool case_sensitive,
     a= 0;
   else
     a= *addr;
-  
+
   if (a+len > size)
     return(DD_FALSE);
 
@@ -361,7 +361,7 @@ cl_hw_operator::read(enum hw_cath skip)
   if (next_operator)
     next_operator->read();
 
-  return(d);  
+  return(d);
 }
 
 t_mem
@@ -538,9 +538,9 @@ cl_memory_cell::read(enum hw_cath skip)
     return(operators->read(skip));
   return(*data);
 }
- 
+
 t_mem
-cl_memory_cell::get(void) 
+cl_memory_cell::get(void)
 {
   return(*data);
 }
@@ -717,7 +717,7 @@ cl_address_space::~cl_address_space(void)
   delete dummy;
 }
 
-  
+
 t_mem
 cl_address_space::read(t_addr addr)
 {
@@ -997,7 +997,7 @@ cl_address_space::set_brk(t_addr addr, class cl_brk *brk)
     default:
       //e= '.';
       op= 0;
-      break;  
+      break;
     }
   if (op)
     cell->append_operator(op);
@@ -1255,7 +1255,7 @@ bool
 cl_address_decoder::shrink_out_of(t_addr begin, t_addr end)
 {
   t_addr a= as_begin;
-  
+
   if (!address_space)
     return(DD_TRUE);
   if (begin > a)

diff --git a/support/regression/tests/bug-1817005.c b/support/regression/tests/bug-1817005.c
new file mode 100644 (file)
index 0000000..7d80f48
--- /dev/null
+++ b/support/regression/tests/bug-1817005.c
@@ -0,0 +1,19 @@
+/* bug-1817005.c
+ */
+
+#include <testfwk.h>
+
+/* this is an assemble time test, so it doesn't have to be executed */
+
+int
+function_with_really_long_name(void)
+{
+  return 0;
+}
+
+/* dummy test function */
+
+void
+testDummy(void)
+{
+}

diff --git a/support/regression/tests/test-1817005.c b/support/regression/tests/test-1817005.c
deleted file mode 100644 (file)
index 7d80f48..0000000
--- a/support/regression/tests/test-1817005.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* bug-1817005.c
- */
-
-#include <testfwk.h>
-
-/* this is an assemble time test, so it doesn't have to be executed */
-
-int
-function_with_really_long_name(void)
-{
-  return 0;
-}
-
-/* dummy test function */
-
-void
-testDummy(void)
-{
-}