Fixed up support for the gbz80 such that it will at least run (and fail badly) the...
authormichaelh <michaelh@4a8a32a2-be11-0410-ad9d-d568d2c75423>
Fri, 31 Aug 2001 04:43:12 +0000 (04:43 +0000)
committermichaelh <michaelh@4a8a32a2-be11-0410-ad9d-d568d2c75423>
Fri, 31 Aug 2001 04:43:12 +0000 (04:43 +0000)
git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@1198 4a8a32a2-be11-0410-ad9d-d568d2c75423

14 files changed:
ChangeLog
device/include/asm/gbz80/features.h
device/lib/gbz80/Makefile
device/lib/gbz80/crt0.s
device/lib/gbz80/div.s
device/lib/gbz80/mul.s
device/lib/gbz80/putchar.s
device/lib/gbz80/shift.s [new file with mode: 0644]
device/lib/gbz80/stubs.s [new file with mode: 0644]
device/lib/z80/crt0.s
src/z80/main.c
support/regression/Makefile
support/regression/ports/gbz80/spec.mk [new file with mode: 0644]
support/regression/ports/gbz80/support.asm [new file with mode: 0644]

index ca6d22ecc3f32a89f45f24cb2fc62a43b3b32347..d898cf48fd62757145d700d232e027464fe135b7 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,7 @@
 2001-08-30  Michael Hope  <michaelh@juju.net.nz>
 
+       * device/lib/gbz80/crt0.s (init): Fixed up support for the gbz80 such that it will at least run (and fail badly) the regression tests.
+
        * src/z80/gen.c (genPlus): Changed bad long add for gb to a fall through.
 
 2001-08-29  Michael Hope  <michaelh@juju.net.nz>
index 8abaeb3fa84bbdbcb743cbe10e9c2edddc7d117f..28866ec106a089d9ec4c815da1fd9a1f53a0b899 100644 (file)
@@ -1,9 +1,19 @@
-/** GBZ80 specific features.
+/** Z80 specific features.
  */
-#ifndef __SDC51_ASM_GBZ80_FEATURES_H
-#define __SDC51_ASM_GBZ80_FEATURES_H   1
+#ifndef __SDC51_ASM_Z80_FEATURES_H
+#define __SDC51_ASM_Z80_FEATURES_H   1
 
 #define _REENTRANT
 #define _CODE
 
+#define _SDCC_MANGLES_SUPPORT_FUNS     1
+#define _SDCC_Z80_STYLE_LIB_OPT                1
+
+/* The following are disabled to make the dhrystone test more authentic.
+ */
+#define _SDCC_PORT_PROVIDES_MEMCPY     1
+#define _SDCC_PORT_PROVIDES_STRCMP     1
+/* Register allocator is as good as hand coded asm.  Cool. */
+#define _SDCC_PORT_PROVIDES_STRCPY     0
+
 #endif
index 906a06a33633cde650b64d18e1f767bbaaaa3403..b76118383d167c53408efa8d88510956a6dbb445 100644 (file)
@@ -5,7 +5,7 @@ TOPDIR = ../../..
 SCC = $(TOPDIR)/bin/sdcc -mgbz80
 SAS = $(TOPDIR)/bin/as-gbz80
 
-OBJ = putchar.o string.o printf.o div.o mul.o asm_strings.o
+OBJ = putchar.o string.o printf.o div.o mul.o stubs.o shift.o
 LIB = gbz80.lib
 CC = $(SCC)
 AS = $(SAS)
index eb015280ea44f56e557bfb86031dcc953691831e..f4674b6d4f056b327f5da2a7499e531b51912423 100644 (file)
@@ -1,5 +1,5 @@
-       ;; Generic crt0.s for a Z80
-       .globl  __main
+       ;; Generic crt0.s for a GBZ80
+       .globl  _main
 
        .area _HEADER (ABS)
        ;; Reset vector
@@ -31,32 +31,33 @@ init:
        ld      sp,#0xdfff        
 
        ;; Use _main instead of main to bypass sdcc's intelligence
-       call    __main
+       call    _main
        jp      _exit
 
        ;; Ordering of segments for the linker.
        .area   _CODE
+        .area   _GSINIT
+        .area   _GSFINAL
+        
        .area   _DATA
+        .area   _BSS
 
+        .area   _CODE
 __clock::
        ld      a,#2
-       rst     0x00
+       rst     0x08
        ret
        
-_getsp::
-       ld      hl,#0
-       add     hl,sp
-       ret
-
-__printTStates::       
-       ld      a,#3
-       rst     0x00
-       ret
-               
 _exit::
        ;; Exit - special code to the emulator
-       ld      a,#1
-       rst     0x00
+       ld      a,#0
+       rst     0x08
 1$:
        halt
        jr      1$
+
+        .area   _GSINIT
+gsinit::       
+
+        .area   _GSFINAL
+        ret
index 9dd447f3ce6c648de3404c6a66798af8b6296f4b..aaa82c28f93d865ac2ef98839091834aca62cef3 100644 (file)
        ;; Originally from GBDK by Pascal Felber.
        .area   _CODE
 
-__divschar::
-       push    bc
-       lda     hl,4(sp)
-       
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
-       call    .div8
+__divschar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__divschar_rrx_hds::
+        ld      c,l
+        
+        call    .div8
 
-       ld      e,c
-       pop     bc
+       ld      l,c
+        ld      h,b
+               
        ret
        
-__modschar::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
-       call    .div8
+__modschar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__modschar_rrx_hds::
+        ld      c,l
+
+               call    .div8
 
-       ;;  Result in e
-       pop     bc
+       ld      l,e
+        ld      h,d
+               
        ret
 
-__divsint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
-       call    .div16
+__divsint_rrx_s::        
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+        
+        ;; Fall through
+__divsint_rrx_hds::
+       ld      b,h
+       ld      c,l
 
-       ld      e,c
-       ld      d,b
+       call    .div16
 
-       pop     bc
+       ld      l,c
+       ld      h,b
+       
        ret
        
-__modsint::
-       push    bc
-       lda     hl,4(sp)
+__modsint_rrx_s::
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ;; Fall through
+__modsint_rrx_hds::
+       ld      b,h
+       ld      c,l
 
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
        call    .div16
 
-       ;; Result in de
-       pop     bc
+       ld      l,e
+       ld      h,d
+       
        ret
 
        ;; Unsigned
-__divuchar::   
-       push    bc
-       lda     hl,4(sp)
-       
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
+__divuchar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__divuchar_rrx_hds::
+        ld      c,l
        call    .divu8
 
-       ld      e,c
-       
-       pop     bc
+       ld      l,c
+        ld      h,b
+        
        ret
        
-__moduchar::
-       push    bc
-       lda     hl,4(sp)
-       
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
+__moduchar_rrx_s::       
+        ld      hl,#2+1
+        add     hl,sp
+        
+        ld      e,(hl)
+        dec     hl
+        ld      l,(hl)
+        
+        ;; Fall through
+__moduchar_rrx_hds::
+        ld      c,l
        call    .divu8
 
-       ;; Result in e
-       pop     bc
-       ret
+       ld      l,e
+        ld      h,d
+
+        ret
 
-__divuint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
+__divuint_rrx_s::                
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ;; Fall through
+__divuint_rrx_hds::
+       ld      b,h
+       ld      c,l
        call    .divu16
 
-       ld      e,c
-       ld      d,b
+       ld      l,c
+       ld      h,b
        
-       pop     bc
        ret
        
-__moduint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
+__moduint_rrx_s::                
+        ld      hl,#2+3
+        add     hl,sp
+        
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+        ;; Fall through
+        
+__moduint_rrx_hds::
+       ld      b,h
+       ld      c,l
+
        call    .divu16
 
-       ;; Result in de
-       pop     bc
+       ld      l,e
+       ld      h,d
+       
        ret
        
 .div8::
index 71edced1b91a96c27557aa26c4b59b3bdb71c97b..9762a4016afa60c00623195f083789ea1cdf756f 100644 (file)
@@ -1,42 +1,71 @@
        ;; Originally from GBDK by Pascal Felber.
        
        .area   _CODE
-__mulschar::   
-__muluchar::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      e,(hl)
-       call    .mulu8
 
-       ld      e,l
-       pop     bc
-       ret
+__mulschar_rrx_s::
+        ld      hl,#2
+        add     hl,sp
 
-__mulsint::
-__muluint::
-       push    bc
-       lda     hl,4(sp)
-       ld      c,(hl)
-       inc     hl
-       ld      b,(hl)
-       inc     hl
-       ld      e,(hl)
-       inc     hl
-       ld      d,(hl)
-       call    .mulu16
+        ld      e,(hl)
+        inc     hl
+        ld      l,(hl)                
 
-       ld      e,l
-       ld      d,h
-       pop     bc
-       ret     
-               
-.mul8:
-.mulu8:
-       LD      B,#0x00         ; Sign extend is not necessary with mul
-       LD      D,B
-       ; Fall through
+        ;; Fall through
+__mulschar_rrx_hds::
+        ;; Need to sign extend before going in.
+        ld      c,l
+        
+        ld      a,l
+        rla
+        sbc     a,a
+        ld      b,a
+
+        ld      a,e
+        rla
+        sbc     a,a
+        ld      d,a
+
+        jp      .mul16
+
+__muluchar_rrx_s::
+        ld      hl,#2
+        add     hl,sp
+
+        ld      e,(hl)
+
+        inc     hl
+        ld      c,(hl)                
+
+        ;; Clear the top
+        xor     a
+        ld      d,a
+        ld      b,a
+        
+        jp      .mulu16
+        
+__mulsint_rrx_s::
+__muluint_rrx_s::
+        ld      hl,#2
+        add     hl,sp
+        
+        ld      e,(hl)
+        inc     hl
+        ld      d,(hl)
+        inc     hl
+        ld      a,(hl)
+        inc     hl
+        ld      h,(hl)
+        ld      l,a
+
+        ;; Fall through
+        
+__muluchar_rrx_hds::
+__mulsint_rrx_hds::
+__muluint_rrx_hds::
+       ;; Parameters:
+       ;;      HL, DE (left, right irrelivent)
+       ld      b,h
+       ld      c,l
        
        ;; 16-bit multiplication
        ;; 
@@ -48,26 +77,29 @@ __muluint::
        ;;   DE = less significant word of product
        ;;
        ;; Register used: AF,BC,DE,HL
-.mul16::       
-.mulu16::      
-       LD      HL,#0x00        ; Product = 0
-       LD      A,#15           ; Count = bit length - 1
-       ;; Shift-and-add algorithm
-       ;; If MSB of multiplier is 1, add multiplicand to partial product
-       ;; Shift partial product, multiplier left 1 bit
-.mlp:
-       SLA     E               ; Shift multiplier left 1 bit
-       RL      D
-       JR      NC,.mlp1        ; Jump if MSB of multiplier = 0
-       ADD     HL,BC           ; Add multiplicand to partial product
-.mlp1:
-       ADD     HL,HL           ; Shift partial product left
-       DEC     A
-       JR      NZ,.mlp         ; Continue until count = 0
-       ;; Add multiplicand one last time if MSB of multiplier is 1
-       BIT     7,D             ; Get MSB of multiplier
-       JR      Z,.mend         ; Exit if MSB of multiplier is 0
-       ADD     HL,BC           ; Add multiplicand to product
-.mend:
-       RET                     ; HL = result
+.mul16:
+.mulu16:
+        ld      hl,#0
+        ld      a,b
+        ; ld c,c
+        ld      b,#16
 
+        ;; Optimise for the case when this side has 8 bits of data or
+        ;; less.  This is often the case with support address calls.
+        or      a
+        jp      nz,1$
+        
+        ld      b,#8
+        ld      a,c
+1$:
+        ;; Taken from z88dk, which originally borrowed from the
+        ;; Spectrum rom.
+        add     hl,hl
+        rl      c
+        rla                     ;DLE 27/11/98
+        jr      nc,2$
+        add     hl,de
+2$:
+        dec     b
+        jr      nz,1$
+        ret
index 509d8aa6c9639f7ae87b591f2a9181ce8da12d55..4b43a6159e621fd252f9ac91669a336b73a2c26e 100644 (file)
@@ -1,22 +1,18 @@
        .area _CODE
-_putchar::
-       lda     hl,2(sp)
-       ld      l,(hl)
-       ld      a,#0
-       rst     0x00
-       ret
-       
-.if 0
-_putchar::
-       push    ix
-       ld      ix,#0
-       add     ix,sp
+_putchar::       
+_putchar_rr_s:: 
+        ld      hl,#2
+        add     hl,sp
+        
+        ld      l,(hl)
+        ld      a,#1
+        rst     0x08
+        
+        ret
+           
+_putchar_rr_dbs::
+        ld      l,e
+       ld      a,#1
+        rst     0x08
 
-       ld      l,4(ix)
-       ld      a,#0
-       out     (0xff),a
-
-       pop     ix
-       ret
-.endif
-                       
+        ret
diff --git a/device/lib/gbz80/shift.s b/device/lib/gbz80/shift.s
new file mode 100644 (file)
index 0000000..f09de38
--- /dev/null
@@ -0,0 +1,85 @@
+        ;;
+__rrulong_rrx_s::                
+        ld      hl,#2+4
+        add     hl,sp
+                
+        ld      c,(hl)
+        dec     hl
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ld      a,c
+1$:
+        or      a,a
+        ret     z
+
+        rr      d
+        rr      e
+        rr      h
+        rr      l
+
+        dec     a
+        jp      1$
+
+__rrslong_rrx_s::        
+        ld      hl,#2+4
+        add     hl,sp
+                
+        ld      c,(hl)
+        dec     hl
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ld      a,c
+1$:
+        or      a,a
+        ret     z
+
+        sra     d
+        rr      e
+        rr      h
+        rr      l
+
+        dec     a
+        jp      1$
+        
+__rlslong_rrx_s::                
+__rlulong_rrx_s::                
+        ld      hl,#2+4
+        add     hl,sp
+        
+        ld      c,(hl)
+        dec     hl
+        ld      d,(hl)
+        dec     hl
+        ld      e,(hl)
+        dec     hl
+        ld      a,(hl)
+        dec     hl
+        ld      l,(hl)
+        ld      h,a
+
+        ld      a,c
+1$:
+        or      a,a
+        ret     z
+
+        rl      l
+        rl      h
+        rl      e
+        rl      d
+
+        dec     a        
+        jp      1$
diff --git a/device/lib/gbz80/stubs.s b/device/lib/gbz80/stubs.s
new file mode 100644 (file)
index 0000000..7ef8a2c
--- /dev/null
@@ -0,0 +1,129 @@
+        ;; Stubs to match between function names
+        .area _CODE
+
+        .globl  __mulslong
+        .globl  __mululong
+        .globl  __modslong
+        .globl  __modulong
+        .globl  __divslong
+        .globl  __divulong
+        .globl __divschar_rrx_s
+        .globl __divsint_rrx_s
+        .globl __divuchar_rrx_s
+        .globl __divuint_rrx_s
+        .globl __mulschar_rrx_s
+        .globl __mulsint_rrx_s
+        .globl __muluchar_rrx_s
+        .globl __muluint_rrx_s
+        .globl  __moduchar_rrx_s
+        .globl  __modschar_rrx_s
+        .globl  __moduint_rrx_s
+        .globl  __modsint_rrx_s
+        .globl __rrulong_rrx_s
+        .globl __rrslong_rrx_s
+        .globl __rlulong_rrx_s
+        .globl __rlslong_rrx_s
+        
+__mulslong_rrx_s::        
+__mulslong_rrf_s::        
+        jp      __mulslong
+
+__mululong_rrx_s::       
+__mululong_rrf_s::       
+        jp      __mululong
+        
+__modslong_rrx_s::
+__modslong_rrf_s::
+        jp      __modslong
+        
+__modulong_rrx_s::
+__modulong_rrf_s::
+        jp      __modulong
+        
+__divslong_rrx_s::
+__divslong_rrf_s::
+        jp      __divslong
+        
+__divulong_rrx_s::
+__divulong_rrf_s::
+        jp      __divulong
+
+__mulsint_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __mulsint_rrx_s
+
+__divsint_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __divsint_rrx_s
+
+__muluint_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __muluint_rrx_s
+
+__divuint_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __divuint_rrx_s
+
+__mulschar_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __mulschar_rrx_s
+
+__divschar_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __divschar_rrx_s
+
+__muluchar_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __muluchar_rrx_s
+
+__divuchar_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __divuchar_rrx_s
+
+__modschar_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __modschar_rrx_s
+
+__moduchar_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __moduchar_rrx_s
+
+__modsint_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __modsint_rrx_s
+
+__moduint_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __moduint_rrx_s
+
+__rrulong_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __rrulong_rrx_s
+
+__rrslong_rrf_s::
+        ld      a,#5
+        rst     0x08
+        jp     __rrslong_rrx_s
+
+__rlulong_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __rlulong_rrx_s
+
+__rlslong_rrf_s::       
+        ld      a,#5
+        rst     0x08
+        jp     __rlslong_rrx_s
index 23843568f76eec4bf474141185bc912f3c3102cf..d5d68dd829064e767967eeb7c43a0b0cffb97bfb 100644 (file)
@@ -45,16 +45,6 @@ __clock::
         rst     0x08
        ret
        
-_getsp::
-       ld      hl,#0
-       add     hl,sp
-       ret
-
-__printTStates::       
-       ld      a,#3
-       out     (0xff),a
-       ret
-
 _exit::
        ;; Exit - special code to the emulator
        ld      a,#0
index f60636d7503425672f70761478c0fe0d3f1d60a3..777ab9c0cd65b177e306051d37ae80209d8588bd 100644 (file)
@@ -28,6 +28,8 @@ ASM_TYPE;
 static struct
   {
     ASM_TYPE asmType;
+    /* determine if we can register a parameter */    
+    int regParams;
   }
 _G;
 
@@ -57,12 +59,10 @@ _gbz80_init (void)
   z80_opts.sub = SUB_GBZ80;
 }
 
-static int regParmFlg = 0;     /* determine if we can register a parameter */
-
 static void
 _reset_regparm ()
 {
-  regParmFlg = 0;
+  _G.regParams = 0;
 }
 
 static int
@@ -74,13 +74,13 @@ _reg_parm (sym_link * l)
     }
   else 
     {
-      if (regParmFlg == 2)
+      if (_G.regParams == 2)
         {
           return FALSE;
         }
       else
         {
-          regParmFlg++;
+          _G.regParams++;
           return TRUE;
         }
     }
@@ -276,7 +276,15 @@ _setDefaultOptions (void)
   options.noRegParams = 1;
   /* Default code and data locations. */
   options.code_loc = 0x200;
-  options.data_loc = 0x8000;
+
+  if (IS_GB) 
+    {
+      options.data_loc = 0xC000;
+    }
+  else
+    {
+      options.data_loc = 0x8000;
+    }
 
   optimize.global_cse = 1;
   optimize.label1 = 1;
@@ -312,17 +320,10 @@ _mangleSupportFunctionName(char *original)
 {
   char buffer[128];
 
-  if (TARGET_IS_Z80) 
-    {
-      sprintf(buffer, "%s_rr%s_%s", original,
-              options.profile ? "f" : "x",
-              options.noRegParams ? "s" : "bds"
-              );
-    }
-  else 
-    {
-      strcpy(buffer, original);
-    }
+  sprintf(buffer, "%s_rr%s_%s", original,
+          options.profile ? "f" : "x",
+          options.noRegParams ? "s" : "bds"
+          );
 
   return gc_strdup(buffer);
 }
@@ -331,7 +332,9 @@ static const char *
 _getRegName (struct regs *reg)
 {
   if (reg)
-    return reg->name;
+    {
+      return reg->name;
+    }
   assert (0);
   return "err";
 }
@@ -342,6 +345,15 @@ _getRegName (struct regs *reg)
     $l is the list of extra options that should be there somewhere...
     MUST be terminated with a NULL.
 */
+static const char *_z80_asmCmd[] =
+{
+    "as-z80", 
+    "-plosgff", 
+    "$1.o", 
+    "$1.asm", 
+    NULL
+};
+
 static const char *_z80_linkCmd[] =
 {
     "link-z80", 
@@ -360,6 +372,33 @@ static const char *_z80_linkCmd[] =
     NULL
 };
 
+static const char *_gbz80_asmCmd[] =
+{
+    "as-gbz80", 
+    "-plosgff", 
+    "$1.o", 
+    "$1.asm", 
+    NULL
+};
+
+static const char *_gbz80_linkCmd[] =
+{
+    "link-z80", 
+    "-n",                       // Don't echo output
+    "-c",                       // Command line input
+    "--",                       // Again, command line input...
+    "-b_CODE=0x200",            // Code starts at 0x200
+    "-b_DATA=0xC000",           // RAM starts at 0xC000
+    "-j",                       // Output a symbol file as well
+    "-k" SDCC_LIB_DIR "/gbz80", // Library path
+    "-lgbz80.lib",              // Library to use
+    "-z",                       // Output Gameboy image
+    "$1.gb",                    // Output to
+    SDCC_LIB_DIR "/gbz80/crt0.o",// Link in crt0 first
+    "$1.o",                     // Actual code
+    NULL
+};
+
 /* sprintf that appends to the string. */
 static void
 _saprintf(char *pinto, const char *format, ...)
@@ -372,20 +411,21 @@ _saprintf(char *pinto, const char *format, ...)
 }
 
 static void
-_z80_link(void)
+_link(const char *portName, const char *portExt, const char *portOutputType)
 {
     int i;
     // PENDING
     char buffer[2048];
 
     sprintf(buffer, 
-            "link-z80 "
+            "link-%s "
             "-n "                       // Don't echo output
             "-c "                       // Command line input
             "-- "                       // Again, command line input...
             "-b_CODE=0x%04X "           // Code starts at 0x200
             "-b_DATA=0x%04X "           // RAM starts at 0x8000
             "-j ",                      // Output a symbol file as well
+            portName,
             options.code_loc,
             options.data_loc
             );
@@ -393,8 +433,9 @@ _z80_link(void)
     // Add the standard lib in.
     if (options.nostdlib == FALSE) {
         _saprintf(buffer,
-                  "-k" SDCC_LIB_DIR "/z80 "   // Library path
-                  "-lz80.lib "                // Library to use
+                  "-k" SDCC_LIB_DIR "/%s "    // Library path
+                  "-l%s.lib ",                // Library to use
+                  portName, portName
                   );
     }
 
@@ -407,14 +448,15 @@ _z80_link(void)
     }
 
     _saprintf(buffer,
-              "-i "                       // Output Intel IHX
-              "%s.ihx ",                  // Output to
-              srcFileName
+              "-%s "                      // Output type
+              "%s.%s ",                   // Output to
+              portOutputType, srcFileName, portExt
               );
 
     if (options.nostdlib == FALSE) {
         _saprintf(buffer, 
-                  SDCC_LIB_DIR "/z80/crt0.o " // Link in crt0 first
+                  SDCC_LIB_DIR "/%s/crt0.o ", // Link in crt0 first
+                  portName
                   );
     }
 
@@ -434,27 +476,17 @@ _z80_link(void)
     }
 }
 
-static const char *_z80_asmCmd[] =
-{
-    "as-z80", "-plosgff", "$1.o", "$1.asm", NULL
-};
-
-/** $1 is always the basename.
-    $2 is always the output file.
-    $3 varies
-    $l is the list of extra options that should be there somewhere...
-    MUST be terminated with a NULL.
-*/
-static const char *_gbz80_linkCmd[] =
+static void
+_z80_link(void)
 {
-    // PENDING
-    "link-gbz80", "-nf", "$1", NULL
-};
+  _link("z80", "ihx", "i");
+}
 
-static const char *_gbz80_asmCmd[] =
+static void
+_gbz80_link(void)
 {
-    "as-gbz80", "-plosgff", "$1.o", "$1.asm", NULL
-};
+  _link("gbz80", "gb", "z");
+}
 
 /* Globals */
 PORT z80_port =
@@ -550,20 +582,20 @@ PORT gbz80_port =
     _gbz80_asmCmd,
     "-plosgff",                        /* Options with debug */
     "-plosgff",                        /* Options without debug */
-    1,
+    0,
     ".asm"
   },
   {
     _gbz80_linkCmd,
-    NULL,
+    _gbz80_link,
     ".o"
   },
   {
     _gbz80_defaultRules
   },
   {
-       /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
-    1, 1, 2, 4, 2, 2, 2, 1, 4, 4
+    /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
+    1, 2, 2, 4, 2, 2, 2, 1, 4, 4
   },
   {
     "XSEG",
@@ -602,7 +634,7 @@ PORT gbz80_port =
   _reset_regparm,
   _reg_parm,
   _process_pragma,
-  NULL,
+  _mangleSupportFunctionName,
   TRUE,
   0,                           /* leave lt */
   0,                           /* leave gt */
index b320936528734cf9a7a10d96ec9fbac455b8d2c3..b3c692d7457a720563776845e9a79d634dd6d45e 100644 (file)
@@ -61,7 +61,7 @@ GENERATE_CASES = generate-cases.py
 # The port name must be the same as the one used in the SDCC '-mxxx' argument.
 # Each port must have a spec.mk which describes how to build the object
 # files and how to run the emulator.
-ALL_PORTS = $(filter-out CVS mcs51,$(notdir $(wildcard $(PORTS_DIR)/*)))
+ALL_PORTS = $(filter-out CVS mcs51 gbz80,$(notdir $(wildcard $(PORTS_DIR)/*)))
 
 all: test-ports
 
@@ -73,6 +73,10 @@ test-ports:
 test-z80:
        $(MAKE) inter-port-clean test-port PORT=z80
 
+# Helper rule for testing the z80 port only
+test-gbz80:
+       $(MAKE) inter-port-clean test-port PORT=gbz80
+
 # Helper rule for testing the mcs51 small model port only
 test-mcs51:
        $(MAKE) inter-port-clean test-port PORT=mcs51
diff --git a/support/regression/ports/gbz80/spec.mk b/support/regression/ports/gbz80/spec.mk
new file mode 100644 (file)
index 0000000..4646e81
--- /dev/null
@@ -0,0 +1,30 @@
+# Port specification for the gbz80 port.
+
+EMU = $(SDCC_EXTRA_DIR)/emu/rrgb/rrgb
+
+SDCCFLAGS += --lesspedantic -DREENTRANT= -DGENERIC=
+
+EXEEXT = .gb
+
+# Needs parts of gbdk-lib, namely the internal mul/div/mod functions.
+EXTRAS = fwk/lib/testfwk$(OBJEXT) ports/$(PORT)/support$(OBJEXT)
+
+# Rule to link into .ihx
+%.gb: %.c $(EXTRAS)
+       $(SDCC) $(SDCCFLAGS) $< $(EXTRAS)
+
+%$(OBJEXT): %.asm
+       ../../bin/as-gbz80 -plosgff $@ $<
+
+%$(OBJEXT): %.s
+       ../../bin/as-gbz80 -plosgff $@ $<
+
+%$(OBJEXT): %.c
+       $(SDCC) $(SDCCFLAGS) -c $<
+
+# PENDING: Path to sdcc-extra
+%.out: %$(EXEEXT)
+       mkdir -p `dirname $@`
+       $(EMU) -m $< > $@
+       -grep -n FAIL $@ /dev/null || true
+
diff --git a/support/regression/ports/gbz80/support.asm b/support/regression/ports/gbz80/support.asm
new file mode 100644 (file)
index 0000000..01e0ef8
--- /dev/null
@@ -0,0 +1,9 @@
+        .area   _CODE
+        .globl  _putchar
+        .globl  _exit
+
+__putchar::
+        jp      _putchar
+
+__exitEmu::
+        jp      _exit