AVRASM = tavrasm
TEST_OBJ = test_bit.hex test_dis.hex test_mov.hex test_jmp.hex \
- test_arith.hex
+ test_arith.hex test_call.hex
# Compiling entire program or any subproject
virtual int dec_Rd(t_mem code);
virtual int mul_Rd_Rr(t_mem code);
virtual int adiw_Rdl_K(t_mem code);
-
+ virtual int sbiw_Rdl_K(t_mem code);
/* End of avr.src/arith_cl.h */
#include "regsavr.h"
+/*
+ * Compare with Immediate
+ * CPI Rd,K 16<=d<=31, 0<=K<=255
+ * 0011 KKKK dddd KKKK
+ *____________________________________________________________________________
+ */
+
int
cl_avr::cpi_Rd_K(t_mem code)
{
+ t_addr d;
+ t_mem D, K, result, res;
+
+ d= 16+(code&0xf0)>>4;
+ K= (code&0xf) | ((code&0xf00)>>8);
+ D= ram->read(d);
+
+ if (K & 0x80)
+ K|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ t_mem sreg= ram->get(SREG);
+ (signed)result= (signed)D-(signed)K;
+ res= result & 0xff;
+
+ sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C|BIT_Z);
+ if (0x08 & (((~D)&K) | (K&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ if (0x80 & (((~D)&K) | (K&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
+/*
+ * Substract Immediate with Carry
+ * SBCI Rd,K 16<=d<=31, 0<=K<=255
+ * 0100 KKKK dddd KKKK
+ *____________________________________________________________________________
+ */
+
int
cl_avr::sbci_Rd_K(t_mem code)
{
+ t_addr d;
+ t_mem D, K, result, res;
+
+ d= 16+(code&0xf0)>>4;
+ K= (code&0xf) | ((code&0xf00)>>8);
+ D= ram->read(d);
+
+ if (K & 0x80)
+ K|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ t_mem sreg= ram->get(SREG);
+ (signed)result= (signed)D-(signed)K-(sreg&BIT_C)?1:0;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C);
+ if (0x08 & (((~D)&K) | (K&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (res)
+ sreg&= ~BIT_Z;
+ if (0x80 & (((~D)&K) | (K&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
+/*
+ * Substract Immediate
+ * SUBI Rd,K 16<=d<=31, 0<=K<=255
+ * 0101 KKKK dddd KKKK
+ *____________________________________________________________________________
+ */
+
int
cl_avr::subi_Rd_K(t_mem code)
{
+ t_addr d;
+ t_mem D, K, result, res;
+
+ d= 16+(code&0xf0)>>4;
+ K= (code&0xf) | ((code&0xf00)>>8);
+ D= ram->read(d);
+
+ if (K & 0x80)
+ K|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ (signed)result= (signed)D-(signed)K;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ if (0x08 & (((~D)&K) | (K&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~K)&(~res)) | ((~D)&K&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ if (0x80 & (((~D)&K) | (K&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
}
+/*
+ * Compare with Carry
+ * CPC Rd,Rr 0<=d<=31, 0<=r<=31
+ * 0000 01rd dddd rrrr
+ *____________________________________________________________________________
+ */
+
int
cl_avr::cpc_Rd_Rr(t_mem code)
{
+ t_addr r, d;
+ t_mem R, D, result, res;
+
+ d= (code&0x1f0)>>4;
+ r= ((code&0x200)>>5)|(code&0xf);
+ R= ram->read(r);
+ D= ram->read(d);
+ if (R & 0x80)
+ R|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ t_mem sreg= ram->get(SREG);
+ (signed)result= (signed)D-(signed)R-(sreg&BIT_C)?1:0;
+ res= result & 0xff;
+
+ sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C);
+ if (0x08 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (res)
+ sreg&= ~BIT_Z;
+ if (0x80 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
+/*
+ * Substract with Carry
+ * SBC Rd,Rr 0<=d<=31, 0<=r<=31
+ * 0000 10rd dddd rrrr
+ *____________________________________________________________________________
+ */
+
int
cl_avr::sbc_Rd_Rr(t_mem code)
{
+ t_addr r, d;
+ t_mem R, D, result, res;
+
+ d= (code&0x1f0)>>4;
+ r= ((code&0x200)>>5)|(code&0xf);
+ R= ram->read(r);
+ D= ram->read(d);
+ if (R & 0x80)
+ R|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ t_mem sreg= ram->get(SREG);
+ (signed)result= (signed)D-(signed)R-(sreg&BIT_C)?1:0;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ sreg= sreg & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_C);
+ if (0x08 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (res)
+ sreg&= ~BIT_Z;
+ if (0x80 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
}
+/*
+ * Compare
+ * CP Rd,Rr 0<=d<=31, 0<=r<=31
+ * 0001 01rd dddd rrrr
+ *____________________________________________________________________________
+ */
+
int
cl_avr::cp_Rd_Rr(t_mem code)
{
+ t_addr r, d;
+ t_mem R, D, result, res;
+
+ d= (code&0x1f0)>>4;
+ r= ((code&0x200)>>5)|(code&0xf);
+ R= ram->read(r);
+ D= ram->read(d);
+ if (R & 0x80)
+ R|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ (signed)result= (signed)D-(signed)R;
+ res= result & 0xff;
+
+ t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ if (0x08 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ if (0x80 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
+/*
+ * Substract without Carry
+ * SUB Rd,Rr 0<=d<=31, 0<=r<=31
+ * 0001 10rd dddd rrrr
+ *____________________________________________________________________________
+ */
+
int
cl_avr::sub_Rd_Rr(t_mem code)
{
+ t_addr r, d;
+ t_mem R, D, result, res;
+
+ d= (code&0x1f0)>>4;
+ r= ((code&0x200)>>5)|(code&0xf);
+ R= ram->read(r);
+ D= ram->read(d);
+ if (R & 0x80)
+ R|= ~0xff;
+ if (D & 0x80)
+ D|= ~0xff;
+ (signed)result= (signed)D-(signed)R;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ t_mem sreg= ram->get(SREG) & ~(BIT_H|BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ if (0x08 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_H;
+ int n= 0, v= 0;
+ if (0x80 & ((D&(~R)&(~res)) | ((~D)&R&res)))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ if (0x80 & (((~D)&R) | (R&res) | (res&(~D))))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
return(resGO);
}
}
+/*
+ * One's Complement
+ * COM Rd 0<=d<=31
+ * 1001 010d dddd 0000
+ *____________________________________________________________________________
+ */
+
int
cl_avr::com_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D, result, res;
+
+ d= (code&0x1f0)>>4;
+ D= ram->read(d);
+ result= ~D;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ t_mem sreg= ram->get(SREG);
+ if (!res)
+ sreg|= BIT_Z;
+ else
+ sreg&= ~BIT_Z;
+ sreg&= ~BIT_V;
+ if (res & 0x80)
+ sreg|= (BIT_N|BIT_S);
+ else
+ sreg&= ~(BIT_N|BIT_S);
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
+
return(resGO);
}
+/*
+ * Two's Complement
+ * NEG Rd 0<=d<=31
+ * 1001 010d dddd 0001
+ *____________________________________________________________________________
+ */
+
int
cl_avr::neg_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D, result, res;
+
+ d= (code&0x1f0)>>4;
+ D= ram->read(d);
+ result= (~D)+1;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ t_mem sreg= ram->get(SREG);
+ if (res & (~d) & 0x08)
+ sreg|= BIT_H;
+ else
+ sreg&= ~BIT_H;
+ if (res > 0x80)
+ sreg|= BIT_S;
+ else
+ sreg&= ~BIT_S;
+ if (!res)
+ {
+ sreg|= BIT_Z;
+ sreg&= ~BIT_C;
+ }
+ else
+ {
+ sreg&= ~BIT_Z;
+ sreg|= BIT_C;
+ }
+ if (res == 0x80)
+ sreg|= BIT_V;
+ else
+ sreg&= ~BIT_V;
+ if (res & 0x80)
+ sreg|= (BIT_N);
+ else
+ sreg&= ~BIT_N;
+ ram->set(SREG, sreg);
+
return(resGO);
}
}
+/*
+ * Arithmetic Shift Right
+ * ASR Rd 0<=d<=31
+ * 1001 010d dddd 0101
+ *____________________________________________________________________________
+ */
+
int
cl_avr::asr_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D, result, res;
+
+ d= (code&0x1f0)>>4;
+ D= ram->read(d);
+ t_mem sreg= ram->read(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ int n=0, v= 0, c= 0;
+ if (D & 1)
+ {
+ sreg|= BIT_C;
+ c= 1;
+ }
+ result= D>>1;
+ if (result & 0x40)
+ result|= 0x80;
+ res= result & 0xff;
+ ram->write(d, &res);
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ c) & 1)
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ ram->write(SREG, &sreg);
return(resGO);
}
+/*
+ * Logical Shift Right
+ * LSR Rd 0<=d<=31
+ * 1001 010d dddd 0110
+ *____________________________________________________________________________
+ */
+
int
cl_avr::lsr_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D, result, res;
+
+ d= (code &0x1f0)>>4;
+ D= ram->read(d);
+ t_mem sreg= ram->read(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ if (D & 1)
+ sreg|= (BIT_C|BIT_V|BIT_S);
+ result= D >> 1;
+ res= result & 0xff;
+ ram->write(d, &res);
+ if (!res)
+ sreg|= BIT_Z;
+ ram->write(SREG, &sreg);
return(resGO);
}
+/*
+ * Rotate Right trough Carry
+ * ROR Rd 0<=d<=31
+ * 1001 010d dddd 0111
+ *____________________________________________________________________________
+ */
+
int
cl_avr::ror_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D, result, res;
+
+ d= (code&0x1f0)>>4;
+ D= ram->read(d);
+ t_mem sreg= ram->read(SREG);
+ int oldc= sreg & BIT_C;
+ sreg= sreg & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ int n= 0, v= 0, c= 0;
+ if (D & 1)
+ {
+ sreg|= BIT_C;
+ c= 1;
+ }
+ result= (D >> 1) | oldc?0x80:0;
+ res= result & 0xff;
+ ram->write(d, &res);
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ c) & 1)
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ ram->write(SREG, &sreg);
return(resGO);
}
+/*
+ * Decrement
+ * DEC Rd 0<=d<=31
+ * 1001 010d dddd 1010
+ *____________________________________________________________________________
+ */
+
int
cl_avr::dec_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D, result, res;
+
+ d= (code&0x1f0)>>4;
+ D= ram->read(d);
+ result= D-1;
+ res= result & 0xff;
+ ram->write(d, &res);
+
+ t_mem sreg= ram->get(SREG);
+ if (!res)
+ sreg|= BIT_Z;
+ else
+ sreg&= ~BIT_Z;
+ int n= 0, v= 0;
+ if (res & 0x80)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ else
+ sreg&= ~BIT_N;
+ if (D == 0x80)
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ else
+ sreg&= ~BIT_V;
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ else
+ sreg&= ~BIT_S;
+ ram->set(SREG, sreg);
+
return(resGO);
}
+/*
+ * Multiply
+ * MUL Rd,Rr 0<=d<=31, 0<=r<=31
+ * 1001 11rd dddd rrrr
+ *____________________________________________________________________________
+ */
+
int
cl_avr::mul_Rd_Rr(t_mem code)
{
+ t_addr d, r;
+ t_mem D, R, result, resl, resh;
+
+ d= (code>>4) & 0x1f;
+ r= ((code&0x200)>>5) | (code&0xf);
+ D= ram->read(d);
+ R= ram->read(r);
+ result= R*D;
+ resl= result & 0xff;
+ resh= (result>>8) & 0xff;
+ ram->write(0, &resl);
+ ram->write(1, &resh);
+ t_mem sreg= ram->read(SREG) & ~BIT_C;
+ if (resh & 0x80)
+ sreg|= BIT_C;
+ ram->write(SREG, &sreg);
+ tick(1);
return(resGO);
}
}
+/*
+ * Substract Immediate from Word
+ * SBIW Rdl,K dl={24,26,28,30}, 0<=K<=63
+ * 1001 0111 KK dd KKKK
+ *____________________________________________________________________________
+ */
+
+int
+cl_avr::sbiw_Rdl_K(t_mem code)
+{
+ t_addr dl;
+ t_mem D, K, result, res;
+
+ dl= 24+(2*((code&0x30)>>4));
+ K= ((code&0xc0)>>2)|(code&0xf);
+ D= ram->read(dl+1)*256 + ram->read(dl);
+ if (K & 0x20)
+ K|= ~0x3f;
+ if (D & 0x8000)
+ D|= ~0xffff;
+ (signed)result= (signed)D-(signed)K;
+ res= result & 0xffff;
+ t_mem resl= res&0xff, resh= (res>>8)&0xff;
+ ram->write(dl+1, &resh);
+ ram->write(dl, &resl);
+
+ t_mem sreg= ram->get(SREG) & ~(BIT_S|BIT_V|BIT_N|BIT_Z|BIT_C);
+ int n= 0, v= 0;
+ if (0x8000 & D & (~res))
+ {
+ sreg|= BIT_V;
+ v= 1;
+ }
+ if (res & 0x8000)
+ {
+ sreg|= BIT_N;
+ n= 1;
+ }
+ if ((n ^ v) & 1)
+ sreg|= BIT_S;
+ if (!res)
+ sreg|= BIT_Z;
+ if (0x8000 & res & (~D))
+ sreg|= BIT_C;
+ ram->set(SREG, sreg);
+ tick(1);
+
+ return(resGO);
+}
+
+
/* End of avr.src/arith_inst.cc */
cl_uc(asim)
{
type= CPU_AVR;
+ sleep_executed= 0;
}
int
case MEM_IRAM: return(0x10000);
default: return(0);
}
- return(cl_uc::get_mem_size(type));
+ //return(0);
+ //return(cl_uc::get_mem_size(type));
}
int
return(ijmp(code));
if ((code & 0xff00) == 0x9600)
return(adiw_Rdl_K(code));
+ if ((code & 0xff00) == 0x9700)
+ return(sbiw_Rdl_K(code));
switch (code & 0xfc00)
{
case 0x9000:
}
+/*
+ */
+
+int
+cl_avr::push_data(t_mem data)
+{
+ t_addr sp;
+ t_mem spl, sph;
+
+ spl= ram->read(SPL);
+ sph= ram->read(SPH);
+ sp= 0xffff & (256*sph + spl);
+ ram->write(sp, &data);
+ sp= 0xffff & (sp-1);
+ spl= sp & 0xff;
+ sph= (sp>>8) & 0xff;
+ ram->write(SPL, &spl);
+ ram->write(SPH, &sph);
+ return(resGO);
+}
+
+int
+cl_avr::push_addr(t_addr addr)
+{
+ t_addr sp;
+ t_mem spl, sph, al, ah;
+
+ spl= ram->read(SPL);
+ sph= ram->read(SPH);
+ sp= 0xffff & (256*sph + spl);
+ al= addr & 0xff;
+ ah= (addr>>8) & 0xff;
+ ram->write(sp, &ah);
+ sp= 0xffff & (sp-1);
+ ram->write(sp, &al);
+ sp= 0xffff & (sp-1);
+ spl= sp & 0xff;
+ sph= (sp>>8) & 0xff;
+ ram->write(SPL, &spl);
+ ram->write(SPH, &sph);
+ return(resGO);
+}
+
+int
+cl_avr::pop_data(t_mem *data)
+{
+ t_addr sp;
+ t_mem spl, sph;
+
+ spl= ram->read(SPL);
+ sph= ram->read(SPH);
+ sp= 256*sph + spl;
+ sp= 0xffff & (sp+1);
+ *data= ram->read(sp);
+ spl= sp & 0xff;
+ sph= (sp>>8) & 0xff;
+ ram->write(SPL, &spl);
+ ram->write(SPH, &sph);
+
+ return(resGO);
+}
+
+int
+cl_avr::pop_addr(t_addr *addr)
+{
+ t_addr sp;
+ t_mem spl, sph, al, ah;
+
+ spl= ram->read(SPL);
+ sph= ram->read(SPH);
+ sp= 256*sph + spl;
+ sp= 0xffff & (sp+1);
+ al= ram->read(sp);
+ sp= 0xffff & (sp+1);
+ ah= ram->read(sp);
+ *addr= ah*256 + al;
+ spl= sp & 0xff;
+ sph= (sp>>8) & 0xff;
+ ram->write(SPL, &spl);
+ ram->write(SPH, &sph);
+
+ return(resGO);
+}
+
+
/*
* Set Z, N, V, S bits of SREG after logic instructions and some others
*/
public:
cl_mem *ram;
cl_mem *rom;
+ int sleep_executed;
public:
cl_avr(class cl_sim *asim);
virtual int init(void);
virtual int exec_inst(void);
+ virtual int push_data(t_mem data);
+ virtual int push_addr(t_addr addr);
+ virtual int pop_data(t_mem *data);
+ virtual int pop_addr(t_addr *addr);
+
void set_zn0s(t_mem data);
#include "arith_cl.h"
#include "logic_cl.h"
}
+/*
+ * Sleep
+ * SLEEP
+ * 1001 0101 100X 1000
+ *____________________________________________________________________________
+ */
+
int
cl_avr::sleep(t_mem code)
{
+ sleep_executed= 1;
return(resGO);
}
+/*
+ * Watchdog Reset
+ * WDR
+ * 1001 0101 101X 1000
+ *____________________________________________________________________________
+ */
+
int
cl_avr::wdr(t_mem code)
{
+ //FIXME
return(resGO);
}
z= ram->get(ZH)*256 + ram->get(ZL);
PC= ((PC & ~0xffff) | z) % rom->size;
+ //FIXME: analyze
return(resGO);
}
}
+/*
+ * Indirect Call to Subroutine
+ * ICALL
+ * 1001 0101 XXXX 1001
+ *____________________________________________________________________________
+ */
+
int
cl_avr::icall(t_mem code)
{
+ t_mem zl, zh;
+ t_addr z;
+
+ push_addr(PC);
+ zl= ram->read(ZL);
+ zh= ram->read(ZH);
+ z= zh*256 + zl;
+ PC= (PC & ~0xffff) | (z & 0xffff);
+ //FIXME: analyze
+ tick(2);
return(resGO);
}
}
+/*
+ * Return from Subroutine
+ * RET
+ * 1001 0101 0XX0 1000
+ *____________________________________________________________________________
+ */
+
int
cl_avr::ret(t_mem code)
{
+ t_addr a;
+
+ pop_addr(&a);
+ PC= a % rom->size;
+ tick(3);
return(resGO);
}
+/*
+ * Return from Interrupt
+ * RETI
+ * 1001 0101 0XX1 1000
+ *____________________________________________________________________________
+ */
+
int
cl_avr::reti(t_mem code)
{
+ t_addr a;
+
+ pop_addr(&a);
+ PC= a % rom->size;
+ t_mem sreg= ram->read(SREG);
+ sreg|= BIT_I;
+ ram->write(SREG, &sreg);
+ tick(3);
return(resGO);
}
}
+/*
+ * Relative Call to Subroutine
+ * RCALL k
+ * 1101 kkkk kkkk kkkk -1K<=k<=+1k
+ *____________________________________________________________________________
+ */
+
int
cl_avr::rcall_k(t_mem code)
{
+ t_addr k;
+
+ push_addr(PC);
+ k= code & 0xfff;
+ if (k & 0x800)
+ k|= ~0xfff;
+ PC= (signed)PC + (signed)k;
+ PC= PC % rom->size;
+ tick(2);
+
return(resGO);
}
k= ((code&0x1f0)>>3)|(code&1);
k= (k<<16)|fetch();
- PC= k;
- //FIXME: analyze
+ PC= k % rom->size;
tick(2);
return(resGO);
}
k= (((code&0x1f0)>>3)|(code&1))*0x10000;
k= k + fetch();
-
+ push_addr(PC);
+ PC= k % rom->size;
tick(3);
return(resGO);
}
{
if (code&0x200)
k|= -128;
- PC= (PC+k) % get_mem_size(MEM_ROM);
+ PC= (PC+k) % rom->size;
tick(1);
}
return(resGO);
{
if (code&0x200)
k|= -128;
- PC= (PC+k) % get_mem_size(MEM_ROM);
+ PC= (PC+k) % rom->size;
tick(1);
}
return(resGO);
i++;
if (dt[i].mnemonic != NULL)
{
- PC= (PC + dt[i].length) % get_mem_size(MEM_ROM);
+ PC= (PC + dt[i].length) % rom->size;
tick(1);
}
else
i++;
if (dt[i].mnemonic != NULL)
{
- PC= (PC + dt[i].length) % get_mem_size(MEM_ROM);
+ PC= (PC + dt[i].length) % rom->size;
tick(1);
}
else
}
+/*
+ * Pop Register from Stack
+ * POP Rd 0<=d<=31
+ * 1001 000d dddd 1111
+ *____________________________________________________________________________
+ */
+
int
cl_avr::pop_Rd(t_mem code)
{
+ t_addr d;
+ t_mem D;
+
+ d= (code&0x1f0)>>4;
+ pop_data(&D);
+ ram->write(d, &D);
+ tick(1);
+
return(resGO);
}
}
+/*
+ * Push register on Stack
+ * PUSH Rr 0<=r<=31
+ * 1001 001d dddd 1111
+ *____________________________________________________________________________
+ */
+
int
cl_avr::push_Rr(t_mem code)
{
+ t_addr d;
+ t_mem D;
+
+ d= (code&0x1f0)>>4;
+ D= ram->read(d);
+ push_data(D);
+ tick(1);
+
return(resGO);
}
int
main(int argc, char *argv[])
{
- simulator= new cl_simavr(0, argc, argv);
+ simulator= new cl_simavr(argc, argv);
simulator->init();
simulator->main();
delete simulator;
/*@1@*/
+#include <ctype.h>
+
#include "simavrcl.h"
#include "avrcl.h"
-cl_simavr::cl_simavr(char *more_args, int iargc, char *iargv[]):
- cl_sim(more_args, iargc, iargv)
+cl_simavr::cl_simavr(int iargc, char *iargv[]):
+ cl_sim("h", iargc, iargv)
{}
+
+static void
+print_help(char *name)
+{
+ printf("%s: %s\n", name, VERSIONSTR);
+ printf("Usage: %s [-hHVvP] [-p prompt] [-t CPU] [-X freq[k|M]]\n"
+ " [-c file] [-s file] [-S optionlist]"
+#ifdef SOCKET_AVAIL
+ " [-Z portnum]"
+#endif
+ "\n"
+ " [files...]\n", name);
+ printf
+ (
+ "Options:\n"
+ " -t CPU Type of CPU: etc.\n"
+ " -X freq[k|M] XTAL frequency\n"
+ " -c file Open command console on `file'\n"
+#ifdef SOCKET_AVAIL
+ " -Z portnum Use localhost:portnumber for command console\n"
+#endif
+ " -s file Connect serial interface to `file'\n"
+ " -S options `options' is a comma separated list of options\n"
+ " according to serial interface. Know options are:\n"
+ " in=file serial input will be read from file named `file'\n"
+ " out=file serial output will be written to `file'\n"
+ " -p prompt Specify string for prompt\n"
+ " -P Prompt is a null ('\\0') character\n"
+ " -V Verbose mode\n"
+ " -v Print out version number\n"
+ " -H Print out types of known CPUs\n"
+ " -h Print out this help\n"
+ );
+}
+
+
+int
+cl_simavr::proc_arg(char optopt, char *optarg)
+{
+ switch (optopt)
+ {
+
+ case 'h':
+
+ print_help("savr");
+ exit(0);
+ break;
+
+ case '?':
+
+ if (isprint(optopt))
+ fprintf(stderr, "Unknown option `-%c'.\n", optopt);
+ else
+ fprintf(stderr, "Unknown option character `\\x%x'.\n", optopt);
+ return(1);
+ break;
+
+ default:
+ // should never happen...
+ abort();
+ }
+}
+
+
class cl_uc *
cl_simavr::mk_controller(void)
{
class cl_simavr: public cl_sim
{
public:
- cl_simavr(char *more_args, int iargc, char *iargv[]);
+ cl_simavr(int iargc, char *iargv[]);
+ virtual int proc_arg(char optopt, char *optarg);
virtual class cl_uc *mk_controller(void);
};
--- /dev/null
+ nop
+ ldi r16,$ff
+ out $3d,r16
+ ldi r16,$01
+ out $3e,r16
+ nop
+ call sub1
+ nop
+
+sub1: nop
+ ret
+
+copyright:
+ .db "(c) 2000 talker Bt."
/*
- * Simulator of microcontrollers (@@F@@)
+ * Simulator of microcontrollers (cmd.src/@@F@@)
*
* Copyright (C) @@S@@,@@Y@@ Drotos Daniel, Talker Bt.
*
#
-# S51 mcs51/Makefile
+# ucsim cmd.src/Makefile
#
# (c) Drotos Daniel, Talker Bt. 1997
#
$(MAKE) -f conf.mk srcdir="$(srcdir)" PRJDIR="$(PRJDIR)" freshconf;\
fi
-# End of mcs51/Makefile.in
+# End of cmd.src/Makefile.in
/*
- * Simulator of microcontrollers (bp.cc)
+ * Simulator of microcontrollers (cmd.src/bp.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of bp.cc */
+/* End of cmd.src/bp.cc */
+#
+# ucsim cmd.src/clean.mk
+#
+
# Deleting all files created by building the program
# --------------------------------------------------
clean:
# everything deleted by distclean plus files created by bison, etc.
# -----------------------------------------------------------------------
realclean: distclean
+
+# End of cmd.src/clean.mk
/*
- * Simulator of microcontrollers (cmdset.cc)
+ * Simulator of microcontrollers (cmd.src/cmdset.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of cmdset.cc */
+/* End of cmd.src/cmdset.cc */
/*
- * Simulator of microcontrollers (cmdsetcl.h)
+ * Simulator of microcontrollers (cmd.src/cmdsetcl.h)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
02111-1307, USA. */
/*@1@*/
-#ifndef CMDSETCL_HEADER
-#define CMDSETCL_HEADER
+#ifndef CMD_CMDSETCL_HEADER
+#define CMD_CMDSETCL_HEADER
#include "newcmdcl.h"
#endif
-/* End of cmdsetcl.h */
+/* End of cmd.src/cmdsetcl.h */
/*
- * Simulator of microcontrollers (cmdutil.cc)
+ * Simulator of microcontrollers (cmd.src/cmdutil.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
* Printing out an integer in binary format
*/
-void
-print_bin(long data, int bits, FILE *f)
+/*void
+print_bin(long data, int bits, class cl_console *con)
{
long mask= 1;
mask= mask << ((bits >= 1)?(bits-1):0);
while (bits--)
{
- fprintf(f, "%c", (data&mask)?'1':'0');
+ con->printf("%c", (data&mask)?'1':'0');
mask>>= 1;
}
-}
+}*/
/*
}
-/* End of cmdutil.cc */
+/* End of cmd.src/cmdutil.cc */
/*
- * Simulator of microcontrollers (cmdutil.h)
+ * Simulator of microcontrollers (cmd.src/cmdutil.h)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
02111-1307, USA. */
/*@1@*/
-#ifndef CMDUTIL_HEADER
-#define CMDUTIL_HEADER
+#ifndef CMD_CMDUTIL_HEADER
+#define CMD_CMDUTIL_HEADER
#include "ddconfig.h"
extern int make_server_socket(unsigned short int port);
-extern void print_bin(long data, int bits, FILE *f);
+//extern void print_bin(long data, int bits, class cl_console *con);
extern struct name_entry *get_name_entry(struct name_entry tabl[],
char *name,
class cl_uc *uc);
#endif
-/* End of cmdutil.h */
+/* End of cmd.src/cmdutil.h */
#
+# ucsim cmd.src/conf.mk
+#
# Makefile targets to remake configuration
#
Makefile: $(srcdir)/Makefile.in $(PRJDIR)/configure.in
cd $(PRJDIR) && $(SHELL) ./config.status
-# End of conf.mk
+# End of cmd.src/conf.mk
/*
- * Simulator of microcontrollers (get.cc)
+ * Simulator of microcontrollers (cmd.src/get.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of get.cc */
+/* End of cmd.src/get.cc */
/*
- * Simulator of microcontrollers (info.cc)
+ * Simulator of microcontrollers (cmd.src/info.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of info.cc */
+/* End of cmd.src/info.cc */
/*
- * Simulator of microcontrollers (infocl.h)
+ * Simulator of microcontrollers (cmd.src/infocl.h)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
02111-1307, USA. */
/*@1@*/
-#ifndef INFOCL_HEADER
-#define INFOCL_HEADER
+#ifndef CMD_INFOCL_HEADER
+#define CMD_INFOCL_HEADER
#include "newcmdcl.h"
#endif
-/* End of infocl.h */
+/* End of cmd.src/infocl.h */
/*
- * Simulator of microcontrollers (newcmd.cc)
+ * Simulator of microcontrollers (cmd.src/newcmd.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of newcmd.cc */
+/* End of cmd.src/newcmd.cc */
/*
- * Simulator of microcontrollers (cmdcl.h)
+ * Simulator of microcontrollers (cmd.src/cmdcl.h)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
02111-1307, USA. */
/*@1@*/
-#ifndef CMDCL_HEADER
-#define CMDCL_HEADER
+#ifndef CMD_NEWCMDCL_HEADER
+#define CMD_NEWCMDCL_HEADER
#include "ddconfig.h"
class cl_console: public cl_base
{
+ friend class cl_commander;
+protected:
+ FILE *in, *out;
public:
class cl_sim *sim;
- FILE *in, *out;
char *last_command;
int flags; // See CONS_XXXX
char *prompt;
#endif
-/* End of cmdcl.h */
+/* End of cmd.src/cmdcl.h */
/*
- * Simulator of microcontrollers (set.cc)
+ * Simulator of microcontrollers (cmd.src/set.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of set.cc */
+/* End of cmd.src/set.cc */
/*
- * Simulator of microcontrollers (syntax.cc)
+ * Simulator of microcontrollers (cmd.src/syntax.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
// local
#include "syntaxcl.h"
-/* End of syntax.cc */
+/* End of cmd.src/syntax.cc */
/*
- * Simulator of microcontrollers (syntaxcl.h)
+ * Simulator of microcontrollers (cmd.src/syntaxcl.h)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
02111-1307, USA. */
/*@1@*/
-#ifndef SYNTAXCL_HEADER
-#define SYNTAXCL_HEADER
+#ifndef CMD_SYNTAXCL_HEADER
+#define CMD_SYNTAXCL_HEADER
#endif
-/* End of syntaxcl.h */
+/* End of cmd.src/syntaxcl.h */
/*
- * Simulator of microcontrollers (timer.cc)
+ * Simulator of microcontrollers (cmd.src/timer.cc)
*
* Copyright (C) 1999,99 Drotos Daniel, Talker Bt.
*
}
-/* End of timer.cc */
+/* End of cmd.src/timer.cc */
-echo $ac_n "checking for type of accept's length pointer parameter""... $ac_c" 1>&6
-echo "configure:2117: checking for type of accept's length pointer parameter" >&5
-if eval "test \"`echo '$''{'dxpc_cv_accept_length_type'+set}'`\" = set"; then
+echo $ac_n "checking for type of length pointer parameter of accept""... $ac_c" 1>&6
+echo "configure:2117: checking for type of length pointer parameter of accept" >&5
+if eval "test \"`echo '$''{'s51_cv_accept_length_type'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
ac_save_CPPFLAGS="$CPPFLAGS"
- dxpc_cv_accept_length_type=no
+ s51_cv_accept_length_type=no
for ac_val in int size_t socklen_t; do
CPPFLAGS="$ac_save_CPPFLAGS -DACCEPT_SOCKLEN_T=$ac_val"
cat > conftest.$ac_ext <<EOF
EOF
if { (eval echo configure:2134: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then
rm -rf conftest*
- dxpc_cv_accept_length_type=$ac_val; break
+ s51_cv_accept_length_type=$ac_val; break
else
echo "configure: failed program was:" >&5
cat conftest.$ac_ext >&5
CPPFLAGS="$ac_save_CPPFLAGS"
fi
-echo "$ac_t""$dxpc_cv_accept_length_type" 1>&6
+echo "$ac_t""$s51_cv_accept_length_type" 1>&6
- if test $dxpc_cv_accept_length_type != no; then
+ if test $s51_cv_accept_length_type != no; then
cat >> confdefs.h <<EOF
-#define ACCEPT_SOCKLEN_T $dxpc_cv_accept_length_type
+#define ACCEPT_SOCKLEN_T $s51_cv_accept_length_type
EOF
fi
AC_DEFINE(GNU_GETCWD)
fi
-AC_DEFUN(dxpc_ACCEPT_LENGTH_T,
- [AC_CACHE_CHECK([for type of accept's length pointer parameter],
- dxpc_cv_accept_length_type,
+AC_DEFUN(s51_ACCEPT_LENGTH_T,
+ [AC_CACHE_CHECK([for type of length pointer parameter of accept],
+ s51_cv_accept_length_type,
[ac_save_CPPFLAGS="$CPPFLAGS"
- dxpc_cv_accept_length_type=no
+ s51_cv_accept_length_type=no
for ac_val in int size_t socklen_t; do
CPPFLAGS="$ac_save_CPPFLAGS -DACCEPT_SOCKLEN_T=$ac_val"
AC_TRY_COMPILE([#include <sys/types.h>
#include <sys/socket.h>],
[struct sockaddr a; $ac_val len; accept (0, &a, &len);],
- [dxpc_cv_accept_length_type=$ac_val; break])
+ [s51_cv_accept_length_type=$ac_val; break])
done
CPPFLAGS="$ac_save_CPPFLAGS"])
- if test $dxpc_cv_accept_length_type != no; then
- AC_DEFINE_UNQUOTED(ACCEPT_SOCKLEN_T, $dxpc_cv_accept_length_type,
- [Define to be the type of accept's length parameter (without
-the \*').])
+ if test $s51_cv_accept_length_type != no; then
+ AC_DEFINE_UNQUOTED(ACCEPT_SOCKLEN_T, $s51_cv_accept_length_type,
+ [Define to be the type of length parameter of accept (without the \*').])
fi
]
)
-dxpc_ACCEPT_LENGTH_T
+s51_ACCEPT_LENGTH_T
# Macro definitions
###################
if (!s ||
!strcmp(s, o->id))
{
- fprintf(sim->cmd_out(), "%s ", o->id);
- o->print(sim->cmd_out());
- fprintf(sim->cmd_out(), " %s\n", o->help);
+ sim->cmd->printf("%s ", o->id);
+ o->print(sim->cmd->actual_console);
+ sim->cmd->printf(" %s\n", o->help);
}
}
return(DD_FALSE);
if ((id= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Name of option has not given.\n");
+ sim->cmd->printf("Name of option has not given.\n");
return(DD_FALSE);
}
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Value has not given.\n");
+ sim->cmd->printf("Value has not given.\n");
return(DD_FALSE);
}
for (i= 0; i < uc->options->count; i++)
i++;
if (cmd_table[i].name == NULL)
{
- fprintf(sim->cmd_out(), "Unknown command.\n");
+ sim->cmd->printf("Unknown command.\n");
if (last_command)
{
free(last_command);
if ((id= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Event has not given.\n");
+ sim->cmd->printf("Event has not given.\n");
return(DD_FALSE);
}
if ((s= strtok(NULL, delimiters)) == NULL)
- fprintf(sim->cmd_out(), "Address has not given.\n");
+ sim->cmd->printf("Address has not given.\n");
else
{
addr= (uint)strtol(s, NULL, 0);
if (uc->ebrk_at(addr, id) == NULL)
- fprintf(sim->cmd_out(), "No %s breakpoint at %06x\n", id, addr);
+ sim->cmd->printf("No %s breakpoint at %06x\n", id, addr);
else
uc->rm_ebrk(addr, id);
}
void
dump_memory(cl_mem *mem,
- t_addr *start, t_addr stop, int bpl, FILE *f,
+ t_addr *start, t_addr stop, int bpl, class cl_console *con,
class cl_sim *sim)
{
int i;
while ((*start <= stop) &&
(*start < mem->size))
{
- sim->cmd->printf("%06x ", *start);
+ con->printf("%06x ", *start);
for (i= 0; (i < bpl) &&
(*start+i < mem->size) &&
(*start+i <= stop);
{
char format[10];
sprintf(format, "%%0%dx ", mem->width/4);
- fprintf(f, format/*"%02x "*/, mem->get(*start+i));
+ con->printf(format/*"%02x "*/, mem->get(*start+i));
}
while (i < bpl)
{
- fprintf(f, " ");
+ con->printf(" ");
i++;
}
for (i= 0; (i < bpl) &&
(*start+i < mem->size) &&
(*start+i <= stop);
i++)
- fprintf(f, "%c",
- isprint(mem->get(*start+i))?(char)mem->get(*start+i):'.');
- fprintf(f, "\n");
+ con->printf("%c",
+ isprint(mem->get(*start+i))?(char)mem->get(*start+i):'.');
+ con->printf("\n");
(*start)+= bpl;
}
}
{
uchar data;
+ if (sim->cmd->actual_console == 0)
+ return(DD_FALSE);
data= uc->get_mem(MEM_SFR, P0);
sim->cmd->printf("P0 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.');
data= uc->get_mem(MEM_SFR, P1);
sim->cmd->printf(" P1 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.');
data= uc->port_pins[0];
sim->cmd->printf("Pin0 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.');
data= uc->port_pins[1];
sim->cmd->printf(" Pin1 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.');
data= uc->port_pins[0] & uc->get_mem(MEM_SFR, P0);
sim->cmd->printf("Port0 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.');
data= uc->port_pins[1] & uc->get_mem(MEM_SFR, P1);
sim->cmd->printf(" Port1 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.');
sim->cmd->printf("\n");
data= uc->get_mem(MEM_SFR, P2);
sim->cmd->printf("P2 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.');
data= uc->get_mem(MEM_SFR, P3);
sim->cmd->printf(" P3 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.');
data= uc->port_pins[2];
sim->cmd->printf("Pin2 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.');
data= uc->port_pins[3];
sim->cmd->printf(" Pin3 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.');
data= uc->port_pins[2] & uc->get_mem(MEM_SFR, P2);
sim->cmd->printf("Port2 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c", data, data, isprint(data)?data:'.');
data= uc->port_pins[3] & uc->get_mem(MEM_SFR, P3);
sim->cmd->printf(" Port3 ");
- print_bin(data, 8, sim->cmd_out());
+ sim->cmd->actual_console->print_bin(data, 8);
sim->cmd->printf(" 0x%02x %3d %c\n", data, data, isprint(data)?data:'.');
return(DD_FALSE);
}
else
// dump all
- dump_memory(uc->mem(MEM_SFR), &start, 255, 16, sim->cmd_out(), sim);
+ dump_memory(uc->mem(MEM_SFR), &start, 255, 16, sim->cmd->actual_console,
+ sim);
return(DD_FALSE);
}
extern void dump_memory(cl_mem *mem, t_addr *start, t_addr stop,
- int bpl, FILE *f, class cl_sim *sim);
+ int bpl, class cl_console *con,
+ class cl_sim *sim);
extern bool cmd_disass(char *cmd, class t_uc51 *uc, class cl_sim *sim);
extern bool cmd_dump_port(char *cmd, class t_uc51 *uc, class cl_sim *sim);
if (sim->state & SIM_GO)
{
- fprintf(sim->cmd_out(),
- "Execution is already running.\n");
+ sim->cmd->printf("Execution is already running.\n");
return(0);
}
if ((start_str= strtok(NULL, delimiters)) != NULL)
{
if (!uc->inst_at(start) &&
uc->debug)
- fprintf(sim->cmd_out(),
- "Warning: maybe not instruction at 0x%06lx\n", start);
+ sim->cmd->printf("Warning: maybe not instruction at 0x%06lx\n", start);
uc->PC= start;
}
if (stop >= 0)
{
if (start == (t_addr)stop)
{
- fprintf(sim->cmd_out(), "Addresses must be different.\n");
+ sim->cmd->printf("Addresses must be different.\n");
return(DD_FALSE);
}
if ((b= uc->fbrk_at(stop)))
if (p &&
((p == s) ||
*p))
- fprintf(sim->cmd_out(), "Wrong parameter, PC unchanged.\n");
+ sim->cmd->printf("Wrong parameter, PC unchanged.\n");
else
{
if (pc >= EROM_SIZE)
pc= 0;
if (!uc->inst_at(pc) &&
uc->debug)
- fprintf(sim->cmd_out(),
- "Warning: maybe not instruction at %06lx\n", pc);
+ sim->cmd->printf("Warning: maybe not instruction at %06lx\n", pc);
uc->PC= pc;
uc->print_disass(uc->PC, sim->cmd->actual_console);
}
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Address has not given.\n");
+ sim->cmd->printf("Address has not given.\n");
return;
}
if (tabl)
if (p &&
*p)
{
- fprintf(sim->cmd_out(), "Bad address.\n");
+ sim->cmd->printf("Bad address.\n");
return;
}
}
start= addr;
if (start >= mem->size)
{
- fprintf(sim->cmd_out(),
- "Address %ld(0x%lx) is bigger than %ld(0x%lx).\n",
- start, start, mem->size-1, mem->size-1);
+ sim->cmd->printf("Address %ld(0x%lx) is bigger than %ld(0x%lx).\n",
+ start, start, mem->size-1, mem->size-1);
return;
}
if (!(start >= first))
{
- fprintf(sim->cmd_out(),
- "Address %ld(0x%lx) is less than %ld(0x%lx).\n",
- start, start, first, first);
+ sim->cmd->printf("Address %ld(0x%lx) is less than %ld(0x%lx).\n",
+ start, start, first, first);
return;
}
if ((s= strtok(NULL, " \t\v")) == NULL)
{
- fprintf(sim->cmd_out(), "Data has not given.\n");
+ sim->cmd->printf("Data has not given.\n");
return;
}
while (s &&
if (p &&
*p)
{
- fprintf(sim->cmd_out(), "Bad data %s\n", s);
+ sim->cmd->printf("Bad data %s\n", s);
break;
}
mem->set(addr, data);
}
s= strtok(NULL, " \t\v");
}
- dump_memory(mem, &start, addr-1, 16, sim->cmd_out(), sim);
+ dump_memory(mem, &start, addr-1, 16, sim->cmd->actual_console, sim);
}
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Address has not given.\n");
+ sim->cmd->printf("Address has not given.\n");
return(DD_FALSE);
}
if (!interpret_bitname(s, uc, &cell, &addr, &bitaddr, &bitmask, NULL))
{
- fprintf(sim->cmd_out(), "Bad address %s\n", s);
+ sim->cmd->printf("Bad address %s\n", s);
return(DD_FALSE);
}
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Data has not given.\n");
+ sim->cmd->printf("Data has not given.\n");
return(DD_FALSE);
}
while (s)
{
if (!isdigit(*s))
{
- fprintf(sim->cmd_out(), "Bad data %s\n", s);
+ sim->cmd->printf("Bad data %s\n", s);
return(DD_FALSE);
}
if (*s == '0')
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Port number has not given.\n");
+ sim->cmd->printf("Port number has not given.\n");
return(DD_FALSE);
}
port= strtol(s, &p, 0);
if ((p && *p) ||
(port > 3))
{
- fprintf(sim->cmd_out(), "Port number %s is wrong.\n", s);
+ sim->cmd->printf("Port number %s is wrong.\n", s);
return(DD_FALSE);
}
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Date has not given.\n");
+ sim->cmd->printf("Date has not given.\n");
return(DD_FALSE);
}
data= strtol(s, &p, 0);
if (p && *p)
{
- fprintf(sim->cmd_out(), "Data %s is wrong.\n", s);
+ sim->cmd->printf("Data %s is wrong.\n", s);
return(DD_FALSE);
}
uc->port_pins[port]= data;
(start < 0) ||
(start < first) ||
(start >= size))
- fprintf(sim->cmd_out(), "Start address %s is wrong.\n", s);
+ sim->cmd->printf("Start address %s is wrong.\n", s);
if ((s= strtok(NULL, delimiters)) == NULL)
return;
if ((p && *p) ||
(stop < start) ||
(stop >= size))
- fprintf(sim->cmd_out(), "Stop address %s is wrong.\n", s);
+ sim->cmd->printf("Stop address %s is wrong.\n", s);
if ((s= strtok(NULL, delimiters)) == NULL)
return;
data= strtol(s, &p, 0);
if (p && *p)
- fprintf(sim->cmd_out(), "Data %s is wrong.\n", s);
+ sim->cmd->printf("Data %s is wrong.\n", s);
while (start <= stop)
{
if ((s= strtok(NULL, delimiters)) == NULL)
{
- fprintf(sim->cmd_out(), "Parameter is not given.\n");
+ sim->cmd->printf("Parameter is not given.\n");
return(DD_FALSE);
}
if (*s == 'c')
- {
- fprintf(sim->cmd_out(), "%s\n", copying);
- }
+ sim->cmd->printf("%s\n", copying);
else if (*s == 'w')
- fprintf(sim->cmd_out(), "%s\n", warranty);
+ sim->cmd->printf("%s\n", warranty);
else
- fprintf(sim->cmd_out(), "Unknown parameter.\n");
+ sim->cmd->printf("Unknown parameter.\n");
return(DD_FALSE);
}
uchar data;
start= sfr->get(PSW) & 0x18;
- dump_memory(iram, &start, start+7, 8, sim->cmd_out(), sim);
+ dump_memory(iram, &start, start+7, 8, /*sim->cmd_out()*/con, sim);
start= sfr->get(PSW) & 0x18;
data= iram->get(iram->get(start));
con->printf("%06x %02x %c",
found= str[i] == (cs?mem->get(start+i):toupper(mem->get(start+i)));
if (found)
{
- dump_memory(mem, &tmp, start+len-1, 8, sim->cmd_out(), sim);
+ dump_memory(mem, &tmp, start+len-1, 8, sim->cmd->actual_console,sim);
start+= len;
}
else
{}
void
-cl_bool_opt::print(FILE *f)
+cl_bool_opt::print(class cl_console *con)
{
if (*(bool *)option)
- fprintf(f, "TRUE");
+ con->printf("TRUE");
else
- fprintf(f, "FALSE");
+ con->printf("FALSE");
}
bool
}
void
-cl_cons_debug_opt::print(FILE *f)
+cl_cons_debug_opt::print(class cl_console *con)
{
if (sim->cmd->actual_console &&
sim->cmd->actual_console->flags & CONS_DEBUG)
- fprintf(f, "TRUE");
+ con->printf("TRUE");
else
- fprintf(f, "FALSE");
+ con->printf("FALSE");
}
bool
cl_option(void *opt, char *Iid, char *Ihelp);
~cl_option(void);
- virtual void print(FILE *f)= 0;
+ virtual void print(class cl_console *con)= 0;
virtual bool get_value(void)= 0;
public:
cl_bool_opt(bool *opt, char *Iid, char *Ihelp);
- virtual void print(FILE *f);
+ virtual void print(class cl_console *con);
virtual bool get_value(void);
virtual void set_value(bool);
virtual void set_value(char *s);
public:
cl_cons_debug_opt(class cl_sim *Asim, char *Iid, char *Ihelp);
- virtual void print(FILE *f);
+ virtual void print(class cl_console *con);
virtual bool get_value(void);
* Obsolete methods for old commander
*/
-FILE *
+/*FILE *
cl_sim::cmd_in(void)
{
if (!cmd ||
return(cmd->actual_console->in?cmd->actual_console->in:stdin);
class cl_console *con= (class cl_console *)(cmd->cons->at(0));
return(con->in?con->in:stdin);
-}
+}*/
-FILE *
+/*FILE *
cl_sim::cmd_out(void)
{
if (!cmd ||
return(cmd->actual_console->out?cmd->actual_console->out:stdout);
class cl_console *con= (class cl_console *)(cmd->cons->at(0));
return(con->out?con->out:stdout);
-}
+}*/
/*
virtual void stop(int reason);
// Obsolete, for old commander
-public:
- FILE *cmd_out(void);
- FILE *cmd_in(void);
+ //public:
+ //FILE *cmd_out(void);
+ //FILE *cmd_in(void);
};
uchar low= 0, high;
if (!name)
- f= sim->/*FIXME*/cmd_in();
+ {
+ sim->cmd->printf("cl_uc::read_hex_file File name not specified\n");
+ return(-1);
+ }
else
if ((f= fopen(name, "r")) == NULL)
{
else
if (sim->get_iarg('V', 0) &&
rtyp != 1)
- fprintf(sim->cmd_out(),
- "Unknown record type %d(0x%x)\n", rtyp, rtyp);
+ sim->cmd->printf("Unknown record type %d(0x%x)\n",
+ rtyp, rtyp);
}
else
if (sim->get_iarg('V', 0))
- fprintf(sim->cmd_out(),
- "Checksum error (%x instead of %x) in record %ld.\n",
- chk, sum, recnum);
+ sim->cmd->printf("Checksum error (%x instead of %x) in "
+ "record %ld.\n", chk, sum, recnum);
}
else
if (sim->get_iarg('V', 0))
- fprintf(sim->cmd_out(), "Read error in record %ld.\n", recnum);
+ sim->cmd->printf("Read error in record %ld.\n", recnum);
}
}
if (get_mem_width(MEM_ROM) > 8 &&
if (name)
fclose(f);
if (sim->get_iarg('V', 0))
- fprintf(sim->cmd_out(), "%ld records have been read\n", recnum);
+ sim->cmd->printf("%ld records have been read\n", recnum);
analyze(0);
return(written);
}
projects / fw / sdcc / commitdiff