3 * A/D conversion module library header
5 * written by Vangelis Rokas, 2004 <vrokas AT otenet.gr>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU Library General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32 /* link I/O libarary */
35 /* interrupt on/off flag */
36 #define ADC_INT_OFF 0x00
37 #define ADC_INT_ON 0x01
41 #define ADC_FRM_RJUST 0x80
42 #define ADC_FRM_LJUST 0x00
45 /* oscillator frequency */
46 #define ADC_FOSC_2 0x00
47 #define ADC_FOSC_4 0x04
48 #define ADC_FOSC_8 0x01
49 #define ADC_FOSC_16 0x05
50 #define ADC_FOSC_32 0x02
51 #define ADC_FOSC_64 0x06
52 #define ADC_FOSC_RC 0x07
55 /* distinguish between 18f242-style and 18f2455-style ADC */
57 /* ordered by device family */
58 #if defined(pic18f1220) || defined(pic18f1320) \
59 || defined(pic18f2220) || defined(pic18f2320) || defined(pic18f4220) || defined(pic18f4320) \
60 || defined(pic18f2221) || defined(pic18f2321) || defined(pic18f4221) || defined(pic18f4321) \
61 || defined(pic18f2420) || defined(pic18f2520) || defined(pic18f4420) || defined(pic18f4520) \
62 || defined(pic18f2423) || defined(pic18f2523) || defined(pic18f4423) || defined(pic18f4523) \
63 || defined(pic18f2450) || defined(pic18f4450) \
64 || defined(pic18f2455) || defined(pic18f2550) || defined(pic18f4455) || defined(pic18f4550) \
65 || defined(pic18f2480) || defined(pic18f2580) || defined(pic18f4480) || defined(pic18f4580) \
66 || defined(pic18f24j10) || defined(pic18f25j10) || defined(pic18f44j10) || defined(pic18f45j10) \
67 || defined(pic18f2525) || defined(pic18f2620) || defined(pic18f4525) || defined(pic18f4620) \
68 || defined(pic18f2585) || defined(pic18f2680) || defined(pic18f4585) || defined(pic18f4680) \
69 || defined(pic18f2682) || defined(pic18f2685) || defined(pic18f4682) || defined(pic18f4685) \
70 || defined(pic18f6520) || defined(pic18f6620) || defined(pic18f6720) \
71 || defined(pic18f8520) || defined(pic18f8620) || defined(pic18f8720) \
72 || defined(pic18f6585) || defined(pic18f6680) || defined(pic18f8585) || defined(pic18f8680) \
74 #define __SDCC_ADC_STYLE2455 1
77 #elif defined(pic18f66j60) || defined(pic18f66j65) || defined(pic18f67j60) \
78 || defined(pic18f86j60) || defined(pic18f86j65) || defined(pic18f87j60) \
79 || defined(pic18f96j60) || defined(pic18f96j65) || defined(pic18f97j60) \
81 #define __SDCC_ADC_STYLE97J60 1
84 #elif defined(pic18f242) || defined(pic18f252) || defined(pic18f442) || defined(pic18f452) \
85 || defined(pic18f248) || defined(pic18f258) || defined(pic18f448) || defined(pic18f458)
87 #define __SDCC_ADC_STYLE242 1
89 #else // unknown device
91 #error Device ADC style is unknown, please update your adc.h manually and/or inform the maintainer!
93 #endif // !large ADC device
96 /* channel selection */
97 #if defined(__SDCC_ADC_STYLE2455) || defined(__SDCC_ADC_STYLE97J60)
98 #define ADC_CHN_0 0x00
99 #define ADC_CHN_1 0x01
100 #define ADC_CHN_2 0x02
101 #define ADC_CHN_3 0x03
102 #define ADC_CHN_4 0x04
103 #define ADC_CHN_5 0x05
104 #define ADC_CHN_6 0x06
105 #define ADC_CHN_7 0x07
106 #define ADC_CHN_8 0x08
107 #define ADC_CHN_9 0x09
108 #define ADC_CHN_10 0x0a
109 #define ADC_CHN_11 0x0b
110 #define ADC_CHN_12 0x0c
111 #if defined(__SDCC_ADC_STYLE97J60) // 97j60 family has 2 more ADC ports
112 #define ADC_CHN_13 0x0d
113 #define ADC_CHN_14 0x0e
114 #define ADC_CHN_15 0x0f
117 #else /* all other devices */
119 #define ADC_CHN_1 0x00
120 #define ADC_CHN_2 0x01
121 #define ADC_CHN_3 0x03
122 #define ADC_CHN_4 0x04
123 #define ADC_CHN_5 0x05
124 #define ADC_CHN_6 0x06
125 #define ADC_CHN_7 0x07
130 /* reference and pin configuration */
131 #if defined(__SDCC_ADC_STYLE2455) || defined(__SDCC_ADC_STYLE97J60)
133 // 97j60 family has 2 more possible ADC configs
134 #if defined(__SDCC_ADC_STYLE97J60) // 97j60 family has 2 more ADC ports
135 #define ADC_CFG_16A_0R 0x00
136 #define ADC_CFG_16A_1R 0x10
137 #define ADC_CFG_16A_2R 0x30
138 #define ADC_CFG_15A_0R 0x00 // can switch only from 14 analog ports to 16 enabled analog ports
139 #define ADC_CFG_15A_1R 0x10
140 #define ADC_CFG_15A_2R 0x30
141 #define ADC_CFG_14A_0R 0x01
142 #define ADC_CFG_14A_1R 0x11
143 #define ADC_CFG_14A_2R 0x31
144 #define ADC_CFG_13A_0R 0x02
145 #define ADC_CFG_13A_1R 0x12
146 #define ADC_CFG_13A_2R 0x32
148 #define ADC_CFG_13A_0R 0x01
149 #define ADC_CFG_13A_1R 0x11
150 #define ADC_CFG_13A_2R 0x31
152 #define ADC_CFG_12A_0R 0x03
153 #define ADC_CFG_12A_1R 0x13
154 #define ADC_CFG_12A_2R 0x33
155 #define ADC_CFG_11A_0R 0x04
156 #define ADC_CFG_11A_1R 0x14
157 #define ADC_CFG_11A_2R 0x34
158 #define ADC_CFG_10A_0R 0x05
159 #define ADC_CFG_10A_1R 0x15
160 #define ADC_CFG_10A_2R 0x35
161 #define ADC_CFG_09A_0R 0x06
162 #define ADC_CFG_09A_1R 0x16
163 #define ADC_CFG_09A_2R 0x36
164 #define ADC_CFG_08A_0R 0x07
165 #define ADC_CFG_08A_1R 0x17
166 #define ADC_CFG_08A_2R 0x37
167 #define ADC_CFG_07A_0R 0x08
168 #define ADC_CFG_07A_1R 0x18
169 #define ADC_CFG_07A_2R 0x38
170 #define ADC_CFG_06A_0R 0x09
171 #define ADC_CFG_06A_1R 0x19
172 #define ADC_CFG_06A_2R 0x39
173 #define ADC_CFG_05A_0R 0x0a
174 #define ADC_CFG_05A_1R 0x1a
175 #define ADC_CFG_05A_2R 0x3a
176 #define ADC_CFG_04A_0R 0x0b
177 #define ADC_CFG_04A_1R 0x1b
178 #define ADC_CFG_04A_2R 0x3b
179 #define ADC_CFG_03A_0R 0x0c
180 #define ADC_CFG_03A_1R 0x1c
181 #define ADC_CFG_03A_2R 0x3c
182 #define ADC_CFG_02A_0R 0x0d
183 #define ADC_CFG_02A_1R 0x1d
184 #define ADC_CFG_02A_2R 0x3d
185 #define ADC_CFG_01A_0R 0x0e
186 #define ADC_CFG_01A_1R 0x1e
187 #define ADC_CFG_01A_2R 0x3e
188 #define ADC_CFG_00A_0R 0x0f
190 #else /* all other devices */
192 #define ADC_CFG_8A_0R 0x00
193 #define ADC_CFG_7A_1R 0x01
194 #define ADC_CFG_5A_0R 0x02
195 #define ADC_CFG_4A_1R 0x03
196 #define ADC_CFG_3A_0R 0x04
197 #define ADC_CFG_2A_1R 0x05
198 #define ADC_CFG_0A_0R 0x06
199 #define ADC_CFG_6A_2R 0x08
200 #define ADC_CFG_6A_0R 0x09
201 #define ADC_CFG_5A_1R 0x0a
202 #define ADC_CFG_4A_2R 0x0b
203 #define ADC_CFG_3A_2R 0x0c
204 #define ADC_CFG_2A_2R 0x0d
205 #define ADC_CFG_1A_0R 0x0e
206 #define ADC_CFG_1A_2R 0x0f
210 /* initialize AD module */
211 void adc_open(unsigned char channel, unsigned char fosc, unsigned char pcfg, unsigned char config);
213 /* shutdown AD module */
214 void adc_close(void);
216 /* begin a conversion */
219 /* return 1 if AD is performing a conversion, 0 if done */
220 char adc_busy(void) __naked;
222 /* get value of conversion */
223 int adc_read(void) __naked;
225 /* setup conversion channel */
226 void adc_setchannel(unsigned char channel) __naked;