3 <TITLE>ASxxxx Cross Assembler Documentation</TITLE>
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10 <H2>ASxxxx Cross Assembler Documentation</H2>
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22 ASLINK Relocating Linker
42 The ASxxxx assemblers were written following the style of
43 several cross assemblers found in the Digital Equipment Corpora-
44 tion Users Society (DECUS) distribution of the C programming
45 language. The DECUS code was provided with no documentation as
46 to the input syntax or the output format. Study of the code
47 revealed that the unknown author of the code had attempted to
48 formulate an assembler with attributes similiar to those of the
49 PDP-11 MACRO assembler (without macro's). The incomplete code
50 from the DECUS C distribution has been largely rewritten, only
51 the program structure, and C source file organization remains
52 relatively unchanged. However, I wish to thank the author for
53 his contribution to this set of assemblers.
55 The ASLINK program was written as a companion to the ASxxxx
56 assemblers, its design and implementation was not derived from
59 The ASxxxx assemblers and the ASLINK relocating linker are
60 placed in the Public Domain. Publication or distribution of
61 these programs for non-commercial use is hereby granted with the
62 stipulation that the copyright notice be included with all
65 I would greatly appreciate receiving the details of any
66 changes, additions, or errors pertaining to these programs and
67 will attempt to incorporate any fixes or generally useful
68 changes in a future update to these programs.
79 http://shop-pdp.kent.edu/ashtml/asxxxx.htm
81 baldwin@shop-pdp.kent.edu
95 C O N T R I B U T O R S
100 Thanks to Marko Makela for his contribution of the AS6500
107 Internet: Marko.Makela@Helsinki.Fi
108 EARN/BitNet: msmakela@finuh
114 Thanks to John Hartman for his contribution of the AS8051
115 cross assembler and updates to the ASxxxx and ASLINK internals.
118 jhartman@compuserve.com
119 http://ourworld.compuserve.com/homepages/jhartman/
125 Thanks to G. Osborn for his contributions to LKS19.C and
136 ASxxxx Cross Assemblers, Version 2.00, August 1998
138 Submitted by Alan R. Baldwin,
139 Kent State University, Kent, Ohio
141 Operating System: TSX+, RT-11, MS/DOS, PDOS
142 or other supporting K&R C.
148 The ASxxxx assemblers are a series of microprocessor assem-
149 blers written in the C programming language. This collection
150 contains cross assemblers for the 6800(6802/6808), 6801(hd6303),
151 6804, 6805, 68HC08, 6809, 68HC11, 68HC12, 68HC16, 8051,
152 8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces-
153 sors. Each assembler has a device specific section which
154 includes: (1) device description, byte order, and file exten-
155 sion information, (2) a table of assembler general directives,
156 special directives, assembler mnemonics and associated operation
157 codes, (3) machine specific code for processing the device
158 mnemonics, addressing modes, and special directives.
160 The assemblers have a common device independent section which
161 handles the details of file input/output, symbol table genera-
162 tion, program/data areas, expression analysis, and assembler
163 directive processing.
165 The assemblers provide the following features: (1) alpha-
166 betized, formatted symbol table listings, (2) relocatable object
167 modules, (3) global symbols for linking object modules, (4) con-
168 ditional assembly directives, (5) reusable local symbols, and
169 (6) include-file processing.
171 The companion program ASLINK is a relocating linker perform-
172 ing the following functions: (1) bind multiple object modules
173 into a single memory image, (2) resolve inter-module symbol
174 references, (3) resolve undefined symbols from specified
175 librarys of object modules, (4) process absolute, relative, con-
176 catenated, and overlay attributes in data and program sections,
177 (5) perform byte and word program-counter relative (pc or pcr)
178 addressing calculations, (6) define absolute symbol values at
179 link time, (7) define absolute area base address values at link
180 time, (8) produce Intel Hex or Motorola S19 output file, (9)
181 produce a map of the linked memory image, and (10) update the
182 ASxxxx assembler listing files with the absolute linked ad-
185 The assemblers and linker have been tested using DECUS C
186 under TSX+ and RT-11, PDOS C V5.4b, and Symantec C/C++ V6.1/V7.2
187 under DOS/Windows 3.x/95. Complete source code and documenta-
188 tion for the assemblers and linker is included with the distri-
189 bution. Additionally, test code for each assembler and several
190 microprocessor monitors ( ASSIST05 for the 6805, MONDEB and
191 ASSIST09 for the 6809, and BUFFALO 2.5 for the 6811) are in-
192 cluded as working examples of use of these assemblers.
195 CHAPTER 1 THE ASSEMBLER 1-1
196 1.1 THE ASXXXX ASSEMBLERS 1-1
197 1.1.1 Assembly Pass 1 1-2
198 1.1.2 Assembly Pass 2 1-2
199 1.1.3 Assembly Pass 3 1-2
200 1.2 SOURCE PROGRAM FORMAT 1-3
201 1.2.1 Statement Format 1-3
202 1.2.1.1 Label Field 1-3
203 1.2.1.2 Operator Field 1-5
204 1.2.1.3 Operand Field 1-5
205 1.2.1.4 Comment Field 1-6
206 1.3 SYMBOLS AND EXPRESSIONS 1-6
207 1.3.1 Character Set 1-6
208 1.3.2 User-Defined Symbols 1-10
209 1.3.3 Local Symbols 1-11
210 1.3.4 Current Location Counter 1-12
213 1.3.7 Expressions 1-15
214 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
215 1.4.1 .module Directive 1-16
216 1.4.2 .title Directive 1-17
217 1.4.3 .sbttl Directive 1-17
218 1.4.4 .page Directive 1-17
219 1.4.5 .byte and .db Directives 1-17
220 1.4.6 .word and .dw Directives 1-18
221 1.4.7 .blkb, .blkw, and .ds Directives 1-18
222 1.4.8 .ascii Directive 1-18
223 1.4.9 .ascis Directive 1-19
224 1.4.10 .asciz Directive 1-19
225 1.4.11 .radix Directive 1-20
226 1.4.12 .even Directive 1-20
227 1.4.13 .odd Directive 1-20
228 1.4.14 .area Directive 1-21
229 1.4.15 .org Directive 1-22
230 1.4.16 .globl Directive 1-23
231 1.4.17 .if, .else, and .endif Directives 1-23
232 1.4.18 .include Directive 1-24
233 1.4.19 .setdp Directive 1-25
234 1.5 INVOKING ASXXXX 1-27
236 1.7 LISTING FILE 1-29
237 1.8 SYMBOL TABLE FILE 1-30
240 CHAPTER 2 THE LINKER 2-1
241 2.1 ASLINK RELOCATING LINKER 2-1
242 2.2 INVOKING ASLINK 2-2
243 2.3 LIBRARY PATH(S) AND FILE(S) 2-3
244 2.4 ASLINK PROCESSING 2-4
245 2.5 LINKER INPUT FORMAT 2-6
246 2.5.1 Object Module Format 2-6
247 2.5.2 Header Line 2-6
248 2.5.3 Module Line 2-7
249 2.5.4 Symbol Line 2-7
260 2.6 LINKER ERROR MESSAGES 2-9
261 2.7 INTEL HEX OUTPUT FORMAT 2-11
262 2.8 MOTORLA S1-S9 OUTPUT FORMAT 2-12
264 CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1
265 3.1 BUILDING AN ASSEMBLER 3-1
266 3.2 BUILDING ASLINK 3-2
268 APPENDIX A AS6800 ASSEMBLER A-1
269 A.1 6800 REGISTER SET A-1
270 A.2 6800 INSTRUCTION SET A-1
271 A.2.1 Inherent Instructions A-2
272 A.2.2 Branch Instructions A-2
273 A.2.3 Single Operand Instructions A-3
274 A.2.4 Double Operand Instructions A-4
275 A.2.5 Jump and Jump to Subroutine Instructions A-4
276 A.2.6 Long Register Instructions A-5
278 APPENDIX B AS6801 ASSEMBLER B-1
279 B.1 .hd6303 DIRECTIVE B-1
280 B.2 6801 REGISTER SET B-1
281 B.3 6801 INSTRUCTION SET B-1
282 B.3.1 Inherent Instructions B-2
283 B.3.2 Branch Instructions B-2
284 B.3.3 Single Operand Instructions B-3
285 B.3.4 Double Operand Instructions B-4
286 B.3.5 Jump and Jump to Subroutine Instructions B-5
287 B.3.6 Long Register Instructions B-5
288 B.3.7 6303 Specific Instructions B-5
290 APPENDIX C AS6804 ASSEMBLER C-1
291 C.1 6804 REGISTER SET C-1
292 C.2 6804 INSTRUCTION SET C-1
293 C.2.1 Inherent Instructions C-2
294 C.2.2 Branch Instructions C-2
295 C.2.3 Single Operand Instructions C-2
296 C.2.4 Jump and Jump to Subroutine Instructions C-2
297 C.2.5 Bit Test Instructions C-2
298 C.2.6 Load Immediate data Instruction C-3
299 C.2.7 6804 Derived Instructions C-3
301 APPENDIX D AS6805 ASSEMBLER D-1
302 D.1 6805 REGISTER SET D-1
303 D.2 6805 INSTRUCTION SET D-1
304 D.2.1 Control Instructions D-2
305 D.2.2 Bit Manipulation Instructions D-2
306 D.2.3 Branch Instructions D-2
307 D.2.4 Read-Modify-Write Instructions D-3
308 D.2.5 Register\Memory Instructions D-3
315 D.2.6 Jump and Jump to Subroutine Instructions D-4
317 APPENDIX E AS6808 ASSEMBLER E-1
318 E.1 68HC08 REGISTER SET E-1
319 E.2 68HC08 INSTRUCTION SET E-1
320 E.2.1 Control Instructions E-2
321 E.2.2 Bit Manipulation Instructions E-2
322 E.2.3 Branch Instructions E-3
323 E.2.4 Complex Branch Instructions E-3
324 E.2.5 Read-Modify-Write Instructions E-4
325 E.2.6 Register\Memory Instructions E-5
326 E.2.7 Double Operand Move Instruction E-5
327 E.2.8 16-Bit <H:X> Index Register Instructions E-5
328 E.2.9 Jump and Jump to Subroutine Instructions E-5
330 APPENDIX F AS6809 ASSEMBLER F-1
331 F.1 6809 REGISTER SET F-1
332 F.2 6809 INSTRUCTION SET F-1
333 F.2.1 Inherent Instructions F-3
334 F.2.2 Short Branch Instructions F-3
335 F.2.3 Long Branch Instructions F-3
336 F.2.4 Single Operand Instructions F-4
337 F.2.5 Double Operand Instructions F-5
338 F.2.6 D-register Instructions F-5
339 F.2.7 Index/Stack Register Instructions F-5
340 F.2.8 Jump and Jump to Subroutine Instructions F-6
341 F.2.9 Register - Register Instructions F-6
342 F.2.10 Condition Code Register Instructions F-6
343 F.2.11 6800 Compatibility Instructions F-6
345 APPENDIX G AS6811 ASSEMBLER G-1
346 G.1 68HC11 REGISTER SET G-1
347 G.2 68HC11 INSTRUCTION SET G-1
348 G.2.1 Inherent Instructions G-2
349 G.2.2 Branch Instructions G-2
350 G.2.3 Single Operand Instructions G-3
351 G.2.4 Double Operand Instructions G-4
352 G.2.5 Bit Manupulation Instructions G-4
353 G.2.6 Jump and Jump to Subroutine Instructions G-5
354 G.2.7 Long Register Instructions G-5
356 APPENDIX H AS6812 ASSEMBLER H-1
357 H.1 68HC12 REGISTER SET H-1
358 H.2 68HC12 INSTRUCTION SET H-1
359 H.2.1 Inherent Instructions H-3
360 H.2.2 Short Branch Instructions H-3
361 H.2.3 Long Branch Instructions H-3
362 H.2.4 Branch on Decrement, Test, or Increment H-4
363 H.2.5 Bit Clear and Set Instructions H-4
364 H.2.6 Branch on Bit Clear or Set H-4
365 H.2.7 Single Operand Instructions H-5
366 H.2.8 Double Operand Instructions H-6
373 H.2.9 Move Instructions H-6
374 H.2.10 D-register Instructions H-6
375 H.2.11 Index/Stack Register Instructions H-7
376 H.2.12 Jump and Jump/Call to Subroutine
378 H.2.13 Other Special Instructions H-7
379 H.2.14 Register - Register Instructions H-7
380 H.2.15 Condition Code Register Instructions H-7
381 H.2.16 M68HC11 Compatibility Mode Instructions H-8
383 APPENDIX I AS6816 ASSEMBLER I-1
384 I.1 68HC16 REGISTER SET I-1
385 I.2 68HC16 INSTRUCTION SET I-1
386 I.2.1 Inherent Instructions I-2
387 I.2.2 Push/Pull Multiple Register Instructions I-3
388 I.2.3 Short Branch Instructions I-3
389 I.2.4 Long Branch Instructions I-3
390 I.2.5 Bit Manipulation Instructions I-3
391 I.2.6 Single Operand Instructions I-4
392 I.2.7 Double Operand Instructions I-5
393 I.2.8 Index/Stack Register Instructions I-5
394 I.2.9 Jump and Jump to Subroutine Instructions I-6
395 I.2.10 Condition Code Register Instructions I-6
396 I.2.11 Multiply and Accumulate Instructions I-6
398 APPENDIX J ASH8 ASSEMBLER J-1
399 J.1 H8/3XX REGISTER SET J-1
400 J.2 H8/3XX INSTRUCTION SET J-1
401 J.2.1 Inherent Instructions J-2
402 J.2.2 Branch Instructions J-2
403 J.2.3 Single Operand Instructions J-3
404 J.2.4 Double Operand Instructions J-4
405 J.2.5 Mov Instructions J-5
406 J.2.6 Bit Manipulation Instructions J-6
407 J.2.7 Extended Bit Manipulation Instructions J-7
408 J.2.8 Condition Code Instructions J-7
409 J.2.9 Other Instructions J-8
410 J.2.10 Jump and Jump to Subroutine Instructions J-8
412 APPENDIX K AS8051 ASSEMBLER K-1
413 K.1 ACKNOWLEDGMENT K-1
414 K.2 8051 REGISTER SET K-1
415 K.3 8051 INSTRUCTION SET K-2
416 K.3.1 Inherent Instructions K-2
417 K.3.2 Move Instructions K-3
418 K.3.3 Single Operand Instructions K-3
419 K.3.4 Two Operand Instructions K-4
420 K.3.5 Call and Return Instructions K-4
421 K.3.6 Jump Instructions K-4
422 K.3.7 Predefined Symbols: SFR Map K-5
423 K.3.8 Predefined Symbols: SFR Bit Addresses K-6
424 K.3.9 Predefined Symbols: Control Bits K-7
431 APPENDIX L AS8085 ASSEMBLER L-1
432 L.1 8085 REGISTER SET L-1
433 L.2 8085 INSTRUCTION SET L-1
434 L.2.1 Inherent Instructions L-2
435 L.2.2 Register/Memory/Immediate Instructions L-2
436 L.2.3 Call and Return Instructions L-2
437 L.2.4 Jump Instructions L-2
438 L.2.5 Input/Output/Reset Instructions L-3
439 L.2.6 Move Instructions L-3
440 L.2.7 Other Instructions L-3
442 APPENDIX M ASZ80 ASSEMBLER M-1
443 M.1 .hd64 DIRECTIVE M-1
444 M.2 Z80 REGISTER SET AND CONDITIONS M-1
445 M.3 Z80 INSTRUCTION SET M-2
446 M.3.1 Inherent Instructions M-3
447 M.3.2 Implicit Operand Instructions M-3
448 M.3.3 Load Instruction M-4
449 M.3.4 Call/Return Instructions M-4
450 M.3.5 Jump and Jump to Subroutine Instructions M-4
451 M.3.6 Bit Manipulation Instructions M-5
452 M.3.7 Interrupt Mode and Reset Instructions M-5
453 M.3.8 Input and Output Instructions M-5
454 M.3.9 Register Pair Instructions M-5
455 M.3.10 HD64180 Specific Instructions M-6
457 APPENDIX N AS6500 ASSEMBLER N-1
458 N.1 ACKNOWLEDGMENT N-1
459 N.2 6500 REGISTER SET N-2
460 N.3 6500 INSTRUCTION SET N-2
461 N.3.1 Processor Specific Directives N-3
462 N.3.2 65xx Core Inherent Instructions N-3
463 N.3.3 65xx Core Branch Instructions N-3
464 N.3.4 65xx Core Single Operand Instructions N-3
465 N.3.5 65xx Core Double Operand Instructions N-4
466 N.3.6 65xx Core Jump and Jump to Subroutine
468 N.3.7 65xx Core Miscellaneous X and Y Register
470 N.3.8 65F11 and 65F12 Specific Instructions N-5
471 N.3.9 65C00/21 and 65C29 Specific Instructions N-5
472 N.3.10 65C02, 65C102, and 65C112 Specific
496 1.1 THE ASXXXX ASSEMBLERS
499 The ASxxxx assemblers are a series of microprocessor assem-
500 blers written in the C programming language. Each assembler has
501 a device specific section which includes:
503 1. device description, byte order, and file extension in-
506 2. a table of the assembler general directives, special
507 device directives, assembler mnemonics and associated
510 3. machine specific code for processing the device mnemon-
511 ics, addressing modes, and special directives
513 The device specific information is detailed in the appendices.
515 The assemblers have a common device independent section which
516 handles the details of file input/output, symbol table genera-
517 tion, program/data areas, expression analysis, and assembler
518 directive processing.
520 The assemblers provide the following features:
522 1. Command string control of assembly functions
524 2. Alphabetized, formatted symbol table listing
526 3. Relocatable object modules
528 4. Global symbols for linking object modules
530 5. Conditional assembly directives
534 THE ASSEMBLER PAGE 1-2
535 THE ASXXXX ASSEMBLERS
538 6. Program sectioning directives
541 ASxxxx assembles one or more source files into a single relo-
542 catable ascii object file. The output of the ASxxxx assemblers
543 consists of an ascii relocatable object file(*.rel), an assembly
544 listing file(*.lst), and a symbol file(*.sym).
547 1.1.1 Assembly Pass 1
550 During pass 1, ASxxxx opens all source files and performs a
551 rudimenatry assembly of each source statement. During this pro-
552 cess all symbol tables are built, program sections defined, and
553 number of bytes for each assembled source line is estimated.
555 At the end of pass 1 all undefined symbols may be made global
556 (external) using the ASxxxx switch -g, otherwise undefined sym-
557 bols will be flagged as errors during succeeding passes.
560 1.1.2 Assembly Pass 2
563 During pass 2 the ASxxxx assembler resolves forward refer-
564 ences and determines the number of bytes for each assembled
565 line. The number of bytes used by a particular assembler in-
566 struction may depend upon the addressing mode, whether the in-
567 struction allows multiple forms based upon the relative distance
568 to the addressed location, or other factors. Pass 2 resolves
569 these cases and determines the address of all symbols.
572 1.1.3 Assembly Pass 3
575 Pass 3 by the assembler generates the listing file, the relo-
576 catable output file, and the symbol tables. Also during pass 3
577 the errors will be reported.
579 The relocatable object file is an ascii file containing sym-
580 bol references and definitions, program area definitions, and
581 the relocatable assembled code, the linker ASLINK will use this
582 information to generate an absolute load file (Motorola or Intel
588 THE ASSEMBLER PAGE 1-3
589 SOURCE PROGRAM FORMAT
592 1.2 SOURCE PROGRAM FORMAT
596 1.2.1 Statement Format
599 A source program is composed of assembly-language statements.
600 Each statement must be completed on one line. A line may con-
601 tain a maximum of 128 characters, longer lines are truncated and
604 An ASxxxx assembler statement may have as many as four
605 fields. These fields are identified by their order within the
606 statement and/or by separating characters between fields. The
607 general format of the ASxxxx statement is:
609 [label:] Operator Operand [;Comment(s)]
611 The label and comment fields are optional. The operator and
612 operand fields are interdependent. The operator field may be an
613 assembler directive or an assembly mnemonic. The operand field
614 may be optional or required as defined in the context of the
617 ASxxxx interprets and processes source statements one at a
618 time. Each statement causes a particular operation to be per-
622 1.2.1.1 Label Field -
624 A label is a user-defined symbol which is assigned the value
625 of the current location counter and entered into the user de-
626 fined symbol table. The current location counter is used by
627 ASxxxx to assign memory addresses to the source program state-
628 ments as they are encountered during the assembly process. Thus
629 a label is a means of symbolically referring to a specific
632 When a program section is absolute, the value of the current
633 location counter is absolute; its value references an absolute
634 memory address. Similarly, when a program section is relocat-
635 able, the value of the current location counter is relocatable.
636 A relocation bias calculated at link time is added to the ap-
637 parent value of the current location counter to establish its
638 effective absolute address at execution time. (The user can
639 also force the linker to relocate sections defined as absolute.
640 This may be required under special circumstances.)
642 If present, a label must be the first field in a source
643 statement and must be terminated by a colon (:). For example,
646 THE ASSEMBLER PAGE 1-4
647 SOURCE PROGRAM FORMAT
650 if the value of the current location counter is absolute
651 01F0(H), the statement:
655 assigns the value 01F0(H) to the label abcd. If the location
656 counter value were relocatable, the final value of abcd would be
657 01F0(H)+K, where K represents the relocation bias of the program
658 section, as calculated by the linker at link time.
660 More than one label may appear within a single label field.
661 Each label so specified is assigned the same address value. For
662 example, if the value of the current location counter is
663 1FF0(H), the multiple labels in the following statement are each
664 assigned the value 1FF0(H):
668 Multiple labels may also appear on successive lines. For ex-
669 ample, the statements
675 likewise cause the same value to be assigned to all three la-
678 A double colon (::) defines the label as a global symbol.
679 For example, the statement
683 establishes the label abcd as a global symbol. The distinguish-
684 ing attribute of a global symbol is that it can be referenced
685 from within an object module other than the module in which the
686 symbol is defined. References to this label in other modules
687 are resolved when the modules are linked as a composite execut-
690 The legal characters for defining labels are:
699 A label may be any length, however only the first 79
700 characters are significant and, therefore must be unique among
701 all labels in the source program (not necessarily among
704 THE ASSEMBLER PAGE 1-5
705 SOURCE PROGRAM FORMAT
708 separately compiled modules). An error code(s) (m or p) will be
709 generated in the assembly listing if the first 79 characters in
710 two or more labels are the same. The m code is caused by the
711 redeclaration of the symbol or its reference by another state-
712 ment. The p code is generated because the symbols location is
713 changing on each pass through the source file.
715 The label must not start with the characters 0-9, as this
716 designates a local symbol with special attributes described in a
719 The label must not start with the sequence $$, as this
720 represents the temporary radix 16 for constants.
723 1.2.1.2 Operator Field -
725 The operator field specifies the action to be performed. It
726 may consist of an instruction mnemonic (op code) or an assembler
729 When the operator is an instruction mnemonic, a machine in-
730 struction is generated and the assembler evaluates the addresses
731 of the operands which follow. When the operator is a directive
732 ASxxxx performs certain control actions or processing operations
733 during assembly of the source program.
735 Leading and trailing spaces or tabs in the operator field
736 have no significance; such characters serve only to separate
737 the operator field from the preceeding and following fields.
739 An operator is terminated by a space, tab or end of line.
742 1.2.1.3 Operand Field -
744 When the operator is an instruction mnemonic (op code), the
745 operand field contains program variables that are to be
746 evaluated/manipulated by the operator.
748 Operands may be expressions or symbols, depending on the
749 operator. Multiple expressions used in the operand fields may
750 be separated by a comma. An operand should be preceeded by an
751 operator field; if it is not, the statement will give an error
752 (q or o). All operands following instruction mnemonics are
753 treated as expressions.
755 The operand field is terminated by a semicolon when the field
756 is followed by a comment. For example, in the following
759 label: lda abcd,x ;Comment field
762 THE ASSEMBLER PAGE 1-6
763 SOURCE PROGRAM FORMAT
767 the tab between lda and abcd terminates the operator field and
768 defines the beginning of the operand field; a comma separates
769 the operands abcd and x; and a semicolon terminates the operand
770 field and defines the beginning of the comment field. When no
771 comment field follows, the operand field is terminated by the
772 end of the source line.
775 1.2.1.4 Comment Field -
777 The comment field begins with a semicolon and extends through
778 the end of the line. This field is optional and may contain any
779 7-bit ascii character except null.
781 Comments do not affect assembly processing or program execu-
785 1.3 SYMBOLS AND EXPRESSIONS
788 This section describes the generic components of the ASxxxx
789 assemblers: the character set, the conventions observed in con-
790 structing symbols, and the use of numbers, operators, and ex-
797 The following characters are legal in ASxxxx source programs:
799 1. The letters A through Z. Both upper- and lower-case
800 letters are acceptable. The assemblers, by default,
801 are not case sensitive, i.e. ABCD and abcd are the
802 same symbols. (The assemblers can be made case sensi-
803 tive by using the -z command line option.)
805 2. The digits 0 through 9
807 3. The characters . (period), $ (dollar sign), and _ (un-
810 4. The special characters listed in Tables 1 through 6.
813 Tables 1 through 6 describe the various ASxxxx label and
814 field terminators, assignment operators, operand separators, as-
815 sembly, unary, binary, and radix operators.
818 THE ASSEMBLER PAGE 1-7
819 SYMBOLS AND EXPRESSIONS
822 Table 1 Label Terminators and Assignment Operators
823 ----------------------------------------------------------------
825 : Colon Label terminator.
827 :: Double colon Label Terminator; defines the
828 label as a global label.
830 = Equal sign Direct assignment operator.
832 == Double equal Direct assignment operator;
833 sign defines the symbol as a global
836 ----------------------------------------------------------------
842 Table 2 Field Terminators and Operand Separators
843 ----------------------------------------------------------------
845 Tab Item or field terminator.
847 Space Item or field terminator.
849 , Comma Operand field separator.
851 ; Semicolon Comment field indicator.
853 ----------------------------------------------------------------
859 Table 3 Assembler Operators
860 ----------------------------------------------------------------
862 # Number sign Immediate expression indicator.
864 . Period Current location counter.
866 ( Left parenthesis Expression delimiter.
868 ) Right parenthesis Expression delimeter.
870 ----------------------------------------------------------------
873 THE ASSEMBLER PAGE 1-8
874 SYMBOLS AND EXPRESSIONS
882 Table 4 Unary Operators
883 ----------------------------------------------------------------
885 < Left bracket <FEDC Produces the lower byte
886 value of the expression.
889 > Right bracket >FEDC Produces the upper byte
890 value of the expression.
893 + Plus sign +A Positive value of A
895 - Minus sign -A Produces the negative
896 (2's complement) of A.
898 ~ Tilde ~A Produces the 1's comple-
901 ' Single quote 'D Produces the value of
904 " Double quote "AB Produces the double byte
907 \ Backslash '\n Unix style characters
909 or '\001 or octal byte values.
911 ----------------------------------------------------------------
919 THE ASSEMBLER PAGE 1-9
920 SYMBOLS AND EXPRESSIONS
923 Table 5 Binary Operators
924 ----------------------------------------------------------------
926 << Double 0800 << 4 Produces the 4 bit
927 Left bracket left-shifted value of
930 >> Double 0800 >> 4 Produces the 4 bit
931 Right bracket right-shifted value of
934 + Plus sign A + B Arithmetic Addition
937 - Minus sign A - B Arithmetic Subtraction
940 * Asterisk A * B Arithmetic Multiplica-
941 tion operator. (signed
944 / Slash A / B Arithmetic Division
948 & Ampersand A & B Logical AND operator.
950 | Bar A | B Logical OR operator.
952 % Percent sign A % B Modulus operator.
955 ^ Up arrow or A ^ B EXCLUSIVE OR operator.
958 ----------------------------------------------------------------
966 THE ASSEMBLER PAGE 1-10
967 SYMBOLS AND EXPRESSIONS
970 Table 6 Temporary Radix Operators
971 ----------------------------------------------------------------
973 $%, 0b, 0B Binary radix operator.
975 $&, 0o, 0O, 0q, 0Q Octal radix operator.
977 $#, 0d, 0D Decimal radix operator.
979 $$, 0h, 0H, 0x, 0X Hexidecimal radix operator.
982 Potential ambiguities arising from the use of 0b and 0d
983 as temporary radix operators may be circumvented by pre-
984 ceding all non-prefixed hexidecimal numbers with 00.
985 Leading 0's are required in any case where the first
986 hexidecimal digit is abcdef as the assembler will treat
987 the letter sequence as a label.
989 ----------------------------------------------------------------
997 1.3.2 User-Defined Symbols
1000 User-defined symbols are those symbols that are equated to a
1001 specific value through a direct assignment statement or appear
1002 as labels. These symbols are added to the User Symbol Table as
1003 they are encountered during assembly.
1005 The following rules govern the creation of user-defined symbols:
1007 1. Symbols can be composed of alphanumeric characters,
1008 dollar signs ($), periods (.), and underscores (_)
1011 2. The first character of a symbol must not be a number
1012 (except in the case of local symbols).
1014 3. The first 79 characters of a symbol must be unique. A
1015 symbol can be written with more than 79 legal
1016 characters, but the 80th and subsequent characters are
1019 4. Spaces and Tabs must not be embedded within a symbol.
1024 THE ASSEMBLER PAGE 1-11
1025 SYMBOLS AND EXPRESSIONS
1031 Local symbols are specially formatted symbols used as labels
1032 within a block of coding that has been delimited as a local sym-
1033 bol block. Local symbols are of the form n$, where n is a
1034 decimal integer from 0 to 255, inclusive. Examples of local
1042 The range of a local symbol block consists of those state-
1043 ments between two normally constructed symbolic labels. Note
1044 that a statement of the form:
1048 is a direct assignment statement but does not create a label and
1049 thus does not delimit the range of a local symbol block.
1051 Note that the range of a local symbol block may extend across
1054 Local symbols provide a convenient means of generating labels
1055 for branch instructions and other such references within local
1056 symbol blocks. Using local symbols reduces the possibility of
1057 symbols with multiple definitions appearing within a user pro-
1058 gram. In addition, the use of local symbols differentiates
1059 entry-point labels from local labels, since local labels cannot
1060 be referenced from outside their respective local symbol blocks.
1061 Thus, local symbols of the same name can appear in other local
1062 symbol blocks without conflict. Local symbols require less sym-
1063 bol table space than normal symbols. Their use is recommended.
1065 The use of the same local symbol within a local symbol block
1066 will generate one or both of the m or p errors.
1069 THE ASSEMBLER PAGE 1-12
1070 SYMBOLS AND EXPRESSIONS
1073 Example of local symbols:
1075 a: ldx #atable ;get table address
1076 lda #0d48 ;table length
1081 b: ldx #btable ;get table address
1082 lda #0d48 ;table length
1088 1.3.4 Current Location Counter
1091 The period (.) is the symbol for the current location coun-
1092 ter. When used in the operand field of an instruction, the
1093 period represents the address of the first byte of the
1096 AS: ldx #. ;The period (.) refers to
1097 ;the address of the ldx
1100 When used in the operand field of an ASxxxx directive, it
1101 represents the address of the current byte or word:
1105 .word 0xFFFE,.+4,QK ;The operand .+4 in the .word
1106 ;directive represents a value
1107 ;stored in the second of the
1108 ;three words during assembly.
1110 If we assume the current value of the program counter is
1111 0H0200, then during assembly, ASxxxx reserves three words of
1112 storage starting at location 0H0200. The first value, a hex-
1113 idecimal constant FFFE, will be stored at location 0H0200. The
1114 second value represented by .+4 will be stored at location
1115 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
1116 value defined by the symbol QK will be placed at location
1119 At the beginning of each assembly pass, ASxxxx resets the lo-
1120 cation counter. Normally, consecutive memory locations are as-
1121 signed to each byte of object code generated. However, the
1122 value of the location counter can be changed through a direct
1123 assignment statement of the following form:
1127 THE ASSEMBLER PAGE 1-13
1128 SYMBOLS AND EXPRESSIONS
1134 The new location counter can only be specified relative to
1135 the current location counter. Neglecting to specify the current
1136 program counter along with the expression on the right side of
1137 the assignment operator will generate the (.) error. (Absolute
1138 program areas may use the .org directive to specify the absolute
1139 location of the current program counter.)
1141 The following coding illustrates the use of the current location
1144 .area CODE1 (ABS) ;program area CODE1
1147 .org 0H100 ;set location to
1150 num1: ldx #.+0H10 ;The label num1 has
1155 .org 0H130 ;location counter
1158 num2: ldy #. ;The label num2 has
1164 .area CODE2 (REL) ;program area CODE2
1167 . = . + 0H20 ;Set location counter
1168 ;to relocatable 0H20 of
1169 ;the program section.
1171 num3: .word 0 ;The label num3 has
1173 ;of relocatable 0H20.
1175 . = . + 0H40 ;will reserve 0H40
1176 ;bytes of storage as will
1180 The .blkb and .blkw directives are the preferred methods of
1185 THE ASSEMBLER PAGE 1-14
1186 SYMBOLS AND EXPRESSIONS
1192 ASxxxx assumes that all numbers in the source program are to
1193 be interpreted in decimal radix unless otherwise specified. The
1194 .radix directive may be used to specify the default as octal,
1195 decimal, or hexidecimal. Individual numbers can be designated
1196 as binary, octal, decimal, or hexidecimal through the temporary
1197 radix prefixes shown in table 6.
1199 Negative numbers must be preceeded by a minus sign; ASxxxx
1200 translates such numbers into two's complement form. Positive
1201 numbers may (but need not) be preceeded by a plus sign.
1203 Numbers are always considered to be absolute values, therefor
1204 they are never relocatable.
1210 A term is a component of an expression and may be one of the
1217 1. A period (.) specified in an expression causes the
1218 current location counter to be used.
1219 2. A User-defined symbol.
1220 3. An undefined symbol is assigned a value of zero and
1221 inserted in the User-Defined symbol table as an un-
1224 3. A single quote followed by a single ascii character, or
1225 a double quote followed by two ascii characters.
1227 4. An expression enclosed in parenthesis. Any expression
1228 so enclosed is evaluated and reduced to a single term
1229 before the remainder of the expression in which it ap-
1230 pears is evaluated. Parenthesis, for example, may be
1231 used to alter the left-to-right evaluation of expres-
1232 sions, (as in A*B+C versus A*(B+C)), or to apply a un-
1233 ary operator to an entire expression (as in -(A+B)).
1235 5. A unary operator followed by a symbol or number.
1241 THE ASSEMBLER PAGE 1-15
1242 SYMBOLS AND EXPRESSIONS
1248 Expressions are combinations of terms joined together by
1249 binary operators. Expressions reduce to a 16-bit value. The
1250 evaluation of an expression includes the determination of its
1251 attributes. A resultant expression value may be one of three
1252 types (as described later in this section): relocatable, ab-
1253 solute, and external.
1255 Expressions are evaluate with an operand hierarchy as follows:
1257 * / % multiplication,
1264 << >> left shift and
1267 ^ exclusive or fourth.
1269 & logical and fifth.
1273 except that unary operators take precedence over binary
1277 A missing or illegal operator terminates the expression
1278 analysis, causing error codes (o) and/or (q) to be generated
1279 depending upon the context of the expression itself.
1281 At assembly time the value of an external (global) expression
1282 is equal to the value of the absolute part of that expression.
1283 For example, the expression external+4, where 'external' is an
1284 external symbol, has the value of 4. This expression, however,
1285 when evaluated at link time takes on the resolved value of the
1286 symbol 'external', plus 4.
1288 Expressions, when evaluated by ASxxxx, are one of three
1289 types: relocatable, absolute, or external. The following dis-
1290 tinctions are important:
1292 1. An expression is relocatable if its value is fixed re-
1293 lative to the base address of the program area in which
1294 it appears; it will have an offset value added at link
1295 time. Terms that contain labels defined in relocatable
1296 program areas will have a relocatable value;
1299 THE ASSEMBLER PAGE 1-16
1300 SYMBOLS AND EXPRESSIONS
1303 similarly, a period (.) in a relocatable program area,
1304 representing the value of the current program location
1305 counter, will also have a relocatable value.
1307 2. An expression is absolute if its value is fixed. An
1308 expression whose terms are numbers and ascii characters
1309 will reduce to an absolute value. A relocatable ex-
1310 pression or term minus a relocatable term, where both
1311 elements being evaluated belong to the same program
1312 area, is an absolute expression. This is because every
1313 term in a program area has the same relocation bias.
1314 When one term is subtracted from the other the reloca-
1317 3. An expression is external (or global) if it contains a
1318 single global reference (plus or minus an absolute ex-
1319 pression value) that is not defined within the current
1320 program. Thus, an external expression is only par-
1321 tially defined following assembly and must be resolved
1326 1.4 GENERAL ASSEMBLER DIRECTIVES
1329 An ASxxxx directive is placed in the operator field of the
1330 source line. Only one directive is allowed per source line.
1331 Each directive may have a blank operand field or one or more
1332 operands. Legal operands differ with each directive.
1335 1.4.1 .module Directive
1341 The .module directive causes the string to be included in the
1342 assemblers output file as an identifier for this particular ob-
1343 ject module. The string may be from 1 to 79 characters in
1344 length. Only one identifier is allowed per assembled module.
1345 The main use of this directive is to allow the linker to report
1346 a modules' use of undefined symbols. At link time all undefined
1347 symbols are reported and the modules referencing them are
1353 THE ASSEMBLER PAGE 1-17
1354 GENERAL ASSEMBLER DIRECTIVES
1357 1.4.2 .title Directive
1363 The .title directive provides a character string to be placed
1364 on the second line of each page during listing.
1367 1.4.3 .sbttl Directive
1373 The .sbttl directive provides a character string to be placed
1374 on the third line of each page during listing.
1377 1.4.4 .page Directive
1383 The .page directive causes a page ejection with a new heading
1384 to be printed. The new page occurs after the next line of the
1385 source program is processed, this allows an immediately follow-
1386 ing .sbttl directive to appear on the new page. The .page
1387 source line will not appear in the file listing. Paging may be
1388 disabled by invoking the -p directive.
1391 1.4.5 .byte and .db Directives
1395 .byte exp ;Stores the binary value
1396 .db exp ;of the expression in the
1399 .byte exp1,exp2,expn ;Stores the binary values
1400 .db exp1,exp2,expn ;of the list of expressions
1401 ;in successive bytes.
1403 where: exp, represent expressions that will be
1404 exp1, truncated to 8-bits of data.
1405 . Each expression will be calculated
1406 . as a 16-bit word expression,
1407 . the high-order byte will be truncated.
1408 . Multiple expressions must be
1411 THE ASSEMBLER PAGE 1-18
1412 GENERAL ASSEMBLER DIRECTIVES
1415 expn separated by commas.
1417 The .byte or .db directives are used to generate successive
1418 bytes of binary data in the object module.
1421 1.4.6 .word and .dw Directives
1425 .word exp ;Stores the binary value
1426 .dw exp ;of the expression in
1429 .word exp1,exp2,expn ;Stores the binary values
1430 .dw exp1,exp2,expn ;of the list of expressions
1431 ;in successive words.
1433 where: exp, represent expressions that will occupy two
1434 exp1, bytes of data. Each expression will be
1435 . calculated as a 16-bit word expression.
1436 . Multiple expressions must be
1437 expn separated by commas.
1439 The .word or .dw directives are used to generate successive
1440 words of binary data in the object module.
1443 1.4.7 .blkb, .blkw, and .ds Directives
1447 .blkb N ;reserve N bytes of space
1448 .blkw N ;reserve N words of space
1449 .ds N ;reserve N bytes of space
1451 The .blkb and .ds directives reserve byte blocks in the ob-
1452 ject module; the .blkw directive reserves word blocks.
1455 1.4.8 .ascii Directive
1461 where: string is a string of printable ascii characters.
1463 / / represent the delimiting characters. These
1464 delimiters may be any paired printing
1465 characters, as long as the characters are not
1466 contained within the string itself. If the
1469 THE ASSEMBLER PAGE 1-19
1470 GENERAL ASSEMBLER DIRECTIVES
1473 delimiting characters do not match, the .ascii
1474 directive will give the (q) error.
1476 The .ascii directive places one binary byte of data for each
1477 character in the string into the object module.
1480 1.4.9 .ascis Directive
1486 where: string is a string of printable ascii characters.
1488 / / represent the delimiting characters. These
1489 delimiters may be any paired printing
1490 characters, as long as the characters are not
1491 contained within the string itself. If the
1492 delimiting characters do not match, the .ascis
1493 directive will give the (q) error.
1495 The .ascis directive places one binary byte of data for each
1496 character in the string into the object module. The last
1497 character in the string will have the high order bit set.
1500 1.4.10 .asciz Directive
1506 where: string is a string of printable ascii characters.
1508 / / represent the delimiting characters. These
1509 delimiters may be any paired printing
1510 characters, as long as the characters are not
1511 contained within the string itself. If the
1512 delimiting characters do not match, the .asciz
1513 directive will give the (q) error.
1515 The .asciz directive places one binary byte of data for each
1516 character in the string into the object module. Following all
1517 the character data a zero byte is inserted to terminate the
1523 THE ASSEMBLER PAGE 1-20
1524 GENERAL ASSEMBLER DIRECTIVES
1527 1.4.11 .radix Directive
1533 where: character represents a single character specifying the
1534 default radix to be used for succeeding numbers.
1535 The character may be any one of the following:
1549 1.4.12 .even Directive
1555 The .even directive ensures that the current location counter
1556 contains an even boundary value by adding 1 if the current loca-
1560 1.4.13 .odd Directive
1566 The .odd directive ensures that the current location counter
1567 contains an odd boundary value by adding one if the current lo-
1573 THE ASSEMBLER PAGE 1-21
1574 GENERAL ASSEMBLER DIRECTIVES
1577 1.4.14 .area Directive
1581 .area name [(options)]
1583 where: name represents the symbolic name of the program sec-
1584 tion. This name may be the same as any
1585 user-defined symbol as the area names are in-
1586 dependent of all symbols and labels.
1588 options specify the type of program or data area:
1596 The .area directive provides a means of defining and separat-
1597 ing multiple programming and data sections. The name is the
1598 area label used by the assembler and the linker to collect code
1599 from various separately assembled modules into one section. The
1600 name may be from 1 to 79 characters in length.
1602 The options are specified within parenthesis and separated by
1603 commas as shown in the following example:
1605 .area TEST (REL,CON) ;This section is relocatable
1606 ;and concatenated with other
1607 ;sections of this program area.
1609 .area DATA (REL,OVR) ;This section is relocatable
1610 ;and overlays other sections
1611 ;of this program area.
1613 .area SYS (ABS,OVR) ;This section is defined as
1614 ;absolute and overlays other
1615 ;sections of this program area.
1617 .area PAGE (PAG) ;This is a paged section. The
1618 ;section must be on a 256 byte
1619 ;boundary and its length is
1620 ;checked by the linker to be
1621 ;no larger than 256 bytes.
1622 ;This is useful for direct page
1627 THE ASSEMBLER PAGE 1-22
1628 GENERAL ASSEMBLER DIRECTIVES
1631 The default area type is REL|CON; i.e. a relocatable sec-
1632 tion which is concatenated with other sections of code with the
1633 same area name. The ABS option indicates an absolute area. The
1634 OVR and CON options indicate if program sections of the same
1635 name will overlay each other (start at the same location) or be
1636 concatenated with each other (appended to each other).
1638 Warning: ABS used to automatically invoke OVR and CON was not
1639 allowed with ABS. This behaviour has been changed. Absolute
1640 sections need an explicit OVR flag to be overlayed with other
1641 sections of this program area. Overlapping absolute areas will
1642 generate a warning unless OVR is specified.
1644 Multiple invocations of the .area directive with the same
1645 name must specify the same options or leave the options field
1646 blank, this defaults to the previously specified options for
1649 The ASxxxx assemblers automatically provide two program
1652 '. .ABS.' This dummy section contains all absolute
1653 symbols and their values.
1655 '_CODE' This is the default program/data area.
1656 This program area is of type (REL,CON).
1658 The ASxxxx assemblers also automatically generate two symbols
1659 for each program area:
1661 's_<area>' This is the starting address of the pro-
1664 indent -16 'l_<area>' This is the
1665 length of the program area.
1667 The .area names and options are never case sensitive.
1670 1.4.15 .org Directive
1676 where: exp is an absolute expression that becomes the cur-
1677 rent location counter.
1679 The .org directive is valid only in an absolute program section
1680 and will give a (q) error if used in a relocatable program area.
1681 The .org directive specifies that the current location counter
1682 is to become the specified absolute value.
1687 THE ASSEMBLER PAGE 1-23
1688 GENERAL ASSEMBLER DIRECTIVES
1691 1.4.16 .globl Directive
1695 .globl sym1,sym2,...,symn
1697 where: sym1, represent legal symbolic names. When
1698 sym2,... When multiple symbols are specified,
1699 symn they are separated by commas.
1701 A .globl directive may also have a label field and/or a com-
1704 The .globl directive is provided to define (and thus provide
1705 linkage to) symbols not otherwise defined as global symbols
1706 within a module. In defining global symbols the directive
1707 .globl J is similar to:
1709 J == expression or J::
1711 Because object modules are linked by global symbols, these
1712 symbols are vital to a program. All internal symbols appearing
1713 within a given program must be defined at the end of pass 1 or
1714 they will be considered undefined. The assembly directive (-g)
1715 can be be invoked to make all undefined symbols global at the
1719 1.4.17 .if, .else, and .endif Directives
1725 . ;} range of true condition
1729 . ;} range of false condition
1733 The conditional assembly directives allow you to include or
1734 exclude blocks of source code during the assembly process, based
1735 on the evaluation of the condition test.
1737 The range of true condition will be processed if the expres-
1738 sion 'expr' is not zero (i.e. true) and the range of false con-
1739 dition will be processed if the expression 'expr' is zero (i.e
1740 false). The range of true condition is optional as is the .else
1741 directive and the range of false condition. The following are
1742 all valid .if/.else/.endif constructions:
1745 THE ASSEMBLER PAGE 1-24
1746 GENERAL ASSEMBLER DIRECTIVES
1750 .if A-4 ;evaluate A-4
1751 .byte 1,2 ;insert bytes if A-4 is
1754 .if K+3 ;evaluate K+3
1756 .byte 3,4 ;insert bytes if K+3
1759 .if J&3 ;evaluate J masked by 3
1760 .byte 12 ;insert this byte if J&3
1762 .byte 13 ;insert this byte if J&3
1766 The .if/.else/.endif directives may be nested upto 10 levels.
1768 The .page directive is processed within a false condition
1769 range to allow extended textual information to be incorporated
1770 in the source program with out the need to use the comment
1776 This text will be bypassed during assembly
1777 but appear in the listing file.
1785 1.4.18 .include Directive
1791 where: string represents a delimited string that is the file
1792 specification of an ASxxxx source file.
1794 The .include directive is used to insert a source file within
1795 the source file currently being assembled. When this directive
1796 is encountered, an implicit .page directive is issued. When the
1797 end of the specified source file is reached, an implicit .page
1798 directive is issued and input continues from the previous source
1799 file. The maximum nesting level of source files specified by a
1800 .include directive is five.
1803 THE ASSEMBLER PAGE 1-25
1804 GENERAL ASSEMBLER DIRECTIVES
1807 The total number of separately specified .include files is
1808 unlimited as each .include file is opened and then closed during
1809 each pass made by the assembler.
1812 1.4.19 .setdp Directive
1816 .setdp [base [,area]]
1818 The set direct page directive has a common format in all the
1819 AS68xx assemblers. The .setdp directive is used to inform the
1820 assembler of the current direct page region and the offset ad-
1821 dress within the selected area. The normal invocation methods
1831 for all the 68xx microprocessors (the 6804 has only the paged
1832 ram area). The commands specify that the direct page is in area
1833 DIRECT and its offset address is 0 (the only valid value for all
1834 but the 6809 microprocessor). Be sure to place the DIRECT area
1835 at address 0 during linking. When the base address and area are
1836 not specified, then zero and the current area are the defaults.
1837 If a .setdp directive is not issued the assembler defaults the
1838 direct page to the area "_CODE" at offset 0.
1840 The assembler verifies that any local variable used in a
1841 direct variable reference is located in this area. Local vari-
1842 able and constant value direct access addresses are checked to
1843 be within the address range from 0 to 255.
1845 External direct references are assumed by the assembler to be
1846 in the correct area and have valid offsets. The linker will
1847 check all direct page relocations to verify that they are within
1850 The 6809 microprocessor allows the selection of the direct
1851 page to be on any 256 byte boundary by loading the appropriate
1852 value into the dp register. Typically one would like to select
1853 the page boundary at link time, one method follows:
1856 THE ASSEMBLER PAGE 1-26
1857 GENERAL ASSEMBLER DIRECTIVES
1860 .area DIRECT (PAG) ; define the direct page
1867 ldd #DIRECT ; load the direct page register
1868 tfr a,dp ; for access to the direct page
1870 At link time specify the base and global equates to locate the
1876 Both the area address and offset value must be specified (area
1877 and variable names are independent). The linker will verify
1878 that the relocated direct page accesses are within the direct
1880 The preceeding sequence could be repeated for multiple paged
1881 areas, however an alternate method is to define a non-paged area
1882 and use the .setdp directive to specify the offset value:
1884 .area DIRECT ; define non-paged area
1890 .setdp 0,DIRECT ; direct page area
1891 ldd #DIRECT ; load the direct page register
1892 tfr a,dp ; for access to the direct page
1895 .setdp 0x100,DIRECT ; direct page area
1896 ldd #DIRECT+0x100 ; load the direct page register
1897 tfr a,dp ; for access to the direct page
1899 The linker will verify that subsequent direct page references
1900 are in the specified area and offset address range. It is the
1901 programmers responsibility to load the dp register with the cor-
1902 rect page segment corresponding to the .setdp base address
1905 For those cases where a single piece of code must access a
1906 defined data structure within a direct page and there are many
1907 pages, define a dumby direct page linked at address 0. This
1908 dumby page is used only to define the variable labels. Then
1909 load the dp register with the real base address but donot use a
1910 .setdp directive. This method is equivalent to indexed
1913 THE ASSEMBLER PAGE 1-27
1914 GENERAL ASSEMBLER DIRECTIVES
1917 addressing, where the dp register is the index register and the
1918 direct addressing is the offset.
1924 The ASxxxx assemblers are command line oriented. The PC as-
1925 semblers are started with the appropriate option(s) and file(s)
1926 to assemble following the assembler name:
1928 as6809 [-dqxgalosff] file1 [file2 file3 ... file6]
1934 x hex listing (default)
1936 The listing radix affects the
1937 .lst, .rel, and .sym files.
1939 g undefined symbols made global
1940 a all user symbols made global
1942 l create list output file1.lst
1943 o create object output file1.rel
1944 s create symbol output file1.sym
1946 p disable listing pagination
1947 w wide listing format for symbol table
1949 z enable case sensitivity for symbols
1951 relocatable reference flagging:
1953 f by ` in the listing file
1954 ff by mode in the listing file
1956 The file name for the .lst, .rel, and .sym files is the first
1957 file name specified in the command line. All output files are
1958 ascii text files which may be edited, copied, etc. The output
1959 files are the concatenation of all the input files, if files are
1960 to be assembled independently invoke the assembler for each
1963 The .rel file contains a radix directive so that the linker
1964 will use the proper conversion for this file. Linked files may
1965 have different radices.
1969 THE ASSEMBLER PAGE 1-28
1973 If the list (l) option is specified without the symbol table
1974 (s) option, the symbol table is placed at the end of the listing
1981 The ASxxxx assemblers provide limited diagnostic error codes
1982 during the assembly process, these errors will be noted in the
1983 listing file and printed on the stderr device.
1985 The assembler reports the errors on the stderr device as
1987 ?ASxxxx-Error-<*> in line nnn of filename
1989 where * is the error code, nnn is the line number, and filename
1990 is the source/include file.
1994 (.) This error is caused by an absolute direct assign-
1995 ment of the current location counter
1996 . = expression (incorrect)
1997 rather than the correct
2000 (a) Indicates a machine specific addressing or address-
2003 (b) Indicates a direct page boundary error.
2005 (d) Indicates a direct page addressing error.
2007 (i) Caused by an .include file error or an .if/.endif
2010 (m) Multiple definitions of the same label, multiple
2011 .module directives, or multiple conflicting attri-
2012 butes in an .area directive.
2014 (o) Directive or mnemonic error or the use of the .org
2015 directive in a relocatable area.
2017 (p) Phase error: label location changing between passes
2018 2 and 3. Normally caused by having more than one
2019 level of forward referencing.
2021 (q) Questionable syntax: missing or improper operators,
2022 terminators, or delimiters.
2024 (r) Relocation error: logic operation attempted on a
2027 THE ASSEMBLER PAGE 1-29
2031 relocatable term, addition of two relocatable terms,
2032 subtraction of two relocatable terms not within the
2033 same programming area or external symbols.
2035 (u) Undefined symbol encountered during assembly.
2041 The (-l) option produces an ascii output listing file. Each
2042 page of output contains a four line header:
2045 1. The ASxxxx program name and page number
2047 2. Title from a .title directive (if any)
2049 3. Subtitle from a .sbttl directive (if any)
2055 Each succeeding line contains five fields:
2058 1. Error field (first three characters of line)
2060 2. Current location counter
2062 3. Generated code in byte format
2064 4. Source text line number
2069 The error field may contain upto 2 error flags indicating any
2070 errors encountered while assembling this line of source code.
2072 The current location counter field displays the 16-bit pro-
2073 gram position. This field will be in the selected radix.
2075 The generated code follows the program location. The listing
2076 radix determines the number of bytes that will be displayed in
2077 this field. Hexidecimal listing allows six bytes of data within
2078 the field, decimal and octal allow four bytes within the field.
2079 If more than one field of data is generated from the assembly of
2080 a single line of source code, then the data field is repeated on
2085 THE ASSEMBLER PAGE 1-30
2089 The source text line number is printed in decimal and is fol-
2090 lowed by the source text.
2092 Two special cases will disable the listing of a line of
2095 1. Source line with a .page directive is never listed.
2097 2. Source line with a .include file directive is not
2098 listed unless the .include file cannot be opened.
2101 Two data field options are available to flag those bytes
2102 which will be relocated by the linker. If the -f option is
2103 specified then each byte to be relocated will be preceeded by
2104 the '`' character. If the -ff option is specified then each
2105 byte to be relocated will be preceeded by one of the following
2108 1. * paged relocation
2110 2. u low byte of unsigned word or unsigned byte
2112 3. v high byte of unsigned word
2114 4. p PCR low byte of word relocation or PCR byte
2116 5. q PCR high byte of word relocation
2118 6. r low byte relocation or byte relocation
2120 7. s high byte relocation
2124 1.8 SYMBOL TABLE FILE
2127 The symbol table has two parts:
2129 1. The alphabetically sorted list of symbols and/or labels
2130 defined or referenced in the source program.
2132 2. A list of the program areas defined during assembly of
2136 The sorted list of symbols and/or labels contains the follow-
2139 1. Program area number (none if absolute value or exter-
2143 THE ASSEMBLER PAGE 1-31
2147 2. The symbol or label
2149 3. Directly assigned symbol is denoted with an (=) sign
2151 4. The value of a symbol, location of a label relative to
2152 the program area base address (=0), or a **** indicat-
2153 ing the symbol or label is undefined.
2155 5. The characters: G - global, R - relocatable, and X -
2159 The list of program areas provides the correspondence between
2160 the program area numbers and the defined program areas, the size
2161 of the program areas, and the area flags (attributes).
2167 The object file is an ascii file containing the information
2168 needed by the linker to bind multiple object modules into a com-
2169 plete loadable memory image. The object module contains the
2170 following designators:
2177 H Most significant byte first
2178 L Least significant byte first
2185 R Relocation information
2186 P Paging information
2188 Refer to the linker for a detailed description of each of the
2189 designators and the format of the information contained in the
2213 2.1 ASLINK RELOCATING LINKER
2216 ASLINK is the companion linker for the ASxxxx assemblers.
2218 The program ASLINK is a general relocating linker performing
2219 the following functions:
2221 1. Bind multiple object modules into a single memory image
2223 2. Resolve inter-module symbol references
2225 3. Combine code belonging to the same area from multiple
2226 object files into a single contiguous memory region
2228 4. Search and import object module libraries for undefined
2231 5. Perform byte and word program counter relative
2232 (pc or pcr) addressing calculations
2234 6. Define absolute symbol values at link time
2236 7. Define absolute area base address values at link time
2238 8. Produce Intel Hex or Motorola S19 output file
2240 9. Produce a map of the linked memory image
2242 10. Produce an updated listing file with the relocated ad-
2256 The linker may run in the command line mode or command file
2257 modes. The allowed startup linker commands are:
2259 -c/-f command line / command file modes
2261 -p/-n enable/disable echo file.lnk input to stdout
2263 If command line mode is selected, all linker commands come
2264 from stdin, if the command file mode is selected the commands
2265 are input from the specified file (extension must be .lnk).
2267 Most sytems require the initial options to be entered on the
2272 Some systems may request the arguments after the linker is
2273 started at a system specific prompt:
2278 After invoking the linker the valid options are:
2280 1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19)
2283 2. -z Specifies that symbol names are case sensitive.
2285 3. -m Generate a map file (file.map). This file con-
2286 tains a list of the symbols (by area) with absolute ad-
2287 dresses, sizes of linked areas, and other linking
2290 4. -w Specifies that a wide listing format be used
2293 5. -xdq Specifies the number radix for the map file
2294 (Hexidecimal, Decimal, or Octal).
2296 6. -u Generate an updated listing file (file.rst)
2297 derived from the relocated addresses and data from the
2300 7. fileN Files to be linked. Files may be on the same
2301 line as the above options or on a separate line(s) one
2302 file per line or multiple files separated by spaces or
2311 8. -b area = expression (one definition per line)
2312 This specifies an area base address where the expres-
2313 sion may contain constants and/or defined symbols from
2316 9. -g symbol = expression (one definition per line)
2317 This specifies the value for the symbol where the ex-
2318 pression may contain constants and/or defined symbols
2319 from the linked files.
2321 10. -k library directory path
2322 (one definition per line) This specifies one possible
2323 path to an object library. More than one path is al-
2326 11. -l library file specification
2327 (one definition per line) This specifies a possible
2328 library file. More than one file is allowed.
2330 12. -e or null line, terminates input to the linker.
2334 2.3 LIBRARY PATH(S) AND FILE(S)
2337 The process of resolving undefined symbols after scanning the
2338 input object files includes the scanning of object module
2339 libraries. The linker will search through all combinations of
2340 the library path specifications (input by the -k option) and the
2341 library file specifications (input by the -l option) that lead
2342 to an existing library file. Each library file contains a list
2343 (one file per line) of modules included in this particular
2344 library. Each existing object module is scanned for a match to
2345 the undefined symbol. The first module containing the symbol is
2346 then linked with the previous modules to resolve the symbol de-
2347 finition. The library object modules are rescanned until no
2348 more symbols can be resolved. The scanning algorithm allows
2349 resolution of back references. No errors are reported for non
2350 existant library files or object modules.
2352 The library file specification may be formed in one of two
2355 1. If the library file contained an absolute path/file
2356 specification then this is the object module's
2360 2. If the library file contains a relative path/file
2361 specification then the concatenation of the path and
2365 LIBRARY PATH(S) AND FILE(S)
2368 this file specification becomes the object module's
2373 As an example, assume there exists a library file termio.lib
2374 in the syslib directory specifying the following object modules:
2376 \6809\io_disk first object module
2377 d:\special\io_comm second object module
2379 and the following parameters were specified to the linker:
2381 -k c:\iosystem\ the first path
2382 -k c:\syslib\ the second path
2384 -l termio the first library file
2385 -l io the second library file (no such file)
2387 The linker will attempt to use the following object modules to
2388 resolve any undefined symbols:
2390 c:\syslib\6809\io_disk.rel (concatenated path/file)
2391 d:\special\io_comm.rel (absolute path/file)
2393 all other path(s)/file(s) don't exist. (No errors are reported
2394 for non existant path(s)/file(s).)
2397 2.4 ASLINK PROCESSING
2400 The linker processes the files in the order they are
2401 presented. The first pass through the input files is used to
2402 define all program areas, the section area sizes, and symbols
2403 defined or referenced. Undefined symbols will initiate a search
2404 of any specified library file(s) and the importing of the module
2405 containing the symbol definition. After the first pass the -b
2406 (area base address) definitions, if any, are processed and the
2409 The area linking proceeds by first examining the area types
2410 ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
2411 object modules are always overlayed and have been assembled at a
2412 specific address, these are not normally relocated (if a -b com-
2413 mand is used on an absolute area the area will be relocated).
2414 Relative areas (normally defined as REL|CON) have a base address
2415 of 0x0000 as read from the object files, the -b command speci-
2416 fies the beginning address of the area. All subsequent relative
2417 areas will be concatenated with proceeding relative areas.
2418 Where specific ordering is desired, the first linker input file
2419 should have the area definitions in the desired order. At the
2426 completion of the area linking all area addresses and lengths
2427 have been determined. The areas of type PAG are verified to be
2428 on a 256 byte boundary and that the length does not exceed 256
2429 bytes. Any errors are noted on stderr and in the map file.
2431 Next the global symbol definitions (-g option), if any, are
2432 processed. The symbol definitions have been delayed until this
2433 point because the absolute addresses of all internal symbols are
2434 known and can be used in the expression calculations.
2436 Before continuing with the linking process the symbol table
2437 is scanned to determine if any symbols have been referenced but
2438 not defined. Undefined symbols are listed on the stderr device.
2439 if a .module directive was included in the assembled file the
2440 module making the reference to this undefined variable will be
2443 Constants defined as global in more than one module will be
2444 flagged as multiple definitions if their values are not identi-
2447 After the preceeding processes are complete the linker may
2448 output a map file (-m option). This file provides the following
2451 1. Global symbol values and label absolute addresses
2453 2. Defined areas and there lengths
2455 3. Remaining undefined symbols
2457 4. List of modules linked
2459 5. List of library modules linked
2461 6. List of -b and -g definitions
2466 The final step of the linking process is performed during the
2467 second pass of the input files. As the xxx.rel files are read
2468 the code is relocated by substituting the physical addresses for
2469 the referenced symbols and areas and may be output in Intel or
2470 Motorola formats. The number of files linked and symbols de-
2471 fined/referenced is limited by the processor space available to
2472 build the area/symbol lists. If the -u option is specified then
2473 the listing files (file.lst) associated with the relocation
2474 files (file.rel) are scanned and used to create a new file
2475 (file.rst) which has all addresses and data relocated to their
2484 2.5 LINKER INPUT FORMAT
2487 The linkers' input object file is an ascii file containing
2488 the information needed by the linker to bind multiple object
2489 modules into a complete loadable memory image.
2491 The object module contains the following designators:
2498 H Most significant byte first
2499 L Least significant byte first
2506 R Relocation information
2507 P Paging information
2510 2.5.1 Object Module Format
2513 The first line of an object module contains the [XDQ][HL]
2514 format specifier (i.e. XH indicates a hexidecimal file with
2515 most significant byte first) for the following designators.
2520 H aa areas gg global symbols
2522 The header line specifies the number of areas(aa) and the
2523 number of global symbols(gg) defined or referenced in this ob-
2524 ject module segment.
2537 The module line specifies the module name from which this
2538 header segment was assembled. The module line will not appear
2539 if the .module directive was not used in the source program.
2550 The symbol line defines (Def) or references (Ref) the symbol
2551 'string' with the value nnnn. The defined value is relative to
2552 the current area base address. References to constants and ex-
2553 ternal global symbols will always appear before the first area
2554 definition. References to external symbols will have a value of
2560 A label size ss flags ff
2562 The area line defines the area label, the size (ss) of the
2563 area in bytes, and the area flags (ff). The area flags specify
2564 the ABS, REL, CON, OVR, and PAG parameters:
2566 OVR/CON (0x04/0x00 i.e. bit position 2)
2568 ABS/REL (0x08/0x00 i.e. bit position 3)
2570 PAG (0x10 i.e. bit position 4)
2575 T xx xx nn nn nn nn nn ...
2577 The T line contains the assembled code output by the assem-
2578 bler with xx xx being the offset address from the current area
2579 base address and nn being the assembled instructions and data in
2591 R 0 0 nn nn n1 n2 xx xx ...
2593 The R line provides the relocation information to the linker.
2594 The nn nn value is the current area index, i.e. which area the
2595 current values were assembled. Relocation information is en-
2596 coded in groups of 4 bytes:
2598 1. n1 is the relocation mode and object format, for the
2599 adhoc extension modes refer to asxxxx.h or aslink.h
2600 1. bit 0 word(0x00)/byte(0x01)
2601 2. bit 1 relocatable area(0x00)/symbol(0x02)
2602 3. bit 2 normal(0x00)/PC relative(0x04) relocation
2603 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
2605 5. bit 4 signed(0x00)/unsigned(0x10) byte data
2606 6. bit 5 normal(0x00)/page '0'(0x20) reference
2607 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
2608 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte
2611 2. n2 is a byte index into the corresponding (i.e. pre-
2612 ceeding) T line data (i.e. a pointer to the data to be
2613 updated by the relocation). The T line data may be
2614 1-byte or 2-byte byte data format or 2-byte word
2617 3. xx xx is the area/symbol index for the area/symbol be-
2618 ing referenced. the corresponding area/symbol is found
2619 in the header area/symbol lists.
2622 The groups of 4 bytes are repeated for each item requiring relo-
2623 cation in the preceeding T line.
2628 P 0 0 nn nn n1 n2 xx xx
2630 The P line provides the paging information to the linker as
2631 specified by a .setdp directive. The format of the relocation
2632 information is identical to that of the R line. The correspond-
2633 ing T line has the following information:
2636 Where aa aa is the area reference number which specifies the
2637 selected page area and bb bb is the base address of the page.
2638 bb bb will require relocation processing if the 'n1 n2 xx xx' is
2639 specified in the P line. The linker will verify that the base
2646 address is on a 256 byte boundary and that the page length of an
2647 area defined with the PAG type is not larger than 256 bytes.
2649 The linker defaults any direct page references to the first
2650 area defined in the input REL file. All ASxxxx assemblers will
2651 specify the _CODE area first, making this the default page area.
2654 2.6 LINKER ERROR MESSAGES
2657 The linker provides detailed error messages allowing the pro-
2658 grammer to quickly find the errant code. As the linker com-
2659 pletes pass 1 over the input file(s) it reports any page
2660 boundary or page length errors as follows:
2662 ?ASlink-Warning-Paged Area PAGE0 Boundary Error
2666 ?ASlink-Warning-Paged Area PAGE0 Length Error
2668 where PAGE0 is the paged area.
2670 During Pass two the linker reads the T, R, and P lines per-
2671 forming the necessary relocations and outputting the absolute
2672 code. Various errors may be reported during this process
2673 The P line processing can produce only one possible error:
2675 ?ASlink-Warning-Page Definition Boundary Error
2676 file module pgarea pgoffset
2677 PgDef t6809l t6809l PAGE0 0001
2679 The error message specifies the file and module where the .setdp
2680 direct was issued and indicates the page area and the page
2681 offset value determined after relocation.
2684 The R line processing produces various errors:
2686 ?ASlink-Warning-Byte PCR relocation error for symbol bra2
2687 file module area offset
2688 Refby t6809l t6809l TEST 00FE
2689 Defin tconst tconst . .ABS. 0080
2691 ?ASlink-Warning-Unsigned Byte error for symbol two56
2692 file module area offset
2693 Refby t6800l t6800l DIRECT 0015
2694 Defin tconst tconst . .ABS. 0100
2697 THE LINKER PAGE 2-10
2698 LINKER ERROR MESSAGES
2701 ?ASlink-Warning-Page0 relocation error for symbol ltwo56
2702 file module area offset
2703 Refby t6800l t6800l DIRECT 000D
2704 Defin tconst tconst DIRECT 0100
2706 ?ASlink-Warning-Page Mode relocation error for symbol two56
2707 file module area offset
2708 Refby t6809l t6809l DIRECT 0005
2709 Defin tconst tconst . .ABS. 0100
2711 ?ASlink-Warning-Page Mode relocation error
2712 file module area offset
2713 Refby t Pagetest PROGRAM 0006
2714 Defin t Pagetest DIRECT 0100
2716 These error messages specify the file, module, area, and offset
2717 within the area of the code referencing (Refby) and defining
2718 (Defin) the symbol. If the symbol is defined in the same module
2719 as the reference the linker is unable to report the symbol name.
2720 The assembler listing file(s) should be examined at the offset
2721 from the specified area to located the offending code.
2725 1. The byte PCR error is caused by exceeding the pc rela-
2726 tive byte branch range.
2728 2. The Unsigned byte error indicates an indexing value was
2729 negative or larger than 255.
2731 3. The Page0 error is generated if the direct page vari-
2732 able is not in the page0 range of 0 to 255.
2734 4. The page mode error is generated if the direct variable
2735 is not within the current direct page (6809).
2739 THE LINKER Page 2-11
2740 INTEL HEX OUTPUT FORMAT
2743 2.7 INTEL HEX OUTPUT FORMAT
2745 Record Mark Field - This field signifies the start of a
2746 record, and consists of an ascii colon
2749 Record Length Field - This field consists of two ascii
2750 characters which indicate the number of
2751 data bytes in this record. The
2752 characters are the result of converting
2753 the number of bytes in binary to two
2754 ascii characters, high digit first. An
2755 End of File record contains two ascii
2756 zeros in this field.
2758 Load Address Field - This field consists of the four ascii
2759 characters which result from converting
2760 the the binary value of the address in
2761 which to begin loading this record. The
2762 order is as follows:
2764 High digit of high byte of address.
2765 Low digit of high byte of address.
2766 High digit of low byte of address.
2767 Low digit of low byte of address.
2769 In an End of File record this field con-
2770 sists of either four ascii zeros or the
2771 program entry address. Currently the
2772 entry address option is not supported.
2774 Record Type Field - This field identifies the record type,
2775 which is either 0 for data records or 1
2776 for an End of File record. It consists
2777 of two ascii characters, with the high
2778 digit of the record type first, followed
2779 by the low digit of the record type.
2781 Data Field - This field consists of the actual data,
2782 converted to two ascii characters, high
2783 digit first. There are no data bytes in
2784 the End of File record.
2786 Checksum Field - The checksum field is the 8 bit binary
2787 sum of the record length field, the load
2788 address field, the record type field,
2789 and the data field. This sum is then
2790 negated (2's complement) and converted
2791 to two ascii characters, high digit
2795 THE LINKER Page 2-12
2796 MOTOROLA S1-S9 OUTPUT FORMAT
2799 2.8 MOTORLA S1-S9 OUTPUT FORMAT
2801 Record Type Field - This field signifies the start of a
2802 record and identifies the the record
2805 Ascii S1 - Data Record
2806 Ascii S9 - End of File Record
2808 Record Length Field - This field specifies the record length
2809 which includes the address, data, and
2810 checksum fields. The 8 bit record
2811 length value is converted to two ascii
2812 characters, high digit first.
2814 Load Address Field - This field consists of the four ascii
2815 characters which result from converting
2816 the the binary value of the address in
2817 which to begin loading this record. The
2818 order is as follows:
2820 High digit of high byte of address.
2821 Low digit of high byte of address.
2822 High digit of low byte of address.
2823 Low digit of low byte of address.
2825 In an End of File record this field con-
2826 sists of either four ascii zeros or the
2827 program entry address. Currently the
2828 entry address option is not supported.
2830 Data Field - This field consists of the actual data,
2831 converted to two ascii characters, high
2832 digit first. There are no data bytes in
2833 the End of File record.
2835 Checksum Field - The checksum field is the 8 bit binary
2836 sum of the record length field, the load
2837 address field, and the data field. This
2838 sum is then complemented (1's comple-
2839 ment) and converted to two ascii
2840 characters, high digit first.
2857 BUILDING ASXXXX AND ASLINK
2862 The assemblers and linker have been successfully compiled us-
2863 ing the DECUS C (PDP-11) compiler (patch level 9) with
2864 RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C
2865 V5.4b compiler, and Symantec C/C++ V6.1/V7.2.
2867 The device specific header file (i.e. m6800.h, m6801.h,
2868 etc.) contains the DECUS C 'BUILD' directives for generating a
2869 command file to compile, assemble, and link the necessary files
2870 to prepare an executable image for a particular assembler.
2873 3.1 BUILDING AN ASSEMBLER
2876 The building of a typical assembler (6809 for example) re-
2877 quires the following files:
2895 The first five files are the 6809 processor dependent sec-
2896 tions which contain the following:
2901 BUILDING ASXXXX AND ASLINK PAGE 3-2
2902 BUILDING AN ASSEMBLER
2905 1. m6809.h - header file containing the machine specific
2906 definitions of constants, variables, structures, and
2909 2. m09ext - device description, byte order, and file ex-
2912 3. m09pst - a table of the assembler general directives,
2913 special device directives, and assembler mnemonics with
2914 associated operation codes
2916 4. m09mch / m09adr - machine specific code for processing
2917 the device mnemonics, addressing modes, and special
2921 The remaining nine files provide the device independent sec-
2922 tions which handle the details of file input/output, symbol
2923 table generation, program/data areas, expression analysis, and
2924 assembler directive processing.
2930 The building of the linker requires the following files:
2968 A.1 6800 REGISTER SET
2970 The following is a list of the 6800 registers used by AS6800:
2972 a,b - 8-bit accumulators
2976 A.2 6800 INSTRUCTION SET
2979 The following tables list all 6800/6802/6808 mnemonics recog-
2980 nized by the AS6800 assembler. The designation [] refers to a
2981 required addressing mode argument. The following list specifies
2982 the format for each addressing mode supported by AS6800:
2984 #data immediate data
2987 *dir direct page addressing
2988 (see .setdp directive)
2989 0 <= dir <= 255
2991 ,x register indirect addressing
2994 offset,x register indirect addressing
2995 0 <= offset <= 255
2997 ext extended addressing
3001 The terms data, dir, offset, ext, and label may all be expres-
3006 AS6800 ASSEMBLER PAGE A-2
3007 6800 INSTRUCTION SET
3010 Note that not all addressing modes are valid with every in-
3011 struction, refer to the 6800 technical data for valid modes.
3014 A.2.1 Inherent Instructions
3036 A.2.2 Branch Instructions
3049 AS6800 ASSEMBLER PAGE A-3
3050 6800 INSTRUCTION SET
3053 A.2.3 Single Operand Instructions
3104 AS6800 ASSEMBLER PAGE A-4
3105 6800 INSTRUCTION SET
3108 A.2.4 Double Operand Instructions
3144 A.2.5 Jump and Jump to Subroutine Instructions
3151 AS6800 ASSEMBLER PAGE A-5
3152 6800 INSTRUCTION SET
3155 A.2.6 Long Register Instructions
3182 B.1 .hd6303 DIRECTIVE
3188 The .hd6303 directive enables processing of the HD6303 specific
3189 mnemonics not included in the 6801 instruction set. HD6303
3190 mnemonics encountered without the .hd6303 directive will be
3191 flagged with an 'o' error.
3194 B.2 6801 REGISTER SET
3196 The following is a list of the 6801 registers used by AS6801:
3198 a,b - 8-bit accumulators
3199 d - 16-bit accumulator <a:b>
3203 B.3 6801 INSTRUCTION SET
3206 The following tables list all 6801/6303 mnemonics recognized
3207 by the AS6801 assembler. The designation [] refers to a re-
3208 quired addressing mode argument. The following list specifies
3209 the format for each addressing mode supported by AS6801:
3211 #data immediate data
3214 *dir direct page addressing
3215 (see .setdp directive)
3216 0 <= dir <= 255
3220 AS6801 ASSEMBLER PAGE B-2
3221 6801 INSTRUCTION SET
3224 ,x register indirect addressing
3227 offset,x register indirect addressing
3228 0 <= offset <= 255
3230 ext extended addressing
3234 The terms data, dir, offset, ext, and label may all be expres-
3237 Note that not all addressing modes are valid with every in-
3238 struction, refer to the 6801/6303 technical data for valid
3242 B.3.1 Inherent Instructions
3260 B.3.2 Branch Instructions
3274 AS6801 ASSEMBLER PAGE B-3
3275 6801 INSTRUCTION SET
3278 B.3.3 Single Operand Instructions
3332 AS6801 ASSEMBLER PAGE B-4
3333 6801 INSTRUCTION SET
3345 B.3.4 Double Operand Instructions
3350 adda [] addb [] addd []
3351 add a [] add b [] add d []
3374 suba [] subb [] subd []
3375 sub a [] sub b [] sub d []
3380 AS6801 ASSEMBLER PAGE B-5
3381 6801 INSTRUCTION SET
3384 B.3.5 Jump and Jump to Subroutine Instructions
3389 B.3.6 Long Register Instructions
3397 B.3.7 6303 Specific Instructions
3399 aim #data, [] eim #data, []
3400 oim #data, [] tim #data, []
3424 Requires the .setdp directive to specify the ram area.
3427 C.1 6804 REGISTER SET
3429 The following is a list of the 6804 registers used by AS6804:
3431 x,y - index registers
3434 C.2 6804 INSTRUCTION SET
3437 The following tables list all 6804 mnemonics recognized by
3438 the AS6804 assembler. The designation [] refers to a required
3439 addressing mode argument. The following list specifies the
3440 format for each addressing mode supported by AS6804:
3442 #data immediate data
3445 ,x register indirect addressing
3447 dir direct addressing
3448 (see .setdp directive)
3449 0 <= dir <= 255
3451 ext extended addressing
3455 The terms data, dir, and ext may be expressions. The label for
3456 the short branchs beq, bne, bcc, and bcs must not be external.
3458 Note that not all addressing modes are valid with every in-
3459 struction, refer to the 6804 technical data for valid modes.
3462 AS6804 ASSEMBLER PAGE C-2
3463 6804 INSTRUCTION SET
3466 C.2.1 Inherent Instructions
3477 C.2.2 Branch Instructions
3483 C.2.3 Single Operand Instructions
3495 C.2.4 Jump and Jump to Subroutine Instructions
3501 C.2.5 Bit Test Instructions
3503 brclr #data,[],label
3504 brset #data,[],label
3512 AS6804 ASSEMBLER PAGE C-3
3513 6804 INSTRUCTION SET
3516 C.2.6 Load Immediate data Instruction
3521 C.2.7 6804 Derived Instructions
3568 D.1 6805 REGISTER SET
3570 The following is a list of the 6805 registers used by AS6805:
3572 a - 8-bit accumulator
3576 D.2 6805 INSTRUCTION SET
3579 The following tables list all 6805 mnemonics recognized by
3580 the AS6805 assembler. The designation [] refers to a required
3581 addressing mode argument. The following list specifies the
3582 format for each addressing mode supported by AS6805:
3584 #data immediate data
3587 *dir direct page addressing
3588 (see .setdp directive)
3589 0 <= dir <= 255
3591 ,x register indirect addressing
3594 offset,x register indirect addressing
3595 0 <= offset <= 255 --- byte mode
3596 256 <= offset <= 65535 --- word mode
3597 (an externally defined offset uses the
3600 ext extended addressing
3606 AS6805 ASSEMBLER PAGE D-2
3607 6805 INSTRUCTION SET
3610 The terms data, dir, offset, and ext may all be expressions.
3612 Note that not all addressing modes are valid with every in-
3613 struction, refer to the 6805 technical data for valid modes.
3616 D.2.1 Control Instructions
3627 D.2.2 Bit Manipulation Instructions
3629 brset #data,*dir,label
3630 brclr #data,*dir,label
3636 D.2.3 Branch Instructions
3642 bhcc label bhcs label
3649 AS6805 ASSEMBLER PAGE D-3
3650 6805 INSTRUCTION SET
3653 D.2.4 Read-Modify-Write Instructions
3689 D.2.5 Register\Memory Instructions
3700 AS6805 ASSEMBLER PAGE D-4
3701 6805 INSTRUCTION SET
3704 D.2.6 Jump and Jump to Subroutine Instructions
3729 E.1 68HC08 REGISTER SET
3731 The following is a list of the 68HC08 registers used by
3734 a - 8-bit accumulator
3735 x - index register <H:X>
3739 E.2 68HC08 INSTRUCTION SET
3742 The following tables list all 68HC08 mnemonics recognized by
3743 the AS6808 assembler. The designation [] refers to a required
3744 addressing mode argument. The following list specifies the
3745 format for each addressing mode supported by AS6808:
3747 #data immediate data
3750 *dir direct page addressing
3751 (see .setdp directive)
3752 0 <= dir <= 255
3754 ,x register indexed addressing
3757 offset,x register indexed addressing
3758 0 <= offset <= 255 --- byte mode
3759 256 <= offset <= 65535 --- word mode
3760 (an externally defined offset uses the
3763 ,x+ register indexed addressing
3764 zero offset with post increment
3767 AS6808 ASSEMBLER PAGE E-2
3768 68HC08 INSTRUCTION SET
3772 offset,x+ register indexed addressing
3773 unsigned byte offset with post increment
3775 offset,s stack pointer indexed addressing
3776 0 <= offset <= 255 --- byte mode
3777 256 <= offset <= 65535 --- word mode
3778 (an externally defined offset uses the
3781 ext extended addressing
3785 The terms data, dir, offset, and ext may all be expressions.
3787 Note that not all addressing modes are valid with every in-
3788 struction, refer to the 68HC08 technical data for valid modes.
3791 E.2.1 Control Instructions
3802 E.2.2 Bit Manipulation Instructions
3804 brset #data,*dir,label
3805 brclr #data,*dir,label
3811 AS6808 ASSEMBLER PAGE E-3
3812 68HC08 INSTRUCTION SET
3815 E.2.3 Branch Instructions
3821 bhcc label bhcs label
3830 E.2.4 Complex Branch Instructions
3840 AS6808 ASSEMBLER PAGE E-4
3841 68HC08 INSTRUCTION SET
3844 E.2.5 Read-Modify-Write Instructions
3887 AS6808 ASSEMBLER PAGE E-5
3888 68HC08 INSTRUCTION SET
3891 E.2.6 Register\Memory Instructions
3902 E.2.7 Double Operand Move Instruction
3907 E.2.8 16-Bit <H:X> Index Register Instructions
3914 E.2.9 Jump and Jump to Subroutine Instructions
3939 F.1 6809 REGISTER SET
3941 The following is a list of the 6809 registers used by AS6809:
3943 a,b - 8-bit accumulators
3944 d - 16-bit accumulator <a:b>
3945 x,y - index registers
3946 s,u - stack pointers
3947 pc - program counter
3952 F.2 6809 INSTRUCTION SET
3955 The following tables list all 6809 mnemonics recognized by
3956 the AS6809 assembler. The designation [] refers to a required
3957 addressing mode argument. The following list specifies the
3958 format for each addressing mode supported by AS6809:
3960 #data immediate data
3963 *dir direct page addressing
3964 (see .setdp directive)
3965 0 <= dir <= 255
3970 cc,a,b,d,dp,x,y,s,u,pc
3972 ,-x ,--x register indexed
3977 AS6809 ASSEMBLER PAGE F-2
3978 6809 INSTRUCTION SET
3981 ,x+ ,x++ register indexed
3984 ,x register indexed addressing
3987 offset,x register indexed addressing
3988 -16 <= offset <= 15 --- 5-bit
3989 -128 <= offset <= -17 --- 8-bit
3990 16 <= offset <= 127 --- 8-bit
3991 -32768 <= offset <= -129 --- 16-bit
3992 128 <= offset <= 32767 --- 16-bit
3993 (external definition of offset
3996 a,x accumulator offset indexed addressing
3998 ext extended addressing
4000 ext,pc pc addressing ( pc <- pc + ext )
4002 ext,pcr pc relative addressing
4004 [,--x] register indexed indirect
4007 [,x++] register indexed indirect
4010 [,x] register indexed indirect addressing
4013 [offset,x] register indexed indirect addressing
4014 -128 <= offset <= 127 --- 8-bit
4015 -32768 <= offset <= -129 --- 16-bit
4016 128 <= offset <= 32767 --- 16-bit
4017 (external definition of offset
4020 [a,x] accumulator offset indexed
4023 [ext] extended indirect addressing
4025 [ext,pc] pc indirect addressing
4026 ( [pc <- pc + ext] )
4028 [ext,pcr] pc relative indirect addressing
4030 The terms data, dir, label, offset, and ext may all be expres-
4035 AS6809 ASSEMBLER PAGE F-3
4036 6809 INSTRUCTION SET
4039 Note that not all addressing modes are valid with every in-
4040 struction, refer to the 6809 technical data for valid modes.
4043 F.2.1 Inherent Instructions
4053 F.2.2 Short Branch Instructions
4058 bhis label bhs label
4060 blos label bls label
4068 F.2.3 Long Branch Instructions
4070 lbcc label lbcs label
4071 lbeq label lbge label
4072 lbgt label lbhi label
4073 lbhis label lbhs label
4074 lble label lblo label
4075 lblos label lbls label
4076 lblt label lbmi label
4077 lbne label lbpl label
4078 lbra label lbrn label
4079 lbvc label lbvs label
4083 AS6809 ASSEMBLER PAGE F-4
4084 6809 INSTRUCTION SET
4087 F.2.4 Single Operand Instructions
4126 AS6809 ASSEMBLER PAGE F-5
4127 6809 INSTRUCTION SET
4130 F.2.5 Double Operand Instructions
4155 F.2.6 D-register Instructions
4162 F.2.7 Index/Stack Register Instructions
4180 AS6809 ASSEMBLER PAGE F-6
4181 6809 INSTRUCTION SET
4184 F.2.8 Jump and Jump to Subroutine Instructions
4189 F.2.9 Register - Register Instructions
4194 F.2.10 Condition Code Register Instructions
4196 andcc #data orcc #data
4200 F.2.11 6800 Compatibility Instructions
4240 G.1 68HC11 REGISTER SET
4242 The following is a list of the 68HC11 registers used by AS6811:
4244 a,b - 8-bit accumulators
4245 d - 16-bit accumulator <a:b>
4246 x,y - index registers
4249 G.2 68HC11 INSTRUCTION SET
4252 The following tables list all 68HC11 mnemonics recognized by
4253 the AS6811 assembler. The designation [] refers to a required
4254 addressing mode argument. The following list specifies the
4255 format for each addressing mode supported by AS6811:
4257 #data immediate data
4260 *dir direct page addressing
4261 (see .setdp directive)
4262 0 <= dir <= 255
4264 ,x register indirect addressing
4267 offset,x register indirect addressing
4268 0 <= offset <= 255
4270 ext extended addressing
4274 The terms data, dir, offset, and ext may all be expressions.
4278 AS6811 ASSEMBLER PAGE G-2
4279 68HC11 INSTRUCTION SET
4282 Note that not all addressing modes are valid with every in-
4283 struction, refer to the 68HC11 technical data for valid modes.
4286 G.2.1 Inherent Instructions
4318 G.2.2 Branch Instructions
4332 AS6811 ASSEMBLER PAGE G-3
4333 68HC11 INSTRUCTION SET
4336 G.2.3 Single Operand Instructions
4387 AS6811 ASSEMBLER PAGE G-4
4388 68HC11 INSTRUCTION SET
4391 G.2.4 Double Operand Instructions
4396 adda [] addb [] addd []
4397 add a [] add b [] add d []
4423 suba [] subb [] subd []
4424 sub a [] sub b [] sub d []
4427 G.2.5 Bit Manupulation Instructions
4432 brclr [],#data,label
4433 brset [],#data,label
4438 AS6811 ASSEMBLER PAGE G-5
4439 68HC11 INSTRUCTION SET
4442 G.2.6 Jump and Jump to Subroutine Instructions
4447 G.2.7 Long Register Instructions
4478 H.1 68HC12 REGISTER SET
4480 The following is a list of the 68HC12 registers used by AS6812:
4482 a,b - 8-bit accumulators
4483 d - 16-bit accumulator <a:b>
4484 x,y - index registers
4485 sp,s - stack pointer
4486 pc - program counter
4487 ccr,cc - condition code register
4490 H.2 68HC12 INSTRUCTION SET
4493 The following tables list all 68HC12 mnemonics recognized by
4494 the AS6812 assembler. The designation [] refers to a required
4495 addressing mode argument. The following list specifies the
4496 format for each addressing mode supported by AS6812:
4498 #data immediate data
4501 ext extended addressing
4503 pg memory page number
4505 *dir direct page addressing
4506 (see .setdp directive)
4507 0 <= dir <= 255
4516 AS6812 ASSEMBLER PAGE H-2
4517 68HC12 INSTRUCTION SET
4520 -x x- register indexed, pre or
4521 ,-x ,x- post autodecrement by 1
4523 n,-x n,x- register indexed, pre or
4524 post autodecrement by 1 - 8
4526 +x x+ register indexed, pre or
4527 ,+x ,x+ post autoincrement by 1
4529 n,+x n,x+ register indexed, pre or
4530 post autoincrement by 1 - 8
4532 offset,x register indexed addressing
4533 -16 <= offset <= 15 --- 5-bit
4534 -256 <= offset <= -17 --- 9-bit
4535 16 <= offset <= 255 --- 9-bit
4536 -32768 <= offset <= -257 --- 16-bit
4537 256 <= offset <= 32767 --- 16-bit
4538 (external definition of offset
4541 [offset,x] register indexed indirect addressing
4542 -32768 <= offset <= 32767 --- 16-bit
4544 [,x] register indexed indirect addressing
4547 a,x accumulator offset indexed addressing
4549 [d,x] d accumulator offset indexed
4552 The terms data, dir, label, offset, and ext may all be expres-
4555 Note that not all addressing modes are valid with every in-
4556 struction, refer to the 68HC12 technical data for valid modes.
4559 AS6812 ASSEMBLER PAGE H-3
4560 68HC12 INSTRUCTION SET
4563 H.2.1 Inherent Instructions
4582 H.2.2 Short Branch Instructions
4587 bhis label bhs label
4589 blos label bls label
4597 H.2.3 Long Branch Instructions
4599 lbcc label lbcs label
4600 lbeq label lbge label
4601 lbgt label lbhi label
4602 lbhis label lbhs label
4603 lble label lblo label
4604 lblos label lbls label
4605 lblt label lbmi label
4606 lbne label lbpl label
4607 lbra label lbrn label
4608 lbvc label lbvs label
4611 AS6812 ASSEMBLER PAGE H-4
4612 68HC12 INSTRUCTION SET
4615 H.2.4 Branch on Decrement, Test, or Increment
4617 dbeq r,label dbne r,label
4618 ibeq r,label ibne r,label
4619 tbeq r,label tbne r,label
4622 H.2.5 Bit Clear and Set Instructions
4628 H.2.6 Branch on Bit Clear or Set
4630 brclr [],#data,label
4631 brset [],#data,label
4634 AS6812 ASSEMBLER PAGE H-5
4635 68HC12 INSTRUCTION SET
4638 H.2.7 Single Operand Instructions
4677 AS6812 ASSEMBLER PAGE H-6
4678 68HC12 INSTRUCTION SET
4681 H.2.8 Double Operand Instructions
4695 ldaa [] <=> lda []
4697 ldab [] <=> ldb []
4699 oraa [] <=> ora []
4701 orab [] <=> orb []
4705 staa [] <=> sta []
4707 stab [] <=> stb []
4712 H.2.9 Move Instructions
4714 movb [],[] movw [],[]
4717 H.2.10 D-register Instructions
4720 cpd [] <=> cmpd []
4724 AS6812 ASSEMBLER PAGE H-7
4725 68HC12 INSTRUCTION SET
4728 H.2.11 Index/Stack Register Instructions
4730 cps [] <=> cmps []
4731 cpx [] <=> cmpx []
4732 cpy [] <=> cmpy []
4744 H.2.12 Jump and Jump/Call to Subroutine Instructions
4750 H.2.13 Other Special Instructions
4761 H.2.14 Register - Register Instructions
4767 H.2.15 Condition Code Register Instructions
4769 andcc #data orcc #data
4772 AS6812 ASSEMBLER PAGE H-8
4773 68HC12 INSTRUCTION SET
4776 H.2.16 M68HC11 Compatibility Mode Instructions
4806 I.1 68HC16 REGISTER SET
4808 The following is a list of the 68HC16 registers used by AS6816:
4810 a,b - 8-bit accumulators
4811 d - 16-bit accumulator <a:b>
4812 e - 16-bit accumulator
4813 x,y,z - index registers
4814 k - address extension register
4816 ccr - condition code
4819 I.2 68HC16 INSTRUCTION SET
4822 The following tables list all 68HC16 mnemonics recognized by
4823 the AS6816 assembler. The designation [] refers to a required
4824 addressing mode argument. The following list specifies the
4825 format for each addressing mode supported by AS6816:
4827 #data immediate data
4830 #xo,#yo local immediate data (mac / rmac)
4837 ,x zero offset register indexed addressing
4841 offset,x register indexed addressing
4844 AS6816 ASSEMBLER PAGE I-2
4845 68HC16 INSTRUCTION SET
4848 0 <= offset <= 255 --- 8-bit
4849 -32768 <= offset <= -1 --- 16-bit
4850 256 <= offset <= 32767 --- 16-bit
4851 (external definition of offset
4854 offset,x8 unsigned 8-bit offset indexed addressing
4855 offset,x16 signed 16-bit offset indexed addressing
4857 e,x accumulator offset indexed addressing
4859 ext extended addressing
4861 bank 64K bank number (jmp / jsr)
4863 The terms data, label, offset, bank, and ext may all be expres-
4866 Note that not all addressing modes are valid with every in-
4867 struction, refer to the 6816 technical data for valid modes.
4870 I.2.1 Inherent Instructions
4876 ediv edivs emul emuls
4877 fdiv fmuls idiv ldhi
4879 pshb pshmac pula pulb
4896 AS6816 ASSEMBLER PAGE I-3
4897 68HC16 INSTRUCTION SET
4900 I.2.2 Push/Pull Multiple Register Instructions
4902 pshm r,... pulm r,...
4905 I.2.3 Short Branch Instructions
4910 bhis label bhs label
4912 blos label bls label
4920 I.2.4 Long Branch Instructions
4922 lbcc label lbcs label
4923 lbeq label lbge label
4924 lbgt label lbhi label
4925 lbhis label lbhs label
4926 lble label lblo label
4927 lblos label lbls label
4928 lblt label lbmi label
4929 lbne label lbpl label
4930 lbra label lbrn label
4931 lbvc label lbvs label
4935 I.2.5 Bit Manipulation Instructions
4940 brclr [],#data,label
4941 brset [],#data,label
4944 AS6816 ASSEMBLER PAGE I-4
4945 68HC16 INSTRUCTION SET
4948 I.2.6 Single Operand Instructions
5001 AS6816 ASSEMBLER PAGE I-5
5002 68HC16 INSTRUCTION SET
5005 I.2.7 Double Operand Instructions
5040 I.2.8 Index/Stack Register Instructions
5052 AS6816 ASSEMBLER PAGE I-6
5053 68HC16 INSTRUCTION SET
5056 I.2.9 Jump and Jump to Subroutine Instructions
5058 jmp bank,[] jsr bank,[]
5061 I.2.10 Condition Code Register Instructions
5063 andp #data orp #data
5066 I.2.11 Multiply and Accumulate Instructions
5068 mac #data rmac #data
5069 mac #xo,#yo rmac #xo,#yo
5092 J.1 H8/3XX REGISTER SET
5094 The following is a list of the H8 registers used by ASH8:
5096 r0 - r7,sp 16-bit accumulators
5097 r0L - r7L,spL 8-bit accumulators
5098 r0H - r7H,spH 8-bit accumulators
5099 spL,spH,sp stack pointers
5103 J.2 H8/3XX INSTRUCTION SET
5106 The following tables list all H8/3xx mnemonics recognized by
5107 the ASH8 assembler. The designation [] refers to a required ad-
5108 dressing mode argument. The following list specifies the format
5109 for each addressing mode supported by ASH8:
5111 #xx:3 immediate data (3 bit)
5112 #xx:8 immediate data (8 bit)
5113 #xx:16 immediate data (16 bit)
5115 *dir direct page addressing
5116 (see .setdp directive)
5117 0xFF00 <= dir <= 0xFFFF
5122 rn registers (16 bit)
5125 rnB registers (8 bit)
5126 r0H-r7H,r0L-r7L,spH,spL
5130 ASH8 ASSEMBLER PAGE J-2
5131 H8/3XX INSTRUCTION SET
5134 ccr condition code register
5136 @rn register indirect
5138 @-rn register indirect (auto pre-decrement)
5140 @rn+ register indirect (auto post-increment)
5142 @[offset,rn] register indirect, 16-bit displacement
5144 @@offset memory indirect, (8-bit address)
5146 ext extended addressing (16-bit)
5148 The terms data, dir, label, offset, and ext may all be expres-
5151 Note that not all addressing modes are valid with every in-
5152 struction, refer to the H8/3xx technical data for valid modes.
5155 J.2.1 Inherent Instructions
5164 J.2.2 Branch Instructions
5169 bhi label bhis label
5171 blo label blos label
5180 ASH8 ASSEMBLER PAGE J-3
5181 H8/3XX INSTRUCTION SET
5184 J.2.3 Single Operand Instructions
5213 rotxl.b rnB rotxr.b rnB
5215 rotl.b rnB rotr.b rnB
5217 shal.b rnB shar.b rnB
5219 shll.b rnB shlr.b rnB
5224 ASH8 ASSEMBLER PAGE J-4
5225 H8/3XX INSTRUCTION SET
5228 J.2.4 Double Operand Instructions
5232 add rnB,rnB add #xx:8,rnB
5234 adds #1,rn adds #2,rn
5235 addx rnB,rnB addx #xx:8,rnB
5237 cmp rnB,rnB cmp #xx:8,rnB
5242 subs #1,rn subs #2,rn
5243 subx rnB,rnB subx #xx:8,rnB
5245 and rnB,rnB and #xx:8,rnB
5248 or rnB,rnB or #xx:8,rnB
5251 xor rnB,rnB xor #xx:8,rnB
5257 add.b rnB,rnB add.b #xx:8,rnB
5260 cmp.b rnB,rnB cmp.b #xx:8,rnB
5266 addx.b rnB,rnB addx.b #xx:8,rnB
5268 and.b rnB,rnB and.b #xx:8,rnB
5271 or.b rnB,rnB or.b #xx:8,rnB
5274 subx.b rnB,rnB subx.b #xx:8,rnB
5276 xor.b rnB,rnB xor.b #xx:8,rnB
5280 ASH8 ASSEMBLER PAGE J-5
5281 H8/3XX INSTRUCTION SET
5284 J.2.5 Mov Instructions
5288 mov rnB,rnB mov rn,rn
5289 mov #xx:8,rnB mov #xx:16,rn
5290 mov @rn,rnB mov @rn,rn
5291 mov @[offset,rn],rnB mov @[offset,rn],rn
5292 mov @rn+,rnB mov @rn+,rn
5297 mov @label,rnB mov @label,rn
5298 mov label,rnB mov label,rn
5299 mov rnB,@rn mov rn,@rn
5300 mov rnB,@[offset,rn] mov rn,@[offset,rn]
5301 mov rnB,@-rn mov rn,@-rn
5306 mov rnB,@label mov rn,@label
5307 mov rnB,label mov rn,label
5312 mov.b rnB,rnB mov.w rn,rn
5313 mov.b #xx:8,rnB mov.w #xx:16,rn
5314 mov.b @rn,rnB mov.w @rn,rn
5315 mov.b @[offset,rn],rnB mov.w @[offset,rn],rn
5316 mov.b @rn+,rnB mov.w @rn+,rn
5321 mov.b @label,rnB mov.w @label,rn
5322 mov.b label,rnB mov.w label,rn
5323 mov.b rnB,@rn mov.w rn,@rn
5324 mov.b rnB,@[offset,rn] mov.w rn,@[offset,rn]
5325 mov.b rnB,@-rn mov.w rn,@-rn
5330 mov.b rnB,@label mov.w rn,@label
5331 mov.b rnB,label mov.w rn,label
5334 ASH8 ASSEMBLER PAGE J-6
5335 H8/3XX INSTRUCTION SET
5338 J.2.6 Bit Manipulation Instructions
5340 bld #xx:3,rnB bld #xx:3,@rn
5341 bld #xx:3,@dir bld #xx:3,dir
5342 bld #xx:3,*@dir bld #xx:3,*dir
5344 bild #xx:3,rnB bild #xx:3,@rn
5345 bild #xx:3,@dir bild #xx:3,dir
5346 bild #xx:3,*@dir bild #xx:3,*dir
5348 bst #xx:3,rnB bst #xx:3,@rn
5349 bst #xx:3,@dir bst #xx:3,dir
5350 bst #xx:3,*@dir bst #xx:3,*dir
5352 bist #xx:3,rnB bist #xx:3,@rn
5353 bist #xx:3,@dir bist #xx:3,dir
5354 bist #xx:3,*@dir bist #xx:3,*dir
5356 band #xx:3,rnB band #xx:3,@rn
5357 band #xx:3,@dir band #xx:3,dir
5358 band #xx:3,*@dir band #xx:3,*dir
5360 biand #xx:3,rnB biand #xx:3,@rn
5361 biand #xx:3,@dir biand #xx:3,dir
5362 biand #xx:3,*@dir biand #xx:3,*dir
5364 bor #xx:3,rnB bor #xx:3,@rn
5365 bor #xx:3,@dir bor #xx:3,dir
5366 bor #xx:3,*@dir bor #xx:3,*dir
5368 bior #xx:3,rnB bior #xx:3,@rn
5369 bior #xx:3,@dir bior #xx:3,dir
5370 bior #xx:3,*@dir bior #xx:3,*dir
5372 bxor #xx:3,rnB bxor #xx:3,@rn
5373 bxor #xx:3,@dir bxor #xx:3,dir
5374 bxor #xx:3,*@dir bxor #xx:3,*dir
5376 bixor #xx:3,rnB bixor #xx:3,@rn
5377 bixor #xx:3,@dir bixor #xx:3,dir
5378 bixor #xx:3,*@dir bixor #xx:3,*dir
5381 ASH8 ASSEMBLER PAGE J-7
5382 H8/3XX INSTRUCTION SET
5385 J.2.7 Extended Bit Manipulation Instructions
5387 bset #xx:3,rnB bset #xx:3,@rn
5388 bset #xx:3,@dir bset #xx:3,dir
5389 bset #xx:3,*@dir bset #xx:3,*dir
5390 bset rnB,rnB bset rnB,@rn
5391 bset rnB,@dir bset rnB,dir
5392 bset rnB,*@dir bset rnB,*dir
5394 bclr #xx:3,rnB bclr #xx:3,@rn
5395 bclr #xx:3,@dir bclr #xx:3,dir
5396 bclr #xx:3,*@dir bclr #xx:3,*dir
5397 bclr rnB,rnB bclr rnB,@rn
5398 bclr rnB,@dir bclr rnB,dir
5399 bclr rnB,*@dir bclr rnB,*dir
5401 bnot #xx:3,rnB bnot #xx:3,@rn
5402 bnot #xx:3,@dir bnot #xx:3,dir
5403 bnot #xx:3,*@dir bnot #xx:3,*dir
5404 bnot rnB,rnB bnot rnB,@rn
5405 bnot rnB,@dir bnot rnB,dir
5406 bnot rnB,*@dir bnot rnB,*dir
5408 btst #xx:3,rnB btst #xx:3,@rn
5409 btst #xx:3,@dir btst #xx:3,dir
5410 btst #xx:3,*@dir btst #xx:3,*dir
5411 btst rnB,rnB btst rnB,@rn
5412 btst rnB,@dir btst rnB,dir
5413 btst rnB,*@dir btst rnB,*dir
5416 J.2.8 Condition Code Instructions
5418 andc #xx:8,ccr andc #xx:8
5419 and #xx:8,ccr and.b #xx:8,ccr
5421 ldc #xx:8,ccr ldc #xx:8
5424 orc #xx:8,ccr orc #xx:8
5425 or #xx:8,ccr or.b #xx:8,ccr
5427 xorc #xx:8,ccr xorc #xx:8
5428 xor #xx:8,ccr xor.b #xx:8,ccr
5433 ASH8 ASSEMBLER PAGE J-8
5434 H8/3XX INSTRUCTION SET
5437 J.2.9 Other Instructions
5439 divxu rnB,rn divxu.b rnB,rn
5441 mulxu rnB,rn mulxu.b rnB,rn
5443 movfpe @label,rnB movfpe label,rnB
5444 movfpe.b @label,rnB movfpe.b label,rnB
5446 movtpe @label,rnB movtpe label,rnB
5447 movtpe.b @label,rnB movtpe.b label,rnB
5450 J.2.10 Jump and Jump to Subroutine Instructions
5453 jmp @label jmp label
5456 jsr @label jsr label
5482 Thanks to John Hartman for his contribution of the AS8051
5486 jhartman@compuserve.com
5489 K.2 8051 REGISTER SET
5491 The following is a list of the 8051 registers used by AS8051:
5493 a,b - 8-bit accumulators
5494 r0,r1,r2,r3 - 8-bit registers
5498 pc - program counter
5500 c - carry (bit in status word)
5503 AS8051 ASSEMBLER PAGE K-2
5507 K.3 8051 INSTRUCTION SET
5510 The following tables list all 8051 mnemonics recognized by
5511 the AS8051 assembler. The following list specifies the format
5512 for each addressing mode supported by AS8051:
5514 #data immediate data
5517 r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
5519 @r indirect on register r0 or r1
5520 @dptr indirect on data pointer
5521 @a+dptr indirect on accumulator
5523 @a+pc indirect on accumulator
5524 plus program counter
5526 addr direct memory address
5530 label call or jump label
5532 The terms data, addr, bitaddr, and label may all be expressions.
5534 Note that not all addressing modes are valid with every in-
5535 struction. Refer to the 8051 technical data for valid modes.
5538 K.3.1 Inherent Instructions
5543 AS8051 ASSEMBLER PAGE K-3
5544 8051 INSTRUCTION SET
5547 K.3.2 Move Instructions
5549 mov a,#data mov a,addr
5552 mov r,#data mov r,addr
5555 mov addr,a mov addr,#data
5556 mov addr,r mov addr,@r
5557 mov addr1,addr2 mov bitaddr,c
5559 mov @r,#data mov @r,addr
5565 movc a,@a+dptr movc a,@a+pc
5566 movx a,@dptr movx a,@r
5567 movx @dptr,a movx @r,a
5570 K.3.3 Single Operand Instructions
5593 AS8051 ASSEMBLER PAGE K-4
5594 8051 INSTRUCTION SET
5597 K.3.4 Two Operand Instructions
5599 add a,#data add a,addr
5601 addc a,#data addc a,addr
5603 subb a,#data subb a,addr
5605 orl a,#data orl a,addr
5607 orl addr,a orl addr,#data
5608 orl c,bitaddr orl c,/bitaddr
5609 anl a,#data anl a,addr
5611 anl addr,a anl addr,#data
5612 anl c,bitaddr anl c,/bitaddr
5613 xrl a,#data xrl a,addr
5615 xrl addr,a xrl addr,#data
5616 xrl c,bitaddr xrl c,/bitaddr
5621 K.3.5 Call and Return Instructions
5623 acall label lcall label
5630 K.3.6 Jump Instructions
5633 cjne a,#data,label cjne a,addr,label
5634 cjne r,#data,label cjne @r,#data,label
5635 djnz r,label djnz addr,label
5637 jb bitadr,label jnb bitadr,label
5641 ljmp label sjmp label
5644 AS8051 ASSEMBLER PAGE K-5
5645 8051 INSTRUCTION SET
5648 K.3.7 Predefined Symbols: SFR Map
5650 --------- 4 Bytes ----------
5665 C8 [ T2CON RCAP2L RCAP2H ] CB
5681 88 TCON TMOD TL0 TL1 8B
5685 [...] Indicates Resident in 8052, not 8051
5688 AS8051 ASSEMBLER PAGE K-6
5689 8051 INSTRUCTION SET
5692 K.3.8 Predefined Symbols: SFR Bit Addresses
5694 ---------- 4 BITS ----------
5698 F4 B.4 B.5 B.6 B.7 F7
5699 F0 B.0 B.1 B.2 B.3 F3
5702 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
5703 E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
5706 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
5707 D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
5708 CC [ T2CON.4 T2CON.5 T2CON.6 T2CON.7 ] CF
5709 C8 [ T2CON.0 T2CON.1 T2CON.2 T2CON.3 ] CB
5712 BC IP.4 IP.5 IP.6 IP.7 BF
5713 B8 IP.0 IP.1 IP.2 IP.3 BB
5714 B4 P3.4 P3.5 P3.6 P3.7 B7
5715 B0 P3.0 P3.1 P3.2 P3.3 B3
5716 AC IE.4 IE.5 EI.6 IE.7 AF
5717 A8 IE.0 IE.1 IE.2 IE.3 AB
5718 A4 P2.4 P2.5 P2.6 P2.7 A7
5719 A0 P2.0 P2.1 P2.2 P2.3 A3
5720 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
5721 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
5722 94 P1.4 P1.5 P1.6 P1.7 97
5723 90 P1.0 P1.1 P1.2 P1.3 93
5724 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
5725 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
5726 84 P0.4 P0.5 P0.6 P0.7 87
5727 80 P0.0 P0.1 P0.2 P0.3 83
5729 [...] Indicates Resident in 8052, not 8051
5732 AS8051 ASSEMBLER PAGE K-7
5733 8051 INSTRUCTION SET
5736 K.3.9 Predefined Symbols: Control Bits
5738 ---------- 4 BITS ----------
5752 CC [ TLCK RCLK EXF2 TF2 ] CF
5753 C8 [ CPRL2 CT2 TR2 EXEN2 ] CB
5757 B8 PX0 PT0 PX1 PT1 BB
5759 B0 RXD TXD INT0 INT1 B3
5761 A8 EX0 ET0 EX1 ET1 AB
5764 9C REN SM2 SM1 SM0 9F
5768 8C TR0 TF0 TR1 TF1 8F
5769 88 IT0 IE0 IT1 IE1 8B
5773 [...] Indicates Resident in 8052, not 8051
5796 L.1 8085 REGISTER SET
5798 The following is a list of the 8080/8085 registers used by
5801 a,b,c,d,e,h,l - 8-bit accumulators
5802 m - memory through (hl)
5807 L.2 8085 INSTRUCTION SET
5810 The following tables list all 8080/8085 mnemonics recognized
5811 by the AS8085 assembler. The following list specifies the
5812 format for each addressing mode supported by AS8085:
5814 #data immediate data
5817 r,r1,r2 register or register pair
5821 m memory address using (hl)
5823 addr direct memory addressing
5825 label call or jump label
5827 The terms data, m, addr, and label may be expressions.
5829 Note that not all addressing modes are valid with every in-
5830 struction, refer to the 8080/8085 technical data for valid
5834 AS8085 ASSEMBLER PAGE L-2
5835 8085 INSTRUCTION SET
5838 L.2.1 Inherent Instructions
5852 L.2.2 Register/Memory/Immediate Instructions
5854 adc r adc m aci #data
5855 add r add m adi #data
5856 ana r ana m ani #data
5857 cmp r cmp m cpi #data
5858 ora r ora m ori #data
5859 sbb r sbb m sbi #data
5860 sub r sub m sui #data
5861 xra r xra m xri #data
5864 L.2.3 Call and Return Instructions
5877 L.2.4 Jump Instructions
5890 AS8085 ASSEMBLER PAGE L-3
5891 8085 INSTRUCTION SET
5894 L.2.5 Input/Output/Reset Instructions
5901 L.2.6 Move Instructions
5911 L.2.7 Other Instructions
5953 The .hd64 directive enables processing of the HD64180 specific
5954 mnemonics not included in the Z80 instruction set. HD64180
5955 mnemonics encountered without the .hd64 directive will be
5956 flagged with an 'o' error.
5959 M.2 Z80 REGISTER SET AND CONDITIONS
5962 The following is a complete list of register designations and
5963 condition mnemonics:
5965 byte registers - a,b,c,d,e,h,l,i,r
5966 register pairs - af,af',bc,de,hl
5967 word registers - pc,sp,ix,iy
5971 NC - carry bit clear
5981 ASZ80 ASSEMBLER PAGE M-2
5985 M.3 Z80 INSTRUCTION SET
5988 The following tables list all Z80/HD64180 mnemonics recog-
5989 nized by the ASZ80 assembler. The designation [] refers to a
5990 required addressing mode argument. The following list specifies
5991 the format for each addressing mode supported by ASZ80:
5993 #data immediate data
6004 (hl) implied addressing or
6005 register indirect addressing
6007 (label) direct addressing
6009 offset(ix) indexed addressing with
6012 label call/jmp/jr label
6014 The terms data, dir, offset, and ext may all be expressions.
6015 The terms dir and offset are not allowed to be external refer-
6018 Note that not all addressing modes are valid with every in-
6019 struction, refer to the Z80/HD64180 technical data for valid
6023 ASZ80 ASSEMBLER PAGE M-3
6027 M.3.1 Inherent Instructions
6042 M.3.2 Implicit Operand Instructions
6063 ASZ80 ASSEMBLER PAGE M-4
6067 M.3.3 Load Instruction
6072 ld (label),a ld a,(label)
6073 ld (label),rp ld rp,(label)
6077 ld sp,iy ld rp,#data
6083 M.3.4 Call/Return Instructions
6087 call NC,label ret NC
6088 call NZ,label ret NZ
6090 call PE,label ret PE
6091 call PO,label ret PO
6096 M.3.5 Jump and Jump to Subroutine Instructions
6098 jp C,label jp M,label
6099 jp NC,label jp NZ,label
6100 jp P,label jp PE,label
6101 jp PO,label jp Z,label
6108 jr C,label jr NC,label
6109 jr NZ,label jr Z,label
6113 ASZ80 ASSEMBLER PAGE M-5
6117 M.3.6 Bit Manipulation Instructions
6124 M.3.7 Interrupt Mode and Reset Instructions
6132 M.3.8 Input and Output Instructions
6138 out (n),a out (c),rg
6143 M.3.9 Register Pair Instructions
6150 ex (sp),hl ex (sp),ix
6158 ASZ80 ASSEMBLER PAGE M-6
6162 M.3.10 HD64180 Specific Instructions
6202 Thanks to Marko Makela for his contribution of the AS6500
6209 Internet: Marko.Makela@Helsinki.Fi
6210 EARN/BitNet: msmakela@finuh
6212 Several additions and modifications were made to his code to
6213 support the following families of 6500 processors:
6215 (1) 650X and 651X processor family
6216 (2) 65F11 and 65F12 processor family
6217 (3) 65C00/21 and 65C29 processor family
6218 (4) 65C02, 65C102, and 65C112 processor family
6220 The instruction syntax of this cross assembler contains two
6221 peculiarities: (1) the addressing indirection is denoted by the
6222 square brackets [] and (2) the `bbrx' and `bbsx' instructions
6223 are written `bbr0 memory,label'.
6228 AS6500 ASSEMBLER PAGE N-2
6232 N.2 6500 REGISTER SET
6234 The following is a list of the 6500 registers used by AS6500:
6236 a - 8-bit accumulator
6237 x,y - index registers
6240 N.3 6500 INSTRUCTION SET
6243 The following tables list all 6500 family mnemonics recog-
6244 nized by the AS6500 assembler. The designation [] refers to a
6245 required addressing mode argument. The following list specifies
6246 the format for each addressing mode supported by AS6500:
6248 #data immediate data
6251 *dir direct page addressing
6252 (see .setdp directive)
6253 0 <= dir <= 255
6255 offset,x indexed addressing
6256 offset,y indexed addressing
6257 address = (offset + (x or y))
6259 [offset,x] pre-indexed indirect addressing
6260 0 <= offset <= 255
6261 address = contents of location
6262 (offset + (x or y)) mod 256
6264 [offset],y post-indexed indirect addressing
6265 address = contents of location at offset
6266 plus the value of the y register
6268 [address] indirect addressing
6270 ext extended addressing
6274 address,label direct page memory location
6276 bbrx and bbsx instruction addressing
6278 The terms data, dir, offset, address, ext, and label may all be
6281 Note that not all addressing modes are valid with every in-
6282 struction, refer to the 65xx technical data for valid modes.
6285 AS6500 ASSEMBLER PAGE N-3
6286 6500 INSTRUCTION SET
6289 N.3.1 Processor Specific Directives
6292 The AS6500 cross assembler has four (4) processor specific
6293 assembler directives which define the target 65xx processor
6296 .r6500 Core 650X and 651X family (default)
6297 .r65f11 Core plus 65F11 and 65F12
6298 .r65c00 Core plus 65C00/21 and 65C29
6299 .r65c02 Core plus 65C02, 65C102, and 65C112
6302 N.3.2 65xx Core Inherent Instructions
6319 N.3.3 65xx Core Branch Instructions
6328 N.3.4 65xx Core Single Operand Instructions
6338 AS6500 ASSEMBLER PAGE N-4
6339 6500 INSTRUCTION SET
6342 N.3.5 65xx Core Double Operand Instructions
6355 N.3.6 65xx Core Jump and Jump to Subroutine Instructions
6360 N.3.7 65xx Core Miscellaneous X and Y Register Instructions
6370 AS6500 ASSEMBLER PAGE N-5
6371 6500 INSTRUCTION SET
6374 N.3.8 65F11 and 65F12 Specific Instructions
6376 bbr0 [],label bbr1 [],label
6377 bbr2 [],label bbr3 [],label
6378 bbr4 [],label bbr5 [],label
6379 bbr6 [],label bbr7 [],label
6381 bbs0 [],label bbs1 [],label
6382 bbs2 [],label bbs3 [],label
6383 bbs4 [],label bbs5 [],label
6384 bbs6 [],label bbs7 [],label
6397 N.3.9 65C00/21 and 65C29 Specific Instructions
6399 bbr0 [],label bbr1 [],label
6400 bbr2 [],label bbr3 [],label
6401 bbr4 [],label bbr5 [],label
6402 bbr6 [],label bbr7 [],label
6404 bbs0 [],label bbs1 [],label
6405 bbs2 [],label bbs3 [],label
6406 bbs4 [],label bbs5 [],label
6407 bbs6 [],label bbs7 [],label
6425 AS6500 ASSEMBLER PAGE N-6
6426 6500 INSTRUCTION SET
6429 N.3.10 65C02, 65C102, and 65C112 Specific Instructions
6431 bbr0 [],label bbr1 [],label
6432 bbr2 [],label bbr3 [],label
6433 bbr4 [],label bbr5 [],label
6434 bbr6 [],label bbr7 [],label
6436 bbs0 [],label bbs1 [],label
6437 bbs2 [],label bbs3 [],label
6438 bbs4 [],label bbs5 [],label
6439 bbs6 [],label bbs7 [],label
6460 Additional addressing modes for the following core instruc-
6461 tions are also available with the 65C02, 65C102, and 65C112 pro-
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