tcl/target/ti_k3: Add AM625 SoC

Add support for the latest in TI k3 family AM625 SoC.

For further details, see https://www.ti.com/lit/pdf/spruiv7

Signed-off-by: Nishanth Menon <nm@ti.com>
Change-Id: Ia54d0eab1c30a973afb1c2c61f4c5a72d29d9b78
Reviewed-on: https://review.openocd.org/c/openocd/+/6798
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 604083758c1c852e158cd1412590157e09894468..254bb69716d31687174abc727db185ea5331e79d 100644 (file)
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -88,6 +88,31 @@ switch $_soc {
                # M4 processor
                set _gp_mcu_cores 1
        }
+       am625 {
+               set _CHIPNAME am625
+               set _K3_DAP_TAPID 0x0bb7e02f
+
+               # AM625 has 1 clusters of 4 A53 cores.
+               set _armv8_cpu_name a53
+               set _armv8_cores 4
+               set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000}
+               set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000}
+
+               # AM625 has 1 cluster of 1 R5s core.
+               set _r5_cores 1
+               set R5_NAMES {main0_r5.0}
+               set R5_DBGBASE {0x9d410000}
+               set R5_CTIBASE {0x9d418000}
+
+               # sysctrl CTI base
+               set CM3_CTIBASE {0x20001000}
+               # Sysctrl power-ap unlock offsets
+               set _sysctrl_ap_unlock_offsets {0xf0 0x78}
+
+               # M4 processor
+               set _gp_mcu_cores 1
+               set _gp_mcu_ap_unlock_offsets {0xf0 0x7c}
+       }
        j721e {
                set _CHIPNAME j721e
                set _K3_DAP_TAPID 0x0bb6402f