flash/nor/stm32f1x: add can_load_options flag for GD32F1x0, F3x0 and E23x

According to GigaDevice user manuals the devices have OBRLD bit in FMC_CTL
register which is functionally compatible with OBL_LAUNCH @ FLASH_CR
of STM32 counterparts.

Change-Id: I84d231b38815fcb6452fd73b9153b269cce3b737
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6759
Tested-by: jenkins
Reviewed-by: Andrzej Sierżęga <asier70@gmail.com>

diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c
index dea8df759a7dd67fcb0a3674e3bf99e50e37a9da..c750ff0803fdc59ea126b605d64acf58d5257fd4 100644 (file)
--- a/src/flash/nor/stm32f1x.c
+++ b/src/flash/nor/stm32f1x.c
@@ -896,10 +896,12 @@ static int stm32x_probe(struct flash_bank *bank)
                        stm32x_info->user_data_offset = 16;
                        stm32x_info->option_offset = 6;
                        max_flash_size_in_kb = 64;
+                       stm32x_info->can_load_options = true;
                        break;
                case 0x1704: /* gd32f3x0 */
                        stm32x_info->user_data_offset = 16;
                        stm32x_info->option_offset = 6;
+                       stm32x_info->can_load_options = true;
                        break;
                case 0x1906: /* gd32vf103 */
                        break;
@@ -907,6 +909,7 @@ static int stm32x_probe(struct flash_bank *bank)
                        stm32x_info->user_data_offset = 16;
                        stm32x_info->option_offset = 6;
                        max_flash_size_in_kb = 64;
+                       stm32x_info->can_load_options = true;
                        break;
                }
                break;