riscv: make local symbols static

Symbols that are not exported should be declared as static.

Change-Id: Ie3bd17535c8cb2a0fec5d3bedfe7de3e0a702613
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7166
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <matyas@codasip.com>

diff --git a/src/target/riscv/riscv-011.c b/src/target/riscv/riscv-011.c
index e2ae5b51a651d7b0069fa5f879c05f9c3addeea7..79d952694a14dfe751ef78612571d023334bfa61 100644 (file)
--- a/src/target/riscv/riscv-011.c
+++ b/src/target/riscv/riscv-011.c
@@ -2297,7 +2297,7 @@ static int arch_state(struct target *target)
        return ERROR_OK;
 }
 
-COMMAND_HELPER(riscv011_print_info, struct target *target)
+static COMMAND_HELPER(riscv011_print_info, struct target *target)
 {
        /* Abstract description. */
        riscv_print_info_line(CMD, "target", "memory.read_while_running8", 0);

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index b666f524622d110ede58d82469b2dd1b95c63fe2..d513df7cae0750c0ffbda2cfe137a226306b7f39 100644 (file)
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -67,9 +67,9 @@ static int write_memory(struct target *target, target_addr_t address,
                uint32_t size, uint32_t count, const uint8_t *buffer);
 static int riscv013_test_sba_config_reg(struct target *target, target_addr_t legal_address,
                uint32_t num_words, target_addr_t illegal_address, bool run_sbbusyerror_test);
-void write_memory_sba_simple(struct target *target, target_addr_t addr, uint32_t *write_data,
+static void write_memory_sba_simple(struct target *target, target_addr_t addr, uint32_t *write_data,
                uint32_t write_size, uint32_t sbcs);
-void read_memory_sba_simple(struct target *target, target_addr_t addr,
+static void read_memory_sba_simple(struct target *target, target_addr_t addr,
                uint32_t *rd_buf, uint32_t read_size, uint32_t sbcs);
 
 /**
@@ -221,7 +221,7 @@ typedef struct {
        dm013_info_t *dm;
 } riscv013_info_t;
 
-LIST_HEAD(dm_list);
+static LIST_HEAD(dm_list);
 
 static riscv013_info_t *get_info(const struct target *target)
 {
@@ -236,7 +236,7 @@ static riscv013_info_t *get_info(const struct target *target)
  * global list of DMs. If it's not in there, then create one and initialize it
  * to 0.
  */
-dm013_info_t *get_dm(struct target *target)
+static dm013_info_t *get_dm(struct target *target)
 {
        RISCV013_INFO(info);
        if (info->dm)
@@ -683,7 +683,7 @@ static int dmi_write_exec(struct target *target, uint32_t address,
        return dmi_op(target, NULL, NULL, DMI_OP_WRITE, address, value, true, ensure_success);
 }
 
-int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
+static int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
                bool authenticated, unsigned timeout_sec)
 {
        int result = dmi_op_timeout(target, dmstatus, NULL, DMI_OP_READ,
@@ -705,7 +705,7 @@ int dmstatus_read_timeout(struct target *target, uint32_t *dmstatus,
        return ERROR_OK;
 }
 
-int dmstatus_read(struct target *target, uint32_t *dmstatus,
+static int dmstatus_read(struct target *target, uint32_t *dmstatus,
                bool authenticated)
 {
        return dmstatus_read_timeout(target, dmstatus, authenticated,
@@ -721,7 +721,7 @@ static void increase_ac_busy_delay(struct target *target)
                        info->ac_busy_delay);
 }
 
-uint32_t abstract_register_size(unsigned width)
+static uint32_t __attribute__((unused)) abstract_register_size(unsigned width)
 {
        switch (width) {
                case 32:
@@ -1873,7 +1873,7 @@ static unsigned riscv013_data_bits(struct target *target)
        return 32;
 }
 
-COMMAND_HELPER(riscv013_print_info, struct target *target)
+static COMMAND_HELPER(riscv013_print_info, struct target *target)
 {
        RISCV013_INFO(info);
 
@@ -4701,7 +4701,7 @@ static int riscv013_test_sba_config_reg(struct target *target,
 
 }
 
-void write_memory_sba_simple(struct target *target, target_addr_t addr,
+static void write_memory_sba_simple(struct target *target, target_addr_t addr,
                uint32_t *write_data, uint32_t write_size, uint32_t sbcs)
 {
        RISCV013_INFO(info);
@@ -4731,7 +4731,7 @@ void write_memory_sba_simple(struct target *target, target_addr_t addr,
                dmi_write(target, DM_SBDATA0+i, write_data[i]);
 }
 
-void read_memory_sba_simple(struct target *target, target_addr_t addr,
+static void read_memory_sba_simple(struct target *target, target_addr_t addr,
                uint32_t *rd_buf, uint32_t read_size, uint32_t sbcs)
 {
        RISCV013_INFO(info);

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 42fc3742f76f1ad53a866f564aa17fb3afba5d5c..f46e157e3638397586d7bc56ff90b1709fa3e06a 100644 (file)
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -131,15 +131,15 @@ int bscan_tunnel_ir_width; /* if zero, then tunneling is not present/active */
 static const uint8_t bscan_zero[4] = {0};
 static const uint8_t bscan_one[4] = {1};
 
-uint8_t ir_user4[4];
+static uint8_t ir_user4[4];
 struct scan_field select_user4 = {
        .in_value = NULL,
        .out_value = ir_user4
 };
 
 
-uint8_t bscan_tunneled_ir_width[4] = {5};  /* overridden by assignment in riscv_init_target */
-struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
+static uint8_t bscan_tunneled_ir_width[4] = {5};  /* overridden by assignment in riscv_init_target */
+static struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
                {
                        .num_bits = 3,
                        .out_value = bscan_zero,
@@ -162,7 +162,7 @@ struct scan_field _bscan_tunnel_data_register_select_dmi[] = {
                }
 };
 
-struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
+static struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
                {
                        .num_bits = 1,
                        .out_value = bscan_zero,
@@ -184,11 +184,11 @@ struct scan_field _bscan_tunnel_nested_tap_select_dmi[] = {
                        .in_value = NULL,
                }
 };
-struct scan_field *bscan_tunnel_nested_tap_select_dmi = _bscan_tunnel_nested_tap_select_dmi;
-uint32_t bscan_tunnel_nested_tap_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_nested_tap_select_dmi);
+static struct scan_field *bscan_tunnel_nested_tap_select_dmi = _bscan_tunnel_nested_tap_select_dmi;
+static uint32_t bscan_tunnel_nested_tap_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_nested_tap_select_dmi);
 
-struct scan_field *bscan_tunnel_data_register_select_dmi = _bscan_tunnel_data_register_select_dmi;
-uint32_t bscan_tunnel_data_register_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_data_register_select_dmi);
+static struct scan_field *bscan_tunnel_data_register_select_dmi = _bscan_tunnel_data_register_select_dmi;
+static uint32_t bscan_tunnel_data_register_select_dmi_num_fields = ARRAY_SIZE(_bscan_tunnel_data_register_select_dmi);
 
 struct trigger {
        uint64_t address;
@@ -205,7 +205,7 @@ int riscv_command_timeout_sec = DEFAULT_COMMAND_TIMEOUT_SEC;
 /* Wall-clock timeout after reset. Settable via RISC-V Target commands.*/
 int riscv_reset_timeout_sec = DEFAULT_RESET_TIMEOUT_SEC;
 
-bool riscv_enable_virt2phys = true;
+static bool riscv_enable_virt2phys = true;
 bool riscv_ebreakm = true;
 bool riscv_ebreaks = true;
 bool riscv_ebreaku = true;
@@ -217,7 +217,7 @@ static enum {
        RO_REVERSED
 } resume_order;
 
-const virt2phys_info_t sv32 = {
+static const virt2phys_info_t sv32 = {
        .name = "Sv32",
        .va_bits = 32,
        .level = 2,
@@ -230,7 +230,7 @@ const virt2phys_info_t sv32 = {
        .pa_ppn_mask = {0x3ff, 0xfff},
 };
 
-const virt2phys_info_t sv39 = {
+static const virt2phys_info_t sv39 = {
        .name = "Sv39",
        .va_bits = 39,
        .level = 3,
@@ -243,7 +243,7 @@ const virt2phys_info_t sv39 = {
        .pa_ppn_mask = {0x1ff, 0x1ff, 0x3ffffff},
 };
 
-const virt2phys_info_t sv48 = {
+static const virt2phys_info_t sv48 = {
        .name = "Sv48",
        .va_bits = 48,
        .level = 4,
@@ -256,7 +256,7 @@ const virt2phys_info_t sv48 = {
        .pa_ppn_mask = {0x1ff, 0x1ff, 0x1ff, 0x1ffff},
 };
 
-void riscv_sample_buf_maybe_add_timestamp(struct target *target, bool before)
+static void riscv_sample_buf_maybe_add_timestamp(struct target *target, bool before)
 {
        RISCV_INFO(r);
        uint32_t now = timeval_ms() & 0xffffffff;
@@ -1162,7 +1162,7 @@ int riscv_select_current_hart(struct target *target)
        return riscv_set_current_hartid(target, target->coreid);
 }
 
-int halt_prep(struct target *target)
+static int halt_prep(struct target *target)
 {
        RISCV_INFO(r);
 
@@ -1182,7 +1182,7 @@ int halt_prep(struct target *target)
        return ERROR_OK;
 }
 
-int riscv_halt_go_all_harts(struct target *target)
+static int riscv_halt_go_all_harts(struct target *target)
 {
        RISCV_INFO(r);
 
@@ -1200,7 +1200,7 @@ int riscv_halt_go_all_harts(struct target *target)
        return ERROR_OK;
 }
 
-int halt_go(struct target *target)
+static int halt_go(struct target *target)
 {
        RISCV_INFO(r);
        int result;
@@ -1284,7 +1284,7 @@ static int riscv_deassert_reset(struct target *target)
        return tt->deassert_reset(target);
 }
 
-int riscv_resume_prep_all_harts(struct target *target)
+static int riscv_resume_prep_all_harts(struct target *target)
 {
        RISCV_INFO(r);
 
@@ -1742,7 +1742,7 @@ static int riscv_write_memory(struct target *target, target_addr_t address,
        return tt->write_memory(target, address, size, count, buffer);
 }
 
-const char *riscv_get_gdb_arch(struct target *target)
+static const char *riscv_get_gdb_arch(struct target *target)
 {
        switch (riscv_xlen(target)) {
                case 32:
@@ -2105,7 +2105,7 @@ static enum riscv_poll_hart riscv_poll_hart(struct target *target, int hartid)
        return RPH_NO_CHANGE;
 }
 
-int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
+static int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
 {
        switch (halt_reason) {
                case RISCV_HALT_BREAKPOINT:
@@ -2131,7 +2131,7 @@ int set_debug_reason(struct target *target, enum riscv_halt_reason halt_reason)
        return ERROR_OK;
 }
 
-int sample_memory(struct target *target)
+static int sample_memory(struct target *target)
 {
        RISCV_INFO(r);
 
@@ -2458,7 +2458,7 @@ COMMAND_HANDLER(riscv_set_enable_virtual)
        return ERROR_OK;
 }
 
-int parse_ranges(struct list_head *ranges, const char *tcl_arg, const char *reg_type, unsigned int max_val)
+static int parse_ranges(struct list_head *ranges, const char *tcl_arg, const char *reg_type, unsigned int max_val)
 {
        char *args = strdup(tcl_arg);
        if (!args)
@@ -3117,7 +3117,7 @@ static const struct command_registration riscv_exec_command_handlers[] = {
  * sense, but for now all semihosting commands are prefixed with `arm`.
  */
 
-const struct command_registration riscv_command_handlers[] = {
+static const struct command_registration riscv_command_handlers[] = {
        {
                .name = "riscv",
                .mode = COMMAND_ANY,