tcl/target: Add Renesas RZ/A1H target
authorMarek Vasut <marek.vasut@gmail.com>
Fri, 5 Oct 2018 20:48:04 +0000 (22:48 +0200)
committerMatthias Welwarsky <matthias@welwarsky.de>
Mon, 20 May 2019 10:16:54 +0000 (11:16 +0100)
Add configuration for the Renesas RZ/A1H target.
This is an SoC with one Cortex A9 ARMv7a core and
up to 10 MiB of on-SoC SRAM.

Change-Id: I20fd54b385fe1ba1cc325451c3fdfa3a835d4884
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
tcl/target/renesas_r7s72100.cfg [new file with mode: 0644]

diff --git a/tcl/target/renesas_r7s72100.cfg b/tcl/target/renesas_r7s72100.cfg
new file mode 100644 (file)
index 0000000..f9466fc
--- /dev/null
@@ -0,0 +1,25 @@
+# Renesas R-Car RZ/A1H
+# https://www.renesas.com/eu/en/products/microcontrollers-microprocessors/rz/rza/rza1h.html
+
+if { [info exists DAP_TAPID] } {
+       set _DAP_TAPID $DAP_TAPID
+} else {
+       set _DAP_TAPID 0x4ba00477
+}
+
+if { [info exists CHIPNAME] } {
+       set _CHIPNAME $CHIPNAME
+} else {
+       set _CHIPNAME r7s72100
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID
+
+# Configuring only one core using DAP.
+# Base addresses of cores:
+#  core 0  -  0x80030000
+set _TARGETNAME $_CHIPNAME.ca9
+dap create ${_CHIPNAME}.dap -chain-position $_CHIPNAME.cpu
+target create ${_TARGETNAME} cortex_a -dap ${_CHIPNAME}.dap -coreid 0 -dbgbase 0x80030000
+
+targets ${_TARGETNAME}