target/xtensa: fully initialize buffers for PWRSTAT read
authorIan Thompson <ianst@cadence.com>
Fri, 9 Sep 2022 19:10:20 +0000 (12:10 -0700)
committerAntonio Borneo <borneo.antonio@gmail.com>
Tue, 13 Sep 2022 22:18:57 +0000 (22:18 +0000)
Read buffer is sized for 32-bit APB version of PWRSTAT/PWRCTL registers. Initialize to zero so 8-bit JTAG register mirrors are accurate.

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: I81310649fa7180893d0188aab3c8a14315aaea0a
Reviewed-on: https://review.openocd.org/c/openocd/+/7183
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
src/target/xtensa/xtensa_debug_module.c

index 8753b863cd497e2cddcc5e1d1c5a5f555d4a94c3..4f33c08aa974a4cb5388e86419ae1e23abeb09a2 100644 (file)
@@ -246,8 +246,8 @@ int xtensa_dm_device_id_read(struct xtensa_debug_module *dm)
 
 int xtensa_dm_power_status_read(struct xtensa_debug_module *dm, uint32_t clear)
 {
-       uint8_t stat_buf[sizeof(uint32_t)];
-       uint8_t stath_buf[sizeof(uint32_t)];
+       uint8_t stat_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 };
+       uint8_t stath_buf[sizeof(uint32_t)] = { 0, 0, 0, 0 };
 
        /* TODO: JTAG does not work when PWRCTL_JTAGDEBUGUSE is not set.
         * It is set in xtensa_examine(), need to move reading of XDMREG_OCDID out of this function */