The Xilinx Zynq UltraScale+ SoC have an "AXI-AP" access port for direct memory accesses without halting CPUs.
Change-Id: I6303331c217795657575de4759444938e775dee1
Signed-off-by: Olivier DANET <odanet@caramail.com>
Reviewed-on: http://openocd.zylin.com/6263
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
eval $_command
}
+target create uscale.axi mem_ap -dap uscale.dap -ap-num 0
+
eval $_smp_command
targets $_TARGETNAME.0