target/cortex_m: minor refactoring in cortex_m_store_core_reg_u32()

Unlike cortex_m_load_core_reg_u32() storing core register uses
the same code pattern around DHCSR read as offered by the convenience
helper cortex_m_read_dhcsr_atomic_sticky().

Use the helper.

Change-Id: Ia947204944a8b549f3c2be7fb2f717aad18970c4
SeeAlso: 65d762918328 (cortex_m: poll S_REGRDY on register r/w)
SeeAlso: 0dcf95c7171b (target/cortex_m: cumulate DHCSR sticky bits)
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6767
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 5605dd080b3e9101ec6fe04702e6a8b47740d7d4..7125e9e8309f41873a81dbe8b2a05fecbfa6a56e 100644 (file)
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -397,11 +397,9 @@ static int cortex_m_store_core_reg_u32(struct target *target,
        /* check if value is written into register */
        then = timeval_ms();
        while (1) {
-               retval = mem_ap_read_atomic_u32(armv7m->debug_ap, DCB_DHCSR,
-                                                                               &cortex_m->dcb_dhcsr);
+               retval = cortex_m_read_dhcsr_atomic_sticky(target);
                if (retval != ERROR_OK)
                        return retval;
-               cortex_m_cumulate_dhcsr_sticky(cortex_m, cortex_m->dcb_dhcsr);
                if (cortex_m->dcb_dhcsr & S_REGRDY)
                        break;
                if (timeval_ms() > then + DHCSR_S_REGRDY_TIMEOUT) {