flash/nor/efm32: Use Cortex-M 'core_info' field

Change-Id: I5e477036e5cb7518c35df88878d53261311deb40
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6868
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c
index 653878ae7b9ddb5591c810fbf5bed18e90e2036f..2c5a5020ee6aa6084c1dc657e4ccefebf3b7e130 100644 (file)
--- a/src/flash/nor/efm32.c
+++ b/src/flash/nor/efm32.c
@@ -257,23 +257,19 @@ static int efm32x_write_reg_u32(struct flash_bank *bank, target_addr_t offset,
 static int efm32x_read_info(struct flash_bank *bank)
 {
        int ret;
-       uint32_t cpuid = 0;
        struct efm32x_flash_chip *efm32x_info = bank->driver_priv;
        struct efm32_info *efm32_info = &(efm32x_info->info);
 
        memset(efm32_info, 0, sizeof(struct efm32_info));
 
-       ret = target_read_u32(bank->target, CPUID, &cpuid);
-       if (ret != ERROR_OK)
-               return ret;
+       const struct cortex_m_common *cortex_m = target_to_cm(bank->target);
 
-       if (((cpuid >> 4) & 0xfff) == 0xc23) {
-               /* Cortex-M3 device */
-       } else if (((cpuid >> 4) & 0xfff) == 0xc24) {
-               /* Cortex-M4 device (WONDER GECKO) */
-       } else if (((cpuid >> 4) & 0xfff) == 0xc60) {
-               /* Cortex-M0+ device */
-       } else {
+       switch (cortex_m->core_info->partno) {
+       case CORTEX_M3_PARTNO:
+       case CORTEX_M4_PARTNO:
+       case CORTEX_M0P_PARTNO:
+               break;
+       default:
                LOG_ERROR("Target is not Cortex-Mx Device");
                return ERROR_FAIL;
        }