SAM3S: correct flash sector sizes.

Lock region count and sector sizes did not match datasheet.
(see 6500C-ATARM-8FE11 "SAM3S Series Datasheet", Table 7-1)

Change-Id: Ic511802f96ed03856467a24a6736349205a0576a
Signed-off-by: Attila Kinali <attila@kinali.ch>
Reviewed-on: http://openocd.zylin.com/493
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 0fb8657fce575d9eb83a37a523528d0f793d3627..dbfda3de2d150e36f405b23d76eaa9bc5ace5e49 100644 (file)
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -576,8 +576,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 256 * 1024,
-                               .nsectors   = 32,
-                               .sector_size = 8192,
+                               .nsectors   = 16,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -609,8 +609,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 256 * 1024,
-                               .nsectors   = 32,
-                               .sector_size = 8192,
+                               .nsectors   = 16,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -641,8 +641,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 256 * 1024,
-                               .nsectors   = 32,
-                               .sector_size = 8192,
+                               .nsectors   = 16,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -673,8 +673,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 128 * 1024,
-                               .nsectors   = 16,
-                               .sector_size = 8192,
+                               .nsectors   = 8,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -705,8 +705,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 128 * 1024,
-                               .nsectors   = 16,
-                               .sector_size = 8192,
+                               .nsectors   = 8,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -737,8 +737,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 128 * 1024,
-                               .nsectors   = 16,
-                               .sector_size = 8192,
+                               .nsectors   = 8,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -769,8 +769,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 64 * 1024,
-                               .nsectors   = 8,
-                               .sector_size = 8192,
+                               .nsectors   = 4,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -801,8 +801,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 64 * 1024,
-                               .nsectors   = 8,
-                               .sector_size = 8192,
+                               .nsectors   = 4,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */
@@ -833,8 +833,8 @@ static const struct sam3_chip_details all_sam3_details[] = {
                                .flash_wait_states = 6, /* workaround silicon bug */
                                .present = 1,
                                .size_bytes = 64 * 1024,
-                               .nsectors   = 8,
-                               .sector_size = 8192,
+                               .nsectors   = 4,
+                               .sector_size = 16384,
                                .page_size   = 256,
                        },
 /*             .bank[1] = { */