target: add Espressif ESP32-S3 basic support
authorErhan Kurubas <erhan.kurubas@espressif.com>
Sun, 22 May 2022 21:17:48 +0000 (23:17 +0200)
committerAntonio Borneo <borneo.antonio@gmail.com>
Fri, 24 Jun 2022 21:46:42 +0000 (21:46 +0000)
commit2053120ba10d68339c61cd2b247bde01bda41ab7
tree6f5dd5177dd521302a8376751eabb3c2b900f567
parent77287b8d47b4be8ee5612037fe1eba6f0e08147f
target: add Espressif ESP32-S3 basic support

ESP32-S3 is a dual core Xtensa SoC
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I44e17088030c96a9be9809f6579a4f16dbfc5794
Reviewed-on: https://review.openocd.org/c/openocd/+/6990
Tested-by: jenkins
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
contrib/loaders/reset/espressif/esp32s3/Makefile [new file with mode: 0644]
contrib/loaders/reset/espressif/esp32s3/cpu_reset_handler_code.inc [new file with mode: 0644]
contrib/loaders/reset/espressif/esp32s3/esp32s3_cpu_reset_handler.S [new file with mode: 0644]
doc/openocd.texi
src/target/espressif/Makefile.am
src/target/espressif/esp32s3.c [new file with mode: 0644]
src/target/espressif/esp32s3.h [new file with mode: 0644]
src/target/target.c
tcl/board/esp32s3-ftdi.cfg [new file with mode: 0644]
tcl/target/esp32s3.cfg [new file with mode: 0644]