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(parent: 800bc93) | patch
mips32: Added CP0 coprocessor R/W routines
authorDrasko DRASKOVIC <drasko.draskovic@gmail.com>
Thu, 7 Jul 2011 15:41:20 +0000 (17:41 +0200)
committerØyvind Harboe <oyvind.harboe@zylin.com>
Tue, 9 Aug 2011 21:17:28 +0000 (23:17 +0200)
commit1be7163408cc6420d85bf990a2dae46c559a12b1
tree3b352294934e9a83399eb301f406e3883bda8ae9tree | snapshot
parent800bc9308dfcae950cd95ca287876b60401e7608commit | diff
mips32: Added CP0 coprocessor R/W routines

This patch adds MIPS32 CP0 coprocessor R/W routines,
as well as adequate commands to use these routines via
telnet interface.

Now is becomes possible to affect CP0 internal registers
and configure CPU directly from OpenOCD.
src/target/mips32.c diff | blob | history
src/target/mips32.h diff | blob | history
src/target/mips32_pracc.c diff | blob | history
src/target/mips32_pracc.h diff | blob | history
src/target/mips_m4k.c diff | blob | history
src/target/mips_m4k.h diff | blob | history
openocd with support for Altus Metrum targets