1 # SPDX-License-Identifier: GPL-2.0-or-later
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
11 if { [info exists TAP_TYPE] } {
12 set _TAP_TYPE $TAP_TYPE
14 puts "You need to select a tap type"
18 # Configure the target
19 if { [string compare $_TAP_TYPE "VJTAG"] == 0 } {
20 if { [info exists FPGATAPID] } {
21 set _FPGATAPID $FPGATAPID
23 puts "You need to set your FPGA JTAG ID"
27 jtag newtap $_CHIPNAME cpu -irlen 10 -expected-id $_FPGATAPID
29 set _TARGETNAME $_CHIPNAME.cpu
30 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
32 # Select the TAP core we are using
35 } elseif { [string compare $_TAP_TYPE "XILINX_BSCAN"] == 0 } {
37 if { [info exists FPGATAPID] } {
38 set _FPGATAPID $FPGATAPID
40 puts "You need to set your FPGA JTAG ID"
44 jtag newtap $_CHIPNAME cpu -irlen 6 -expected-id $_FPGATAPID
46 set _TARGETNAME $_CHIPNAME.cpu
47 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
49 # Select the TAP core we are using
50 tap_select xilinx_bscan
52 # OpenCores Mohor JTAG TAP ID
53 set _CPUTAPID 0x14951185
55 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
57 set _TARGETNAME $_CHIPNAME.cpu
58 target create $_TARGETNAME or1k -endian $_ENDIAN -chain-position $_TARGETNAME
60 # Select the TAP core we are using
64 # Select the debug unit core we are using. This debug unit as an option.
66 set ADBG_USE_HISPEED 1
67 set ENABLE_JSP_SERVER 2
68 set ENABLE_JSP_MULTI 4
70 # If ADBG_USE_HISPEED is set (options bit 1), status bits will be skipped
71 # on burst reads and writes to improve download speeds.
72 # This option must match the RTL configured option.
74 du_select adv [expr {$ADBG_USE_HISPEED | $ENABLE_JSP_SERVER | $ENABLE_JSP_MULTI}]