1 # SPDX-License-Identifier: GPL-2.0-or-later
5 if { [info exists CHIPNAME] } {
6 set _CHIPNAME $CHIPNAME
11 # CoreSight Debug Access Port
12 if { [info exists DAP_TAPID] } {
13 set _DAP_TAPID $DAP_TAPID
15 set _DAP_TAPID 0x1ba00477
18 jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf \
19 -expected-id $_DAP_TAPID
22 jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x0 -irmask 0xf
25 if { [info exists SJC_TAPID] } {
26 set _SJC_TAPID SJC_TAPID
28 set _SJC_TAPID 0x0190c01d
31 jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x1 -irmask 0x1f \
32 -expected-id $_SJC_TAPID -ignore-version
34 # GDB target: Cortex-A8, using DAP
35 set _TARGETNAME $_CHIPNAME.cpu
36 dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
37 target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap
39 # some TCK tycles are required to activate the DEBUG power domain
40 jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
42 proc imx51_dbginit {target} {
43 # General Cortex-A8 debug initialisation
47 $_TARGETNAME configure -event reset-assert-post "imx51_dbginit $_TARGETNAME"