1 ################################################################################
2 # Author: Michael Trensch (MTrensch@googlemail.com)
3 ################################################################################
5 source [find target/hilscher_netx10.cfg]
7 # Usually it is not needed to set srst_pulls_trst
8 # but sometimes it does not work without it. If you encounter
9 # problems try to line below
10 # reset_config trst_and_srst srst_pulls_trst
11 reset_config trst_and_srst
12 adapter srst delay 500
15 $_TARGETNAME configure -work-area-virt 0x08000000 -work-area-phys 0x08000000 -work-area-size 0x4000 -work-area-backup 1
17 # Par. Flash can only be accessed if DIP switch on the board is set in proper
18 # position and init_sdrambus was called. Don't call these functions if the DIP
19 # switch is in invalid position, as some outputs may collide. This is why this
20 # function is not called automatically
22 puts "Configuring SRAM nCS0 for 90ns Par. Flash (x16)"
23 mww 0x101C0100 0x01010008
29 return [read_memory $addr 32 1]
32 proc init_clocks { } {
33 puts "Enabling all clocks "
34 set accesskey [mread32 0x101c0070]
35 mww 0x101c0070 $accesskey
37 mww 0x101c0028 0x00007511
40 proc init_sdrambus { } {
41 puts "Initializing external SDRAM Bus 16 Bit "
42 set accesskey [mread32 0x101c0070]
43 mww 0x101c0070 $accesskey
44 mww 0x101c0C40 0x00000050
46 puts "Configuring SDRAM controller for K4S561632E (32MB) "
49 #mww 0x101C0144 0x00a13262
50 mww 0x101C0144 0x00a13251
51 mww 0x101C0148 0x00000033
52 mww 0x101C0140 0x030d0121
55 $_TARGETNAME configure -event reset-init {
59 arm7_9 fast_memory_access enable
60 arm7_9 dcc_downloads enable
66 puts "-------------------------------------------------"
67 puts "Call 'init_clocks' to enable all clocks"
68 puts "Call 'init_sdrambus' to enable external SDRAM bus"
69 puts "-------------------------------------------------"
76 #flash bank <name> <driver> <base> <size> <chip width> <bus width> <target#>
77 #flash bank parflash cfi 0xC0000000 0x01000000 2 2 $_TARGETNAME