1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * ESP32 target for OpenOCD *
5 * Copyright (C) 2017 Espressif Systems Ltd. *
6 ***************************************************************************/
8 #ifndef OPENOCD_TARGET_ESP32_H
9 #define OPENOCD_TARGET_ESP32_H
11 #include <target/xtensa/xtensa_regs.h>
13 #define ESP32_DROM_LOW 0x3F400000
14 #define ESP32_DROM_HIGH 0x3F800000
15 #define ESP32_IROM_LOW 0x400D0000
16 #define ESP32_IROM_HIGH 0x40400000
18 /* Number of registers returned directly by the G command
19 * Corresponds to the amount of regs listed in regformats/reg-xtensa.dat in the gdb source */
20 #define ESP32_NUM_REGS_G_COMMAND 105
23 /* chip specific registers that extend ISA go after ISA-defined ones */
24 ESP32_REG_IDX_EXPSTATE = XT_USR_REG_START,
25 ESP32_REG_IDX_F64R_LO,
26 ESP32_REG_IDX_F64R_HI,
31 #endif /* OPENOCD_TARGET_ESP32_H */