1 /***************************************************************************
2 * ESP32 target for OpenOCD *
3 * Copyright (C) 2017 Espressif Systems Ltd. *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
19 #ifndef OPENOCD_TARGET_ESP32_H
20 #define OPENOCD_TARGET_ESP32_H
22 #include <target/xtensa/xtensa_regs.h>
24 #define ESP32_DROM_LOW 0x3F400000
25 #define ESP32_DROM_HIGH 0x3F800000
26 #define ESP32_IROM_LOW 0x400D0000
27 #define ESP32_IROM_HIGH 0x40400000
29 /* Number of registers returned directly by the G command
30 * Corresponds to the amount of regs listed in regformats/reg-xtensa.dat in the gdb source */
31 #define ESP32_NUM_REGS_G_COMMAND 105
34 /* chip specific registers that extend ISA go after ISA-defined ones */
35 ESP32_REG_IDX_EXPSTATE = XT_USR_REG_START,
36 ESP32_REG_IDX_F64R_LO,
37 ESP32_REG_IDX_F64R_HI,
42 #endif /* OPENOCD_TARGET_ESP32_H */