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   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /***************************************************************************
   4  *
   5  *   Copyright (C) 2010 by David Brownell
   6  ***************************************************************************/
   7
   8 /**
   9  * @file
  10  * Utilities to support ARM "Serial Wire Debug" (SWD), a low pin-count debug
  11  * link protocol used in cases where JTAG is not wanted.  This is coupled to
  12  * recent versions of ARM's "CoreSight" debug framework.  This specific code
  13  * is a transport level interface, with "target/arm_adi_v5.[hc]" code
  14  * understanding operation semantics, shared with the JTAG transport.
  15  *
  16  * Single-DAP support only.
  17  *
  18  * for details, see "ARM IHI 0031A"
  19  * ARM Debug Interface v5 Architecture Specification
  20  * especially section 5.3 for SWD protocol
  21  * and "ARM IHI 0074C" ARM Debug Interface Architecture Specification ADIv6.0
  22  *
  23  * On many chips (most current Cortex-M3 parts) SWD is a run-time alternative
  24  * to JTAG.  Boards may support one or both.  There are also SWD-only chips,
  25  * (using SW-DP not SWJ-DP).
  26  *
  27  * Even boards that also support JTAG can benefit from SWD support, because
  28  * usually there's no way to access the SWO trace view mechanism in JTAG mode.
  29  * That is, trace access may require SWD support.
  30  *
  31  */
  32
  33 #ifdef HAVE_CONFIG_H
  34 #include "config.h"
  35 #endif
  36
  37 #include "arm.h"
  38 #include "arm_adi_v5.h"
  39 #include <helper/time_support.h>
  40
  41 #include <transport/transport.h>
  42 #include <jtag/interface.h>
  43
  44 #include <jtag/swd.h>
  45
  46 /* for debug, set do_sync to true to force synchronous transfers */
  47 static bool do_sync;
  48
  49 static struct adiv5_dap *swd_multidrop_selected_dap;
  50
  51
  52 static int swd_queue_dp_write_inner(struct adiv5_dap *dap, unsigned int reg,
  53                 uint32_t data);
  54
  55
  56 static int swd_send_sequence(struct adiv5_dap *dap, enum swd_special_seq seq)
  57 {
  58         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
  59         assert(swd);
  60
  61         return swd->switch_seq(seq);
  62 }
  63
  64 static void swd_finish_read(struct adiv5_dap *dap)
  65 {
  66         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
  67         if (dap->last_read) {
  68                 swd->read_reg(swd_cmd(true, false, DP_RDBUFF), dap->last_read, 0);
  69                 dap->last_read = NULL;
  70         }
  71 }
  72
  73 static void swd_clear_sticky_errors(struct adiv5_dap *dap)
  74 {
  75         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
  76         assert(swd);
  77
  78         swd->write_reg(swd_cmd(false, false, DP_ABORT),
  79                 STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
  80 }
  81
  82 static int swd_run_inner(struct adiv5_dap *dap)
  83 {
  84         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
  85         int retval;
  86
  87         retval = swd->run();
  88
  89         if (retval != ERROR_OK) {
  90                 /* fault response */
  91                 dap->do_reconnect = true;
  92         }
  93
  94         return retval;
  95 }
  96
  97 static inline int check_sync(struct adiv5_dap *dap)
  98 {
  99         return do_sync ? swd_run_inner(dap) : ERROR_OK;
 100 }
 101
 102 /** Select the DP register bank matching bits 7:4 of reg. */
 103 static int swd_queue_dp_bankselect(struct adiv5_dap *dap, unsigned int reg)
 104 {
 105         /* Only register address 0 and 4 are banked. */
 106         if ((reg & 0xf) > 4)
 107                 return ERROR_OK;
 108
 109         uint64_t sel = (reg & 0x000000F0) >> 4;
 110         if (dap->select != DP_SELECT_INVALID)
 111                 sel |= dap->select & ~0xfULL;
 112
 113         if (sel == dap->select)
 114                 return ERROR_OK;
 115
 116         dap->select = sel;
 117
 118         int retval = swd_queue_dp_write_inner(dap, DP_SELECT, (uint32_t)sel);
 119         if (retval != ERROR_OK)
 120                 dap->select = DP_SELECT_INVALID;
 121
 122         return retval;
 123 }
 124
 125 static int swd_queue_dp_read_inner(struct adiv5_dap *dap, unsigned int reg,
 126                 uint32_t *data)
 127 {
 128         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 129         assert(swd);
 130
 131         int retval = swd_queue_dp_bankselect(dap, reg);
 132         if (retval != ERROR_OK)
 133                 return retval;
 134
 135         swd->read_reg(swd_cmd(true, false, reg), data, 0);
 136
 137         return check_sync(dap);
 138 }
 139
 140 static int swd_queue_dp_write_inner(struct adiv5_dap *dap, unsigned int reg,
 141                 uint32_t data)
 142 {
 143         int retval;
 144         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 145         assert(swd);
 146
 147         swd_finish_read(dap);
 148
 149         if (reg == DP_SELECT) {
 150                 dap->select = data & (DP_SELECT_APSEL | DP_SELECT_APBANK | DP_SELECT_DPBANK);
 151
 152                 swd->write_reg(swd_cmd(false, false, reg), data, 0);
 153
 154                 retval = check_sync(dap);
 155                 if (retval != ERROR_OK)
 156                         dap->select = DP_SELECT_INVALID;
 157
 158                 return retval;
 159         }
 160
 161         retval = swd_queue_dp_bankselect(dap, reg);
 162         if (retval != ERROR_OK)
 163                 return retval;
 164
 165         swd->write_reg(swd_cmd(false, false, reg), data, 0);
 166
 167         return check_sync(dap);
 168 }
 169
 170
 171 static int swd_multidrop_select_inner(struct adiv5_dap *dap, uint32_t *dpidr_ptr,
 172                 uint32_t *dlpidr_ptr, bool clear_sticky)
 173 {
 174         int retval;
 175         uint32_t dpidr, dlpidr;
 176
 177         assert(dap_is_multidrop(dap));
 178
 179         swd_send_sequence(dap, LINE_RESET);
 180         /* From ARM IHI 0074C ADIv6.0, chapter B4.3.3 "Connection and line reset
 181          * sequence":
 182          * - line reset sets DP_SELECT_DPBANK to zero;
 183          * - read of DP_DPIDR takes the connection out of reset;
 184          * - write of DP_TARGETSEL keeps the connection in reset;
 185          * - other accesses return protocol error (SWDIO not driven by target).
 186          *
 187          * Read DP_DPIDR to get out of reset. Initialize dap->select to zero to
 188          * skip the write to DP_SELECT, avoiding the protocol error. Set again
 189          * dap->select to DP_SELECT_INVALID because the rest of the register is
 190          * unknown after line reset.
 191          */
 192         dap->select = 0;
 193
 194         retval = swd_queue_dp_write_inner(dap, DP_TARGETSEL, dap->multidrop_targetsel);
 195         if (retval != ERROR_OK)
 196                 return retval;
 197
 198         retval = swd_queue_dp_read_inner(dap, DP_DPIDR, &dpidr);
 199         if (retval != ERROR_OK)
 200                 return retval;
 201
 202         if (clear_sticky) {
 203                 /* Clear all sticky errors (including ORUN) */
 204                 swd_clear_sticky_errors(dap);
 205         } else {
 206                 /* Ideally just clear ORUN flag which is set by reset */
 207                 retval = swd_queue_dp_write_inner(dap, DP_ABORT, ORUNERRCLR);
 208                 if (retval != ERROR_OK)
 209                         return retval;
 210         }
 211
 212         dap->select = DP_SELECT_INVALID;
 213
 214         retval = swd_queue_dp_read_inner(dap, DP_DLPIDR, &dlpidr);
 215         if (retval != ERROR_OK)
 216                 return retval;
 217
 218         retval = swd_run_inner(dap);
 219         if (retval != ERROR_OK)
 220                 return retval;
 221
 222         if ((dpidr & DP_DPIDR_VERSION_MASK) < (2UL << DP_DPIDR_VERSION_SHIFT)) {
 223                 LOG_INFO("Read DPIDR 0x%08" PRIx32
 224                                  " has version < 2. A non multidrop capable device connected?",
 225                                  dpidr);
 226                 return ERROR_FAIL;
 227         }
 228
 229         /* TODO: check TARGETID if DLIPDR is same for more than one DP */
 230         uint32_t expected_dlpidr = DP_DLPIDR_PROTVSN |
 231                         (dap->multidrop_targetsel & DP_TARGETSEL_INSTANCEID_MASK);
 232         if (dlpidr != expected_dlpidr) {
 233                 LOG_INFO("Read incorrect DLPIDR 0x%08" PRIx32
 234                                  " (possibly CTRL/STAT value)",
 235                                  dlpidr);
 236                 return ERROR_FAIL;
 237         }
 238
 239         LOG_DEBUG_IO("Selected DP_TARGETSEL 0x%08" PRIx32, dap->multidrop_targetsel);
 240         swd_multidrop_selected_dap = dap;
 241
 242         if (dpidr_ptr)
 243                 *dpidr_ptr = dpidr;
 244
 245         if (dlpidr_ptr)
 246                 *dlpidr_ptr = dlpidr;
 247
 248         return retval;
 249 }
 250
 251 static int swd_multidrop_select(struct adiv5_dap *dap)
 252 {
 253         if (!dap_is_multidrop(dap))
 254                 return ERROR_OK;
 255
 256         if (swd_multidrop_selected_dap == dap)
 257                 return ERROR_OK;
 258
 259         int retval = ERROR_OK;
 260         for (unsigned int retry = 0; ; retry++) {
 261                 bool clear_sticky = retry > 0;
 262
 263                 retval = swd_multidrop_select_inner(dap, NULL, NULL, clear_sticky);
 264                 if (retval == ERROR_OK)
 265                         break;
 266
 267                 swd_multidrop_selected_dap = NULL;
 268                 if (retry > 3) {
 269                         LOG_ERROR("Failed to select multidrop %s", adiv5_dap_name(dap));
 270                         return retval;
 271                 }
 272
 273                 LOG_DEBUG("Failed to select multidrop %s, retrying...",
 274                                   adiv5_dap_name(dap));
 275         }
 276
 277         return retval;
 278 }
 279
 280 static int swd_connect_multidrop(struct adiv5_dap *dap)
 281 {
 282         int retval;
 283         uint32_t dpidr = 0xdeadbeef;
 284         uint32_t dlpidr = 0xdeadbeef;
 285         int64_t timeout = timeval_ms() + 500;
 286
 287         do {
 288                 swd_send_sequence(dap, JTAG_TO_DORMANT);
 289                 swd_send_sequence(dap, DORMANT_TO_SWD);
 290
 291                 /* Clear link state, including the SELECT cache. */
 292                 dap->do_reconnect = false;
 293                 dap_invalidate_cache(dap);
 294                 swd_multidrop_selected_dap = NULL;
 295
 296                 retval = swd_multidrop_select_inner(dap, &dpidr, &dlpidr, true);
 297                 if (retval == ERROR_OK)
 298                         break;
 299
 300                 alive_sleep(1);
 301
 302         } while (timeval_ms() < timeout);
 303
 304         if (retval != ERROR_OK) {
 305                 swd_multidrop_selected_dap = NULL;
 306                 LOG_ERROR("Failed to connect multidrop %s", adiv5_dap_name(dap));
 307                 return retval;
 308         }
 309
 310         LOG_INFO("SWD DPIDR 0x%08" PRIx32 ", DLPIDR 0x%08" PRIx32,
 311                           dpidr, dlpidr);
 312
 313         return retval;
 314 }
 315
 316 static int swd_connect_single(struct adiv5_dap *dap)
 317 {
 318         int retval;
 319         uint32_t dpidr = 0xdeadbeef;
 320         int64_t timeout = timeval_ms() + 500;
 321
 322         do {
 323                 if (dap->switch_through_dormant) {
 324                         swd_send_sequence(dap, JTAG_TO_DORMANT);
 325                         swd_send_sequence(dap, DORMANT_TO_SWD);
 326                 } else {
 327                         swd_send_sequence(dap, JTAG_TO_SWD);
 328                 }
 329
 330                 /* Clear link state, including the SELECT cache. */
 331                 dap->do_reconnect = false;
 332                 dap_invalidate_cache(dap);
 333
 334                 /* The sequences to enter in SWD (JTAG_TO_SWD and DORMANT_TO_SWD) end
 335                  * with a SWD line reset sequence (50 clk with SWDIO high).
 336                  * From ARM IHI 0074C ADIv6.0, chapter B4.3.3 "Connection and line reset
 337                  * sequence":
 338                  * - line reset sets DP_SELECT_DPBANK to zero;
 339                  * - read of DP_DPIDR takes the connection out of reset;
 340                  * - write of DP_TARGETSEL keeps the connection in reset;
 341                  * - other accesses return protocol error (SWDIO not driven by target).
 342                  *
 343                  * Read DP_DPIDR to get out of reset. Initialize dap->select to zero to
 344                  * skip the write to DP_SELECT, avoiding the protocol error. Set again
 345                  * dap->select to DP_SELECT_INVALID because the rest of the register is
 346                  * unknown after line reset.
 347                  */
 348                 dap->select = 0;
 349                 retval = swd_queue_dp_read_inner(dap, DP_DPIDR, &dpidr);
 350                 if (retval == ERROR_OK) {
 351                         retval = swd_run_inner(dap);
 352                         if (retval == ERROR_OK)
 353                                 break;
 354                 }
 355
 356                 alive_sleep(1);
 357
 358                 dap->switch_through_dormant = !dap->switch_through_dormant;
 359         } while (timeval_ms() < timeout);
 360
 361         dap->select = DP_SELECT_INVALID;
 362
 363         if (retval != ERROR_OK) {
 364                 LOG_ERROR("Error connecting DP: cannot read IDR");
 365                 return retval;
 366         }
 367
 368         LOG_INFO("SWD DPIDR 0x%08" PRIx32, dpidr);
 369
 370         do {
 371                 dap->do_reconnect = false;
 372
 373                 /* force clear all sticky faults */
 374                 swd_clear_sticky_errors(dap);
 375
 376                 retval = swd_run_inner(dap);
 377                 if (retval != ERROR_WAIT)
 378                         break;
 379
 380                 alive_sleep(10);
 381
 382         } while (timeval_ms() < timeout);
 383
 384         return retval;
 385 }
 386
 387 static int swd_connect(struct adiv5_dap *dap)
 388 {
 389         int status;
 390
 391         /* FIXME validate transport config ... is the
 392          * configured DAP present (check IDCODE)?
 393          */
 394
 395         /* Check if we should reset srst already when connecting, but not if reconnecting. */
 396         if (!dap->do_reconnect) {
 397                 enum reset_types jtag_reset_config = jtag_get_reset_config();
 398
 399                 if (jtag_reset_config & RESET_CNCT_UNDER_SRST) {
 400                         if (jtag_reset_config & RESET_SRST_NO_GATING)
 401                                 adapter_assert_reset();
 402                         else
 403                                 LOG_WARNING("\'srst_nogate\' reset_config option is required");
 404                 }
 405         }
 406
 407         if (dap_is_multidrop(dap))
 408                 status = swd_connect_multidrop(dap);
 409         else
 410                 status = swd_connect_single(dap);
 411
 412         /* IHI 0031E B4.3.2:
 413          * "A WAIT response must not be issued to the ...
 414          * ... writes to the ABORT register"
 415          * swd_clear_sticky_errors() writes to the ABORT register only.
 416          *
 417          * Unfortunately at least Microchip SAMD51/E53/E54 returns WAIT
 418          * in a corner case. Just try if ABORT resolves the problem.
 419          */
 420         if (status == ERROR_WAIT) {
 421                 LOG_WARNING("Connecting DP: stalled AP operation, issuing ABORT");
 422
 423                 dap->do_reconnect = false;
 424
 425                 status = swd_queue_dp_write_inner(dap, DP_ABORT,
 426                         DAPABORT | STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR);
 427
 428                 if (status == ERROR_OK)
 429                         status = swd_run_inner(dap);
 430         }
 431
 432         if (status == ERROR_OK)
 433                 status = dap_dp_init(dap);
 434
 435         return status;
 436 }
 437
 438 static int swd_check_reconnect(struct adiv5_dap *dap)
 439 {
 440         if (dap->do_reconnect)
 441                 return swd_connect(dap);
 442
 443         return ERROR_OK;
 444 }
 445
 446 static int swd_queue_ap_abort(struct adiv5_dap *dap, uint8_t *ack)
 447 {
 448         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 449         assert(swd);
 450
 451         /* TODO: Send DAPABORT in swd_multidrop_select_inner()
 452          * in the case the multidrop dap is not selected?
 453          * swd_queue_ap_abort() is not currently used anyway...
 454          */
 455         int retval = swd_multidrop_select(dap);
 456         if (retval != ERROR_OK)
 457                 return retval;
 458
 459         swd->write_reg(swd_cmd(false, false, DP_ABORT),
 460                 DAPABORT | STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
 461         return check_sync(dap);
 462 }
 463
 464 static int swd_queue_dp_read(struct adiv5_dap *dap, unsigned reg,
 465                 uint32_t *data)
 466 {
 467         int retval = swd_check_reconnect(dap);
 468         if (retval != ERROR_OK)
 469                 return retval;
 470
 471         retval = swd_multidrop_select(dap);
 472         if (retval != ERROR_OK)
 473                 return retval;
 474
 475         return swd_queue_dp_read_inner(dap, reg, data);
 476 }
 477
 478 static int swd_queue_dp_write(struct adiv5_dap *dap, unsigned reg,
 479                 uint32_t data)
 480 {
 481         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 482         assert(swd);
 483
 484         int retval = swd_check_reconnect(dap);
 485         if (retval != ERROR_OK)
 486                 return retval;
 487
 488         retval = swd_multidrop_select(dap);
 489         if (retval != ERROR_OK)
 490                 return retval;
 491
 492         return swd_queue_dp_write_inner(dap, reg, data);
 493 }
 494
 495 /** Select the AP register bank matching bits 7:4 of reg. */
 496 static int swd_queue_ap_bankselect(struct adiv5_ap *ap, unsigned reg)
 497 {
 498         int retval;
 499         struct adiv5_dap *dap = ap->dap;
 500         uint64_t sel;
 501
 502         if (is_adiv6(dap)) {
 503                 sel = ap->ap_num | (reg & 0x00000FF0);
 504                 if (sel == (dap->select & ~0xfULL))
 505                         return ERROR_OK;
 506
 507                 if (dap->select != DP_SELECT_INVALID)
 508                         sel |= dap->select & 0xf;
 509                 dap->select = sel;
 510                 LOG_DEBUG("AP BANKSEL: %" PRIx64, sel);
 511
 512                 retval = swd_queue_dp_write(dap, DP_SELECT, (uint32_t)sel);
 513
 514                 if (retval == ERROR_OK && dap->asize > 32)
 515                         retval = swd_queue_dp_write(dap, DP_SELECT1, (uint32_t)(sel >> 32));
 516
 517                 if (retval != ERROR_OK)
 518                         dap->select = DP_SELECT_INVALID;
 519
 520                 return retval;
 521         }
 522
 523         /* ADIv5 */
 524         sel = (ap->ap_num << 24) | (reg & 0x000000F0);
 525         if (dap->select != DP_SELECT_INVALID)
 526                 sel |= dap->select & DP_SELECT_DPBANK;
 527
 528         if (sel == dap->select)
 529                 return ERROR_OK;
 530
 531         dap->select = sel;
 532
 533         retval = swd_queue_dp_write_inner(dap, DP_SELECT, sel);
 534         if (retval != ERROR_OK)
 535                 dap->select = DP_SELECT_INVALID;
 536
 537         return retval;
 538 }
 539
 540 static int swd_queue_ap_read(struct adiv5_ap *ap, unsigned reg,
 541                 uint32_t *data)
 542 {
 543         struct adiv5_dap *dap = ap->dap;
 544         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 545         assert(swd);
 546
 547         int retval = swd_check_reconnect(dap);
 548         if (retval != ERROR_OK)
 549                 return retval;
 550
 551         retval = swd_multidrop_select(dap);
 552         if (retval != ERROR_OK)
 553                 return retval;
 554
 555         retval = swd_queue_ap_bankselect(ap, reg);
 556         if (retval != ERROR_OK)
 557                 return retval;
 558
 559         swd->read_reg(swd_cmd(true, true, reg), dap->last_read, ap->memaccess_tck);
 560         dap->last_read = data;
 561
 562         return check_sync(dap);
 563 }
 564
 565 static int swd_queue_ap_write(struct adiv5_ap *ap, unsigned reg,
 566                 uint32_t data)
 567 {
 568         struct adiv5_dap *dap = ap->dap;
 569         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 570         assert(swd);
 571
 572         int retval = swd_check_reconnect(dap);
 573         if (retval != ERROR_OK)
 574                 return retval;
 575
 576         retval = swd_multidrop_select(dap);
 577         if (retval != ERROR_OK)
 578                 return retval;
 579
 580         swd_finish_read(dap);
 581
 582         retval = swd_queue_ap_bankselect(ap, reg);
 583         if (retval != ERROR_OK)
 584                 return retval;
 585
 586         swd->write_reg(swd_cmd(false, true, reg), data, ap->memaccess_tck);
 587
 588         return check_sync(dap);
 589 }
 590
 591 /** Executes all queued DAP operations. */
 592 static int swd_run(struct adiv5_dap *dap)
 593 {
 594         int retval = swd_multidrop_select(dap);
 595         if (retval != ERROR_OK)
 596                 return retval;
 597
 598         swd_finish_read(dap);
 599
 600         return swd_run_inner(dap);
 601 }
 602
 603 /** Put the SWJ-DP back to JTAG mode */
 604 static void swd_quit(struct adiv5_dap *dap)
 605 {
 606         const struct swd_driver *swd = adiv5_dap_swd_driver(dap);
 607         static bool done;
 608
 609         /* There is no difference if the sequence is sent at the last
 610          * or the first swd_quit() call, send it just once */
 611         if (done)
 612                 return;
 613
 614         done = true;
 615         if (dap_is_multidrop(dap)) {
 616                 swd->switch_seq(SWD_TO_DORMANT);
 617                 /* Revisit!
 618                  * Leaving DPs in dormant state was tested and offers some safety
 619                  * against DPs mismatch in case of unintentional use of non-multidrop SWD.
 620                  * To put SWJ-DPs to power-on state issue
 621                  * swd->switch_seq(DORMANT_TO_JTAG);
 622                  */
 623         } else {
 624                 if (dap->switch_through_dormant) {
 625                         swd->switch_seq(SWD_TO_DORMANT);
 626                         swd->switch_seq(DORMANT_TO_JTAG);
 627                 } else {
 628                         swd->switch_seq(SWD_TO_JTAG);
 629                 }
 630         }
 631
 632         /* flush the queue to shift out the sequence before exit */
 633         swd->run();
 634 }
 635
 636 const struct dap_ops swd_dap_ops = {
 637         .connect = swd_connect,
 638         .send_sequence = swd_send_sequence,
 639         .queue_dp_read = swd_queue_dp_read,
 640         .queue_dp_write = swd_queue_dp_write,
 641         .queue_ap_read = swd_queue_ap_read,
 642         .queue_ap_write = swd_queue_ap_write,
 643         .queue_ap_abort = swd_queue_ap_abort,
 644         .run = swd_run,
 645         .quit = swd_quit,
 646 };
 647
 648 static const struct command_registration swd_commands[] = {
 649         {
 650                 /*
 651                  * Set up SWD and JTAG targets identically, unless/until
 652                  * infrastructure improves ...  meanwhile, ignore all
 653                  * JTAG-specific stuff like IR length for SWD.
 654                  *
 655                  * REVISIT can we verify "just one SWD DAP" here/early?
 656                  */
 657                 .name = "newdap",
 658                 .jim_handler = jim_jtag_newtap,
 659                 .mode = COMMAND_CONFIG,
 660                 .help = "declare a new SWD DAP"
 661         },
 662         COMMAND_REGISTRATION_DONE
 663 };
 664
 665 static const struct command_registration swd_handlers[] = {
 666         {
 667                 .name = "swd",
 668                 .mode = COMMAND_ANY,
 669                 .help = "SWD command group",
 670                 .chain = swd_commands,
 671                 .usage = "",
 672         },
 673         COMMAND_REGISTRATION_DONE
 674 };
 675
 676 static int swd_select(struct command_context *ctx)
 677 {
 678         /* FIXME: only place where global 'adapter_driver' is still needed */
 679         extern struct adapter_driver *adapter_driver;
 680         const struct swd_driver *swd = adapter_driver->swd_ops;
 681         int retval;
 682
 683         retval = register_commands(ctx, NULL, swd_handlers);
 684         if (retval != ERROR_OK)
 685                 return retval;
 686
 687          /* be sure driver is in SWD mode; start
 688           * with hardware default TRN (1), it can be changed later
 689           */
 690         if (!swd || !swd->read_reg || !swd->write_reg || !swd->init) {
 691                 LOG_DEBUG("no SWD driver?");
 692                 return ERROR_FAIL;
 693         }
 694
 695         retval = swd->init();
 696         if (retval != ERROR_OK) {
 697                 LOG_DEBUG("can't init SWD driver");
 698                 return retval;
 699         }
 700
 701         return retval;
 702 }
 703
 704 static int swd_init(struct command_context *ctx)
 705 {
 706         /* nothing done here, SWD is initialized
 707          * together with the DAP */
 708         return ERROR_OK;
 709 }
 710
 711 static struct transport swd_transport = {
 712         .name = "swd",
 713         .select = swd_select,
 714         .init = swd_init,
 715 };
 716
 717 static void swd_constructor(void) __attribute__((constructor));
 718 static void swd_constructor(void)
 719 {
 720         transport_register(&swd_transport);
 721 }
 722
 723 /** Returns true if the current debug session
 724  * is using SWD as its transport.
 725  */
 726 bool transport_is_swd(void)
 727 {
 728         return get_current_transport() == &swd_transport;
 729 }