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   1 /***************************************************************************
   2  *   Copyright (C) 2012 by Matthias Blaicher                               *
   3  *   Matthias Blaicher - matthias@blaicher.com                             *
   4  *                                                                         *
   5  *   Copyright (C) 2011 by Broadcom Corporation                            *
   6  *   Evan Hunter - ehunter@broadcom.com                                    *
   7  *                                                                         *
   8  *   This program is free software; you can redistribute it and/or modify  *
   9  *   it under the terms of the GNU General Public License as published by  *
  10  *   the Free Software Foundation; either version 2 of the License, or     *
  11  *   (at your option) any later version.                                   *
  12  *                                                                         *
  13  *   This program is distributed in the hope that it will be useful,       *
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  16  *   GNU General Public License for more details.                          *
  17  *                                                                         *
  18  *   You should have received a copy of the GNU General Public License     *
  19  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  20  ***************************************************************************/
  21
  22 #ifdef HAVE_CONFIG_H
  23 #include "config.h"
  24 #endif
  25
  26 #include "rtos.h"
  27 #include "target/armv7m.h"
  28
  29 static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
  30         { ARMV7M_R0,   -1,   32 },              /* r0   */
  31         { ARMV7M_R1,   -1,   32 },              /* r1   */
  32         { ARMV7M_R2,   -1,   32 },              /* r2   */
  33         { ARMV7M_R3,   -1,   32 },              /* r3   */
  34         { ARMV7M_R4,   0x00, 32 },              /* r4   */
  35         { ARMV7M_R5,   0x04, 32 },              /* r5   */
  36         { ARMV7M_R6,   0x08, 32 },              /* r6   */
  37         { ARMV7M_R7,   0x0c, 32 },              /* r7   */
  38         { ARMV7M_R8,   0x10, 32 },              /* r8   */
  39         { ARMV7M_R9,   0x14, 32 },              /* r9   */
  40         { ARMV7M_R10,  0x18, 32 },              /* r10  */
  41         { ARMV7M_R11,  0x1c, 32 },              /* r11  */
  42         { ARMV7M_R12,  -1,   32 },              /* r12  */
  43         { ARMV7M_R13,  -2,   32 },              /* sp   */
  44         { ARMV7M_R14,  -1,   32 },              /* lr   */
  45         { ARMV7M_PC,   0x20, 32 },              /* pc   */
  46         { ARMV7M_xPSR, -1,   32 },              /* xPSR */
  47 };
  48
  49 const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking = {
  50         .stack_registers_size = 0x24,
  51         .stack_growth_direction = -1,
  52         .num_output_registers = ARMV7M_NUM_CORE_REGS,
  53         .register_offsets = rtos_chibios_arm_v7m_stack_offsets
  54 };
  55
  56 static const struct stack_register_offset rtos_chibios_arm_v7m_stack_offsets_w_fpu[ARMV7M_NUM_CORE_REGS] = {
  57         { ARMV7M_R0,   -1,   32 },              /* r0   */
  58         { ARMV7M_R1,   -1,   32 },              /* r1   */
  59         { ARMV7M_R2,   -1,   32 },              /* r2   */
  60         { ARMV7M_R3,   -1,   32 },              /* r3   */
  61         { ARMV7M_R4,   0x40, 32 },              /* r4   */
  62         { ARMV7M_R5,   0x44, 32 },              /* r5   */
  63         { ARMV7M_R6,   0x48, 32 },              /* r6   */
  64         { ARMV7M_R7,   0x4c, 32 },              /* r7   */
  65         { ARMV7M_R8,   0x50, 32 },              /* r8   */
  66         { ARMV7M_R9,   0x54, 32 },              /* r9   */
  67         { ARMV7M_R10,  0x58, 32 },              /* r10  */
  68         { ARMV7M_R11,  0x5c, 32 },              /* r11  */
  69         { ARMV7M_R12,  -1,   32 },              /* r12  */
  70         { ARMV7M_R13,  -2,   32 },              /* sp   */
  71         { ARMV7M_R14,  -1,   32 },              /* lr   */
  72         { ARMV7M_PC,   0x60, 32 },              /* pc   */
  73         { ARMV7M_xPSR, -1,   32 },              /* xPSR */
  74 };
  75
  76 const struct rtos_register_stacking rtos_chibios_arm_v7m_stacking_w_fpu = {
  77         .stack_registers_size = 0x64,
  78         .stack_growth_direction = -1,
  79         .num_output_registers = ARMV7M_NUM_CORE_REGS,
  80         .register_offsets = rtos_chibios_arm_v7m_stack_offsets_w_fpu
  81 };