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   1 /***************************************************************************
   2  *   Copyright (C) 2011 by Mathias Kuester                                 *
   3  *   kesmtp@freenet.de                                                     *
   4  *                                                                         *
   5  *   Copyright (C) 2011 sleep(5) ltd                                       *
   6  *   tomas@sleepfive.com                                                   *
   7  *                                                                         *
   8  *   Copyright (C) 2012 by Christopher D. Kilgour                          *
   9  *   techie at whiterocker.com                                             *
  10  *                                                                         *
  11  *   Copyright (C) 2013 Nemui Trinomius                                    *
  12  *   nemuisan_kawausogasuki@live.jp                                        *
  13  *                                                                         *
  14  *   This program is free software; you can redistribute it and/or modify  *
  15  *   it under the terms of the GNU General Public License as published by  *
  16  *   the Free Software Foundation; either version 2 of the License, or     *
  17  *   (at your option) any later version.                                   *
  18  *                                                                         *
  19  *   This program is distributed in the hope that it will be useful,       *
  20  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  21  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  22  *   GNU General Public License for more details.                          *
  23  *                                                                         *
  24  *   You should have received a copy of the GNU General Public License     *
  25  *   along with this program; if not, write to the                         *
  26  *   Free Software Foundation, Inc.,                                       *
  27  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  28  ***************************************************************************/
  29
  30 #ifdef HAVE_CONFIG_H
  31 #include "config.h"
  32 #endif
  33
  34 #include "jtag/interface.h"
  35 #include "imp.h"
  36 #include <helper/binarybuffer.h>
  37 #include <target/target_type.h>
  38 #include <target/algorithm.h>
  39 #include <target/armv7m.h>
  40 #include <target/cortex_m.h>
  41
  42 /*
  43  * Implementation Notes
  44  *
  45  * The persistent memories in the Kinetis chip families K10 through
  46  * K70 are all manipulated with the Flash Memory Module.  Some
  47  * variants call this module the FTFE, others call it the FTFL.  To
  48  * indicate that both are considered here, we use FTFX.
  49  *
  50  * Within the module, according to the chip variant, the persistent
  51  * memory is divided into what Freescale terms Program Flash, FlexNVM,
  52  * and FlexRAM.  All chip variants have Program Flash.  Some chip
  53  * variants also have FlexNVM and FlexRAM, which always appear
  54  * together.
  55  *
  56  * A given Kinetis chip may have 1, 2 or 4 blocks of flash.  Here we map
  57  * each block to a separate bank.  Each block size varies by chip and
  58  * may be determined by the read-only SIM_FCFG1 register.  The sector
  59  * size within each bank/block varies by chip, and may be 1, 2 or 4k.
  60  * The sector size may be different for flash and FlexNVM.
  61  *
  62  * The first half of the flash (1 or 2 blocks) is always Program Flash
  63  * and always starts at address 0x00000000.  The "PFLSH" flag, bit 23
  64  * of the read-only SIM_FCFG2 register, determines whether the second
  65  * half of the flash is also Program Flash or FlexNVM+FlexRAM.  When
  66  * PFLSH is set, the second from the first half.  When PFLSH is clear,
  67  * the second half of flash is FlexNVM and always starts at address
  68  * 0x10000000.  FlexRAM, which is also present when PFLSH is clear,
  69  * always starts at address 0x14000000.
  70  *
  71  * The Flash Memory Module provides a register set where flash
  72  * commands are loaded to perform flash operations like erase and
  73  * program.  Different commands are available depending on whether
  74  * Program Flash or FlexNVM/FlexRAM is being manipulated.  Although
  75  * the commands used are quite consistent between flash blocks, the
  76  * parameters they accept differ according to the flash sector size.
  77  *
  78  */
  79
  80 /* Addressess */
  81 #define FLEXRAM         0x14000000
  82 #define FTFx_FSTAT      0x40020000
  83 #define FTFx_FCNFG      0x40020001
  84 #define FTFx_FCCOB3     0x40020004
  85 #define FTFx_FPROT3     0x40020010
  86 #define SIM_SDID        0x40048024
  87 #define SIM_SOPT1       0x40047000
  88 #define SIM_FCFG1       0x4004804c
  89 #define SIM_FCFG2       0x40048050
  90 #define WDOG_STCTRH     0x40052000
  91
  92 /* Commands */
  93 #define FTFx_CMD_BLOCKSTAT  0x00
  94 #define FTFx_CMD_SECTSTAT   0x01
  95 #define FTFx_CMD_LWORDPROG  0x06
  96 #define FTFx_CMD_SECTERASE  0x09
  97 #define FTFx_CMD_SECTWRITE  0x0b
  98 #define FTFx_CMD_SETFLEXRAM 0x81
  99 #define FTFx_CMD_MASSERASE  0x44
 100
 101 /* The older Kinetis K series uses the following SDID layout :
 102  * Bit 31-16 : 0
 103  * Bit 15-12 : REVID
 104  * Bit 11-7  : DIEID
 105  * Bit 6-4   : FAMID
 106  * Bit 3-0   : PINID
 107  *
 108  * The newer Kinetis series uses the following SDID layout :
 109  * Bit 31-28 : FAMID
 110  * Bit 27-24 : SUBFAMID
 111  * Bit 23-20 : SERIESID
 112  * Bit 19-16 : SRAMSIZE
 113  * Bit 15-12 : REVID
 114  * Bit 6-4   : Reserved (0)
 115  * Bit 3-0   : PINID
 116  *
 117  * We assume that if bits 31-16 are 0 then it's an older
 118  * K-series MCU.
 119  */
 120
 121 #define KINETIS_SOPT1_RAMSIZE_MASK  0x0000F000
 122 #define KINETIS_SOPT1_RAMSIZE_K24FN1M 0x0000B000
 123
 124 #define KINETIS_SDID_K_SERIES_MASK  0x0000FFFF
 125
 126 #define KINETIS_SDID_DIEID_MASK 0x00000F80
 127
 128 #define KINETIS_SDID_DIEID_K22FN128     0x00000680 /* smaller pflash with FTFA */
 129 #define KINETIS_SDID_DIEID_K22FN256     0x00000A80
 130 #define KINETIS_SDID_DIEID_K22FN512     0x00000E80
 131 #define KINETIS_SDID_DIEID_K24FN256     0x00000700
 132
 133 #define KINETIS_SDID_DIEID_K24FN1M      0x00000300 /* Detect Errata 7534 */
 134
 135 /* We can't rely solely on the FAMID field to determine the MCU
 136  * type since some FAMID values identify multiple MCUs with
 137  * different flash sector sizes (K20 and K22 for instance).
 138  * Therefore we combine it with the DIEID bits which may possibly
 139  * break if Freescale bumps the DIEID for a particular MCU. */
 140 #define KINETIS_K_SDID_TYPE_MASK 0x00000FF0
 141 #define KINETIS_K_SDID_K10_M50   0x00000000
 142 #define KINETIS_K_SDID_K10_M72   0x00000080
 143 #define KINETIS_K_SDID_K10_M100  0x00000100
 144 #define KINETIS_K_SDID_K10_M120  0x00000180
 145 #define KINETIS_K_SDID_K11               0x00000220
 146 #define KINETIS_K_SDID_K12               0x00000200
 147 #define KINETIS_K_SDID_K20_M50   0x00000010
 148 #define KINETIS_K_SDID_K20_M72   0x00000090
 149 #define KINETIS_K_SDID_K20_M100  0x00000110
 150 #define KINETIS_K_SDID_K20_M120  0x00000190
 151 #define KINETIS_K_SDID_K21_M50   0x00000230
 152 #define KINETIS_K_SDID_K21_M120  0x00000330
 153 #define KINETIS_K_SDID_K22_M50   0x00000210
 154 #define KINETIS_K_SDID_K22_M120  0x00000310
 155 #define KINETIS_K_SDID_K30_M72   0x000000A0
 156 #define KINETIS_K_SDID_K30_M100  0x00000120
 157 #define KINETIS_K_SDID_K40_M72   0x000000B0
 158 #define KINETIS_K_SDID_K40_M100  0x00000130
 159 #define KINETIS_K_SDID_K50_M72   0x000000E0
 160 #define KINETIS_K_SDID_K51_M72   0x000000F0
 161 #define KINETIS_K_SDID_K53               0x00000170
 162 #define KINETIS_K_SDID_K60_M100  0x00000140
 163 #define KINETIS_K_SDID_K60_M150  0x000001C0
 164 #define KINETIS_K_SDID_K70_M150  0x000001D0
 165
 166 #define KINETIS_SDID_SERIESID_MASK 0x00F00000
 167 #define KINETIS_SDID_SERIESID_K   0x00000000
 168 #define KINETIS_SDID_SERIESID_KL   0x00100000
 169 #define KINETIS_SDID_SERIESID_KW   0x00500000
 170 #define KINETIS_SDID_SERIESID_KV   0x00600000
 171
 172 #define KINETIS_SDID_SUBFAMID_MASK  0x0F000000
 173 #define KINETIS_SDID_SUBFAMID_KX0   0x00000000
 174 #define KINETIS_SDID_SUBFAMID_KX1   0x01000000
 175 #define KINETIS_SDID_SUBFAMID_KX2   0x02000000
 176 #define KINETIS_SDID_SUBFAMID_KX3   0x03000000
 177 #define KINETIS_SDID_SUBFAMID_KX4   0x04000000
 178 #define KINETIS_SDID_SUBFAMID_KX5   0x05000000
 179 #define KINETIS_SDID_SUBFAMID_KX6   0x06000000
 180
 181 #define KINETIS_SDID_FAMILYID_MASK  0xF0000000
 182 #define KINETIS_SDID_FAMILYID_K0X   0x00000000
 183 #define KINETIS_SDID_FAMILYID_K1X   0x10000000
 184 #define KINETIS_SDID_FAMILYID_K2X   0x20000000
 185 #define KINETIS_SDID_FAMILYID_K3X   0x30000000
 186 #define KINETIS_SDID_FAMILYID_K4X   0x40000000
 187 #define KINETIS_SDID_FAMILYID_K6X   0x60000000
 188 #define KINETIS_SDID_FAMILYID_K7X   0x70000000
 189
 190 struct kinetis_flash_bank {
 191         unsigned bank_ordinal;
 192         uint32_t sector_size;
 193         uint32_t max_flash_prog_size;
 194         uint32_t protection_size;
 195
 196         uint32_t sim_sdid;
 197         uint32_t sim_fcfg1;
 198         uint32_t sim_fcfg2;
 199
 200         enum {
 201                 FC_AUTO = 0,
 202                 FC_PFLASH,
 203                 FC_FLEX_NVM,
 204                 FC_FLEX_RAM,
 205         } flash_class;
 206
 207         enum {
 208                 FS_PROGRAM_SECTOR = 1,
 209                 FS_PROGRAM_LONGWORD = 2,
 210                 FS_PROGRAM_PHRASE = 4, /* Unsupported */
 211         } flash_support;
 212 };
 213
 214 #define MDM_REG_STAT            0x00
 215 #define MDM_REG_CTRL            0x04
 216 #define MDM_REG_ID              0xfc
 217
 218 #define MDM_STAT_FMEACK         (1<<0)
 219 #define MDM_STAT_FREADY         (1<<1)
 220 #define MDM_STAT_SYSSEC         (1<<2)
 221 #define MDM_STAT_SYSRES         (1<<3)
 222 #define MDM_STAT_FMEEN          (1<<5)
 223 #define MDM_STAT_BACKDOOREN     (1<<6)
 224 #define MDM_STAT_LPEN           (1<<7)
 225 #define MDM_STAT_VLPEN          (1<<8)
 226 #define MDM_STAT_LLSMODEXIT     (1<<9)
 227 #define MDM_STAT_VLLSXMODEXIT   (1<<10)
 228 #define MDM_STAT_CORE_HALTED    (1<<16)
 229 #define MDM_STAT_CORE_SLEEPDEEP (1<<17)
 230 #define MDM_STAT_CORESLEEPING   (1<<18)
 231
 232 #define MEM_CTRL_FMEIP          (1<<0)
 233 #define MEM_CTRL_DBG_DIS        (1<<1)
 234 #define MEM_CTRL_DBG_REQ        (1<<2)
 235 #define MEM_CTRL_SYS_RES_REQ    (1<<3)
 236 #define MEM_CTRL_CORE_HOLD_RES  (1<<4)
 237 #define MEM_CTRL_VLLSX_DBG_REQ  (1<<5)
 238 #define MEM_CTRL_VLLSX_DBG_ACK  (1<<6)
 239 #define MEM_CTRL_VLLSX_STAT_ACK (1<<7)
 240
 241 #define MDM_ACCESS_TIMEOUT      3000 /* iterations */
 242
 243 static int kinetis_mdm_write_register(struct adiv5_dap *dap, unsigned reg, uint32_t value)
 244 {
 245         int retval;
 246         LOG_DEBUG("MDM_REG[0x%02x] <- %08" PRIX32, reg, value);
 247
 248         dap_ap_select(dap, 1);
 249
 250         retval = dap_queue_ap_write(dap, reg, value);
 251         if (retval != ERROR_OK) {
 252                 LOG_DEBUG("MDM: failed to queue a write request");
 253                 return retval;
 254         }
 255
 256         retval = dap_run(dap);
 257         if (retval != ERROR_OK) {
 258                 LOG_DEBUG("MDM: dap_run failed");
 259                 return retval;
 260         }
 261
 262
 263         return ERROR_OK;
 264 }
 265
 266 static int kinetis_mdm_read_register(struct adiv5_dap *dap, unsigned reg, uint32_t *result)
 267 {
 268         int retval;
 269
 270         dap_ap_select(dap, 1);
 271
 272         retval = dap_queue_ap_read(dap, reg, result);
 273         if (retval != ERROR_OK) {
 274                 LOG_DEBUG("MDM: failed to queue a read request");
 275                 return retval;
 276         }
 277
 278         retval = dap_run(dap);
 279         if (retval != ERROR_OK) {
 280                 LOG_DEBUG("MDM: dap_run failed");
 281                 return retval;
 282         }
 283
 284         LOG_DEBUG("MDM_REG[0x%02x]: %08" PRIX32, reg, *result);
 285         return ERROR_OK;
 286 }
 287
 288 static int kinetis_mdm_poll_register(struct adiv5_dap *dap, unsigned reg, uint32_t mask, uint32_t value)
 289 {
 290         uint32_t val;
 291         int retval;
 292         int timeout = MDM_ACCESS_TIMEOUT;
 293
 294         do {
 295                 retval = kinetis_mdm_read_register(dap, reg, &val);
 296                 if (retval != ERROR_OK || (val & mask) == value)
 297                         return retval;
 298
 299                 alive_sleep(1);
 300         } while (timeout--);
 301
 302         LOG_DEBUG("MDM: polling timed out");
 303         return ERROR_FAIL;
 304 }
 305
 306 /*
 307  * This function implements the procedure to mass erase the flash via
 308  * SWD/JTAG on Kinetis K and L series of devices as it is described in
 309  * AN4835 "Production Flash Programming Best Practices for Kinetis K-
 310  * and L-series MCUs" Section 4.2.1
 311  */
 312 COMMAND_HANDLER(kinetis_mdm_mass_erase)
 313 {
 314         struct target *target = get_current_target(CMD_CTX);
 315         struct cortex_m_common *cortex_m = target_to_cm(target);
 316         struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
 317
 318         if (!dap) {
 319                 LOG_ERROR("Cannot perform mass erase with a high-level adapter");
 320                 return ERROR_FAIL;
 321         }
 322
 323         int retval;
 324
 325         /*
 326          * ... Power on the processor, or if power has already been
 327          * applied, assert the RESET pin to reset the processor. For
 328          * devices that do not have a RESET pin, write the System
 329          * Reset Request bit in the MDM-AP control register after
 330          * establishing communication...
 331          */
 332
 333         /* assert SRST */
 334         if (jtag_get_reset_config() & RESET_HAS_SRST)
 335                 adapter_assert_reset();
 336         else
 337                 LOG_WARNING("Attempting mass erase without hardware reset. This is not reliable; "
 338                             "it's recommended you connect SRST and use ``reset_config srst_only''.");
 339
 340         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, MEM_CTRL_SYS_RES_REQ);
 341         if (retval != ERROR_OK)
 342                 return retval;
 343
 344         /*
 345          * ... Read the MDM-AP status register until the Flash Ready bit sets...
 346          */
 347         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 348                                            MDM_STAT_FREADY | MDM_STAT_SYSRES,
 349                                            MDM_STAT_FREADY);
 350         if (retval != ERROR_OK) {
 351                 LOG_ERROR("MDM : flash ready timeout");
 352                 return retval;
 353         }
 354
 355         /*
 356          * ... Write the MDM-AP control register to set the Flash Mass
 357          * Erase in Progress bit. This will start the mass erase
 358          * process...
 359          */
 360         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL,
 361                                             MEM_CTRL_SYS_RES_REQ | MEM_CTRL_FMEIP);
 362         if (retval != ERROR_OK)
 363                 return retval;
 364
 365         /* As a sanity check make sure that device started mass erase procedure */
 366         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 367                                            MDM_STAT_FMEACK, MDM_STAT_FMEACK);
 368         if (retval != ERROR_OK)
 369                 return retval;
 370
 371         /*
 372          * ... Read the MDM-AP control register until the Flash Mass
 373          * Erase in Progress bit clears...
 374          */
 375         retval = kinetis_mdm_poll_register(dap, MDM_REG_CTRL,
 376                                            MEM_CTRL_FMEIP,
 377                                            0);
 378         if (retval != ERROR_OK)
 379                 return retval;
 380
 381         /*
 382          * ... Negate the RESET signal or clear the System Reset Request
 383          * bit in the MDM-AP control register...
 384          */
 385         retval = kinetis_mdm_write_register(dap, MDM_REG_CTRL, 0);
 386         if (retval != ERROR_OK)
 387                 return retval;
 388
 389         if (jtag_get_reset_config() & RESET_HAS_SRST) {
 390                 /* halt MCU otherwise it loops in hard fault - WDOG reset cycle */
 391                 target->reset_halt = true;
 392                 target->type->assert_reset(target);
 393                 target->type->deassert_reset(target);
 394         }
 395
 396         return ERROR_OK;
 397 }
 398
 399 static const uint32_t kinetis_known_mdm_ids[] = {
 400         0x001C0000,     /* Kinetis-K Series */
 401         0x001C0020,     /* Kinetis-L/M/V/E Series */
 402 };
 403
 404 /*
 405  * This function implements the procedure to connect to
 406  * SWD/JTAG on Kinetis K and L series of devices as it is described in
 407  * AN4835 "Production Flash Programming Best Practices for Kinetis K-
 408  * and L-series MCUs" Section 4.1.1
 409  */
 410 COMMAND_HANDLER(kinetis_check_flash_security_status)
 411 {
 412         struct target *target = get_current_target(CMD_CTX);
 413         struct cortex_m_common *cortex_m = target_to_cm(target);
 414         struct adiv5_dap *dap = cortex_m->armv7m.arm.dap;
 415
 416         if (!dap) {
 417                 LOG_WARNING("Cannot check flash security status with a high-level adapter");
 418                 return ERROR_OK;
 419         }
 420
 421         uint32_t val;
 422         int retval;
 423
 424         /*
 425          * ... The MDM-AP ID register can be read to verify that the
 426          * connection is working correctly...
 427          */
 428         retval = kinetis_mdm_read_register(dap, MDM_REG_ID, &val);
 429         if (retval != ERROR_OK) {
 430                 LOG_ERROR("MDM: failed to read ID register");
 431                 goto fail;
 432         }
 433
 434         bool found = false;
 435         for (size_t i = 0; i < ARRAY_SIZE(kinetis_known_mdm_ids); i++) {
 436                 if (val == kinetis_known_mdm_ids[i]) {
 437                         found = true;
 438                         break;
 439                 }
 440         }
 441
 442         if (!found)
 443                 LOG_WARNING("MDM: unknown ID %08" PRIX32, val);
 444
 445         /*
 446          * ... Read the MDM-AP status register until the Flash Ready bit sets...
 447          */
 448         retval = kinetis_mdm_poll_register(dap, MDM_REG_STAT,
 449                                            MDM_STAT_FREADY,
 450                                            MDM_STAT_FREADY);
 451         if (retval != ERROR_OK) {
 452                 LOG_ERROR("MDM: flash ready timeout");
 453                 goto fail;
 454         }
 455
 456         /*
 457          * ... Read the System Security bit to determine if security is enabled.
 458          * If System Security = 0, then proceed. If System Security = 1, then
 459          * communication with the internals of the processor, including the
 460          * flash, will not be possible without issuing a mass erase command or
 461          * unsecuring the part through other means (backdoor key unlock)...
 462          */
 463         retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
 464         if (retval != ERROR_OK) {
 465                 LOG_ERROR("MDM: failed to read MDM_REG_STAT");
 466                 goto fail;
 467         }
 468
 469         if ((val & (MDM_STAT_SYSSEC | MDM_STAT_CORE_HALTED)) == MDM_STAT_SYSSEC) {
 470                 LOG_WARNING("MDM: Secured MCU state detected however it may be a false alarm");
 471                 LOG_WARNING("MDM: Halting target to detect secured state reliably");
 472
 473                 retval = target_halt(target);
 474                 if (retval == ERROR_OK)
 475                         retval = target_wait_state(target, TARGET_HALTED, 100);
 476
 477                 if (retval != ERROR_OK) {
 478                         LOG_WARNING("MDM: Target not halted, trying reset halt");
 479                         target->reset_halt = true;
 480                         target->type->assert_reset(target);
 481                         target->type->deassert_reset(target);
 482                 }
 483
 484                 /* re-read status */
 485                 retval = kinetis_mdm_read_register(dap, MDM_REG_STAT, &val);
 486                 if (retval != ERROR_OK) {
 487                         LOG_ERROR("MDM: failed to read MDM_REG_STAT");
 488                         goto fail;
 489                 }
 490         }
 491
 492         if (val & MDM_STAT_SYSSEC) {
 493                 jtag_poll_set_enabled(false);
 494
 495                 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
 496                 LOG_WARNING("****                                                          ****");
 497                 LOG_WARNING("**** Your Kinetis MCU is in secured state, which means that,  ****");
 498                 LOG_WARNING("**** with exception for very basic communication, JTAG/SWD    ****");
 499                 LOG_WARNING("**** interface will NOT work. In order to restore its         ****");
 500                 LOG_WARNING("**** functionality please issue 'kinetis mdm mass_erase'      ****");
 501                 LOG_WARNING("**** command, power cycle the MCU and restart OpenOCD.        ****");
 502                 LOG_WARNING("****                                                          ****");
 503                 LOG_WARNING("*********** ATTENTION! ATTENTION! ATTENTION! ATTENTION! **********");
 504         } else {
 505                 LOG_INFO("MDM: Chip is unsecured. Continuing.");
 506                 jtag_poll_set_enabled(true);
 507         }
 508
 509         return ERROR_OK;
 510
 511 fail:
 512         LOG_ERROR("MDM: Failed to check security status of the MCU. Cannot proceed further");
 513         jtag_poll_set_enabled(false);
 514         return retval;
 515 }
 516
 517 FLASH_BANK_COMMAND_HANDLER(kinetis_flash_bank_command)
 518 {
 519         struct kinetis_flash_bank *bank_info;
 520
 521         if (CMD_ARGC < 6)
 522                 return ERROR_COMMAND_SYNTAX_ERROR;
 523
 524         LOG_INFO("add flash_bank kinetis %s", bank->name);
 525
 526         bank_info = malloc(sizeof(struct kinetis_flash_bank));
 527
 528         memset(bank_info, 0, sizeof(struct kinetis_flash_bank));
 529
 530         bank->driver_priv = bank_info;
 531
 532         return ERROR_OK;
 533 }
 534
 535 /* Disable the watchdog on Kinetis devices */
 536 int kinetis_disable_wdog(struct target *target, uint32_t sim_sdid)
 537 {
 538         struct working_area *wdog_algorithm;
 539         struct armv7m_algorithm armv7m_info;
 540         uint16_t wdog;
 541         int retval;
 542
 543         static const uint8_t kinetis_unlock_wdog_code[] = {
 544                 /* WDOG_UNLOCK = 0xC520 */
 545                 0x4f, 0xf4, 0x00, 0x53,    /* mov.w   r3, #8192     ; 0x2000  */
 546                 0xc4, 0xf2, 0x05, 0x03,    /* movt    r3, #16389    ; 0x4005  */
 547                 0x4c, 0xf2, 0x20, 0x52,   /* movw    r2, #50464    ; 0xc520  */
 548                 0xda, 0x81,               /* strh    r2, [r3, #14]  */
 549
 550                 /* WDOG_UNLOCK = 0xD928 */
 551                 0x4f, 0xf4, 0x00, 0x53,   /* mov.w   r3, #8192     ; 0x2000  */
 552                 0xc4, 0xf2, 0x05, 0x03,   /* movt    r3, #16389    ; 0x4005  */
 553                 0x4d, 0xf6, 0x28, 0x12,   /* movw    r2, #55592    ; 0xd928  */
 554                 0xda, 0x81,               /* strh    r2, [r3, #14]  */
 555
 556                 /* WDOG_SCR = 0x1d2 */
 557                 0x4f, 0xf4, 0x00, 0x53,   /* mov.w   r3, #8192     ; 0x2000  */
 558                 0xc4, 0xf2, 0x05, 0x03,   /* movt    r3, #16389    ; 0x4005  */
 559                 0x4f, 0xf4, 0xe9, 0x72,   /* mov.w   r2, #466      ; 0x1d2  */
 560                 0x1a, 0x80,               /* strh    r2, [r3, #0]  */
 561
 562                 /* END */
 563                 0x00, 0xBE,               /* bkpt #0 */
 564         };
 565
 566         /* Decide whether the connected device needs watchdog disabling.
 567          * Disable for all Kx devices, i.e., return if it is a KLx */
 568
 569         if ((sim_sdid & KINETIS_SDID_SERIESID_MASK) == KINETIS_SDID_SERIESID_KL)
 570                 return ERROR_OK;
 571
 572         /* The connected device requires watchdog disabling. */
 573         retval = target_read_u16(target, WDOG_STCTRH, &wdog);
 574         if (retval != ERROR_OK)
 575                 return retval;
 576
 577         if ((wdog & 0x1) == 0) {
 578                 /* watchdog already disabled */
 579                 return ERROR_OK;
 580         }
 581         LOG_INFO("Disabling Kinetis watchdog (initial WDOG_STCTRLH = 0x%x)", wdog);
 582
 583         if (target->state != TARGET_HALTED) {
 584                 LOG_ERROR("Target not halted");
 585                 return ERROR_TARGET_NOT_HALTED;
 586         }
 587
 588         retval = target_alloc_working_area(target, sizeof(kinetis_unlock_wdog_code), &wdog_algorithm);
 589         if (retval != ERROR_OK)
 590                 return retval;
 591
 592         retval = target_write_buffer(target, wdog_algorithm->address,
 593                         sizeof(kinetis_unlock_wdog_code), (uint8_t *)kinetis_unlock_wdog_code);
 594         if (retval != ERROR_OK) {
 595                 target_free_working_area(target, wdog_algorithm);
 596                 return retval;
 597         }
 598
 599         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 600         armv7m_info.core_mode = ARM_MODE_THREAD;
 601
 602         retval = target_run_algorithm(target, 0, NULL, 0, NULL, wdog_algorithm->address,
 603                         wdog_algorithm->address + (sizeof(kinetis_unlock_wdog_code) - 2),
 604                         10000, &armv7m_info);
 605
 606         if (retval != ERROR_OK)
 607                 LOG_ERROR("error executing kinetis wdog unlock algorithm");
 608
 609         retval = target_read_u16(target, WDOG_STCTRH, &wdog);
 610         if (retval != ERROR_OK)
 611                 return retval;
 612         LOG_INFO("WDOG_STCTRLH = 0x%x", wdog);
 613
 614         target_free_working_area(target, wdog_algorithm);
 615
 616         return retval;
 617 }
 618
 619 COMMAND_HANDLER(kinetis_disable_wdog_handler)
 620 {
 621         int result;
 622         uint32_t sim_sdid;
 623         struct target *target = get_current_target(CMD_CTX);
 624
 625         if (CMD_ARGC > 0)
 626                 return ERROR_COMMAND_SYNTAX_ERROR;
 627
 628         result = target_read_u32(target, SIM_SDID, &sim_sdid);
 629         if (result != ERROR_OK) {
 630                 LOG_ERROR("Failed to read SIMSDID");
 631                 return result;
 632         }
 633
 634         result = kinetis_disable_wdog(target, sim_sdid);
 635         return result;
 636 }
 637
 638
 639 /* Kinetis Program-LongWord Microcodes */
 640 static const uint8_t kinetis_flash_write_code[] = {
 641         /* Params:
 642          * r0 - workarea buffer
 643         * r1 - target address
 644         * r2 - wordcount
 645         * Clobbered:
 646         * r4 - tmp
 647         * r5 - tmp
 648         * r6 - tmp
 649         * r7 - tmp
 650         */
 651
 652                                                         /* .L1: */
 653                                                 /* for(register uint32_t i=0;i<wcount;i++){ */
 654         0x04, 0x1C,                                     /* mov    r4, r0          */
 655         0x00, 0x23,                                     /* mov    r3, #0          */
 656                                                         /* .L2: */
 657         0x0E, 0x1A,                                     /* sub    r6, r1, r0      */
 658         0xA6, 0x19,                                     /* add    r6, r4, r6      */
 659         0x93, 0x42,                                     /* cmp    r3, r2          */
 660         0x16, 0xD0,                                     /* beq    .L9             */
 661                                                         /* .L5: */
 662                                                 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
 663         0x0B, 0x4D,                                     /* ldr    r5, .L10        */
 664         0x2F, 0x78,                                     /* ldrb   r7, [r5]        */
 665         0x7F, 0xB2,                                     /* sxtb   r7, r7          */
 666         0x00, 0x2F,                                     /* cmp    r7, #0          */
 667         0xFA, 0xDA,                                     /* bge    .L5             */
 668                                                 /* FTFx_FSTAT = FTFA_FSTAT_ACCERR_MASK|FTFA_FSTAT_FPVIOL_MASK|FTFA_FSTAT_RDCO */
 669         0x70, 0x27,                                     /* mov    r7, #112        */
 670         0x2F, 0x70,                                     /* strb   r7, [r5]        */
 671                                                 /* FTFx_FCCOB3 = faddr; */
 672         0x09, 0x4F,                                     /* ldr    r7, .L10+4      */
 673         0x3E, 0x60,                                     /* str    r6, [r7]        */
 674         0x06, 0x27,                                     /* mov    r7, #6          */
 675                                                 /* FTFx_FCCOB0 = 0x06;  */
 676         0x08, 0x4E,                                     /* ldr    r6, .L10+8      */
 677         0x37, 0x70,                                     /* strb   r7, [r6]        */
 678                                                 /* FTFx_FCCOB7 = *pLW;  */
 679         0x80, 0xCC,                                     /* ldmia  r4!, {r7}       */
 680         0x08, 0x4E,                                     /* ldr    r6, .L10+12     */
 681         0x37, 0x60,                                     /* str    r7, [r6]        */
 682                                                 /* FTFx_FSTAT = FTFA_FSTAT_CCIF_MASK; */
 683         0x80, 0x27,                                     /* mov    r7, #128        */
 684         0x2F, 0x70,                                     /* strb   r7, [r5]        */
 685                                                         /* .L4: */
 686                                                 /* while((FTFx_FSTAT&FTFA_FSTAT_CCIF_MASK) != FTFA_FSTAT_CCIF_MASK){}; */
 687         0x2E, 0x78,                                     /* ldrb    r6, [r5]       */
 688         0x77, 0xB2,                                     /* sxtb    r7, r6         */
 689         0x00, 0x2F,                                     /* cmp     r7, #0         */
 690         0xFB, 0xDA,                                     /* bge     .L4            */
 691         0x01, 0x33,                                     /* add     r3, r3, #1     */
 692         0xE4, 0xE7,                                     /* b       .L2            */
 693                                                         /* .L9: */
 694         0x00, 0xBE,                                     /* bkpt #0                */
 695                                                         /* .L10: */
 696         0x00, 0x00, 0x02, 0x40,         /* .word    1073872896    */
 697         0x04, 0x00, 0x02, 0x40,         /* .word    1073872900    */
 698         0x07, 0x00, 0x02, 0x40,         /* .word    1073872903    */
 699         0x08, 0x00, 0x02, 0x40,         /* .word    1073872904    */
 700 };
 701
 702 /* Program LongWord Block Write */
 703 static int kinetis_write_block(struct flash_bank *bank, const uint8_t *buffer,
 704                 uint32_t offset, uint32_t wcount)
 705 {
 706         struct target *target = bank->target;
 707         uint32_t buffer_size = 2048;            /* Default minimum value */
 708         struct working_area *write_algorithm;
 709         struct working_area *source;
 710         uint32_t address = bank->base + offset;
 711         struct reg_param reg_params[3];
 712         struct armv7m_algorithm armv7m_info;
 713         int retval = ERROR_OK;
 714
 715         /* Params:
 716          * r0 - workarea buffer
 717          * r1 - target address
 718          * r2 - wordcount
 719          * Clobbered:
 720          * r4 - tmp
 721          * r5 - tmp
 722          * r6 - tmp
 723          * r7 - tmp
 724          */
 725
 726         /* Increase buffer_size if needed */
 727         if (buffer_size < (target->working_area_size/2))
 728                 buffer_size = (target->working_area_size/2);
 729
 730         LOG_INFO("Kinetis: FLASH Write ...");
 731
 732         /* check code alignment */
 733         if (offset & 0x1) {
 734                 LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
 735                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 736         }
 737
 738         /* allocate working area with flash programming code */
 739         if (target_alloc_working_area(target, sizeof(kinetis_flash_write_code),
 740                         &write_algorithm) != ERROR_OK) {
 741                 LOG_WARNING("no working area available, can't do block memory writes");
 742                 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 743         }
 744
 745         retval = target_write_buffer(target, write_algorithm->address,
 746                 sizeof(kinetis_flash_write_code), kinetis_flash_write_code);
 747         if (retval != ERROR_OK)
 748                 return retval;
 749
 750         /* memory buffer */
 751         while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK) {
 752                 buffer_size /= 4;
 753                 if (buffer_size <= 256) {
 754                         /* free working area, write algorithm already allocated */
 755                         target_free_working_area(target, write_algorithm);
 756
 757                         LOG_WARNING("No large enough working area available, can't do block memory writes");
 758                         return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 759                 }
 760         }
 761
 762         armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 763         armv7m_info.core_mode = ARM_MODE_THREAD;
 764
 765         init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT); /* *pLW (*buffer) */
 766         init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT); /* faddr */
 767         init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT); /* number of words to program */
 768
 769         /* write code buffer and use Flash programming code within kinetis       */
 770         /* Set breakpoint to 0 with time-out of 1000 ms                          */
 771         while (wcount > 0) {
 772                 uint32_t thisrun_count = (wcount > (buffer_size / 4)) ? (buffer_size / 4) : wcount;
 773
 774                 retval = target_write_buffer(target, source->address, thisrun_count * 4, buffer);
 775                 if (retval != ERROR_OK)
 776                         break;
 777
 778                 buf_set_u32(reg_params[0].value, 0, 32, source->address);
 779                 buf_set_u32(reg_params[1].value, 0, 32, address);
 780                 buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
 781
 782                 retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 783                                 write_algorithm->address, 0, 100000, &armv7m_info);
 784                 if (retval != ERROR_OK) {
 785                         LOG_ERROR("Error executing kinetis Flash programming algorithm");
 786                         retval = ERROR_FLASH_OPERATION_FAILED;
 787                         break;
 788                 }
 789
 790                 buffer += thisrun_count * 4;
 791                 address += thisrun_count * 4;
 792                 wcount -= thisrun_count;
 793         }
 794
 795         target_free_working_area(target, source);
 796         target_free_working_area(target, write_algorithm);
 797
 798         destroy_reg_param(&reg_params[0]);
 799         destroy_reg_param(&reg_params[1]);
 800         destroy_reg_param(&reg_params[2]);
 801
 802         return retval;
 803 }
 804
 805 static int kinetis_protect(struct flash_bank *bank, int set, int first, int last)
 806 {
 807         LOG_WARNING("kinetis_protect not supported yet");
 808         /* FIXME: TODO */
 809
 810         if (bank->target->state != TARGET_HALTED) {
 811                 LOG_ERROR("Target not halted");
 812                 return ERROR_TARGET_NOT_HALTED;
 813         }
 814
 815         return ERROR_FLASH_BANK_INVALID;
 816 }
 817
 818 static int kinetis_protect_check(struct flash_bank *bank)
 819 {
 820         struct kinetis_flash_bank *kinfo = bank->driver_priv;
 821
 822         if (bank->target->state != TARGET_HALTED) {
 823                 LOG_ERROR("Target not halted");
 824                 return ERROR_TARGET_NOT_HALTED;
 825         }
 826
 827         if (kinfo->flash_class == FC_PFLASH) {
 828                 int result;
 829                 uint8_t buffer[4];
 830                 uint32_t fprot, psec;
 831                 int i, b;
 832
 833                 /* read protection register */
 834                 result = target_read_memory(bank->target, FTFx_FPROT3, 1, 4, buffer);
 835
 836                 if (result != ERROR_OK)
 837                         return result;
 838
 839                 fprot = target_buffer_get_u32(bank->target, buffer);
 840
 841                 /*
 842                  * Every bit protects 1/32 of the full flash (not necessarily
 843                  * just this bank), but we enforce the bank ordinals for
 844                  * PFlash to start at zero.
 845                  */
 846                 b = kinfo->bank_ordinal * (bank->size / kinfo->protection_size);
 847                 for (psec = 0, i = 0; i < bank->num_sectors; i++) {
 848                         if ((fprot >> b) & 1)
 849                                 bank->sectors[i].is_protected = 0;
 850                         else
 851                                 bank->sectors[i].is_protected = 1;
 852
 853                         psec += bank->sectors[i].size;
 854
 855                         if (psec >= kinfo->protection_size) {
 856                                 psec = 0;
 857                                 b++;
 858                         }
 859                 }
 860         } else {
 861                 LOG_ERROR("Protection checks for FlexNVM not yet supported");
 862                 return ERROR_FLASH_BANK_INVALID;
 863         }
 864
 865         return ERROR_OK;
 866 }
 867
 868 static int kinetis_ftfx_command(struct flash_bank *bank, uint8_t fcmd, uint32_t faddr,
 869                                 uint8_t fccob4, uint8_t fccob5, uint8_t fccob6, uint8_t fccob7,
 870                                 uint8_t fccob8, uint8_t fccob9, uint8_t fccoba, uint8_t fccobb,
 871                                 uint8_t *ftfx_fstat)
 872 {
 873         uint8_t command[12] = {faddr & 0xff, (faddr >> 8) & 0xff, (faddr >> 16) & 0xff, fcmd,
 874                         fccob7, fccob6, fccob5, fccob4,
 875                         fccobb, fccoba, fccob9, fccob8};
 876         int result, i;
 877         uint8_t buffer;
 878
 879         /* wait for done */
 880         for (i = 0; i < 50; i++) {
 881                 result =
 882                         target_read_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
 883
 884                 if (result != ERROR_OK)
 885                         return result;
 886
 887                 if (buffer & 0x80)
 888                         break;
 889
 890                 buffer = 0x00;
 891         }
 892
 893         if (buffer != 0x80) {
 894                 /* reset error flags */
 895                 buffer = 0x30;
 896                 result =
 897                         target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
 898                 if (result != ERROR_OK)
 899                         return result;
 900         }
 901
 902         result = target_write_memory(bank->target, FTFx_FCCOB3, 4, 3, command);
 903
 904         if (result != ERROR_OK)
 905                 return result;
 906
 907         /* start command */
 908         buffer = 0x80;
 909         result = target_write_memory(bank->target, FTFx_FSTAT, 1, 1, &buffer);
 910         if (result != ERROR_OK)
 911                 return result;
 912
 913         /* wait for done */
 914         for (i = 0; i < 240; i++) { /* Need longtime for "Mass Erase" Command Nemui Changed */
 915                 result =
 916                         target_read_memory(bank->target, FTFx_FSTAT, 1, 1, ftfx_fstat);
 917
 918                 if (result != ERROR_OK)
 919                         return result;
 920
 921                 if (*ftfx_fstat & 0x80)
 922                         break;
 923         }
 924
 925         if ((*ftfx_fstat & 0xf0) != 0x80) {
 926                 LOG_ERROR
 927                         ("ftfx command failed FSTAT: %02X FCCOB: %02X%02X%02X%02X %02X%02X%02X%02X %02X%02X%02X%02X",
 928                          *ftfx_fstat, command[3], command[2], command[1], command[0],
 929                          command[7], command[6], command[5], command[4],
 930                          command[11], command[10], command[9], command[8]);
 931                 return ERROR_FLASH_OPERATION_FAILED;
 932         }
 933
 934         return ERROR_OK;
 935 }
 936
 937 COMMAND_HANDLER(kinetis_securing_test)
 938 {
 939         int result;
 940         uint8_t ftfx_fstat;
 941         struct target *target = get_current_target(CMD_CTX);
 942         struct flash_bank *bank = NULL;
 943
 944         result = get_flash_bank_by_addr(target, 0x00000000, true, &bank);
 945         if (result != ERROR_OK)
 946                 return result;
 947
 948         assert(bank != NULL);
 949
 950         if (target->state != TARGET_HALTED) {
 951                 LOG_ERROR("Target not halted");
 952                 return ERROR_TARGET_NOT_HALTED;
 953         }
 954
 955         return kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + 0x00000400,
 956                                       0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
 957 }
 958
 959 static int kinetis_erase(struct flash_bank *bank, int first, int last)
 960 {
 961         int result, i;
 962
 963         if (bank->target->state != TARGET_HALTED) {
 964                 LOG_ERROR("Target not halted");
 965                 return ERROR_TARGET_NOT_HALTED;
 966         }
 967
 968         if ((first > bank->num_sectors) || (last > bank->num_sectors))
 969                 return ERROR_FLASH_OPERATION_FAILED;
 970
 971         /*
 972          * FIXME: TODO: use the 'Erase Flash Block' command if the
 973          * requested erase is PFlash or NVM and encompasses the entire
 974          * block.  Should be quicker.
 975          */
 976         for (i = first; i <= last; i++) {
 977                 uint8_t ftfx_fstat;
 978                 /* set command and sector address */
 979                 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTERASE, bank->base + bank->sectors[i].offset,
 980                                 0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
 981
 982                 if (result != ERROR_OK) {
 983                         LOG_WARNING("erase sector %d failed", i);
 984                         return ERROR_FLASH_OPERATION_FAILED;
 985                 }
 986
 987                 bank->sectors[i].is_erased = 1;
 988         }
 989
 990         if (first == 0) {
 991                 LOG_WARNING
 992                         ("flash configuration field erased, please reset the device");
 993         }
 994
 995         return ERROR_OK;
 996 }
 997
 998 static int kinetis_write(struct flash_bank *bank, const uint8_t *buffer,
 999                          uint32_t offset, uint32_t count)
1000 {
1001         unsigned int i, result, fallback = 0;
1002         uint8_t buf[8];
1003         uint32_t wc;
1004         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1005         uint8_t *new_buffer = NULL;
1006
1007         if (bank->target->state != TARGET_HALTED) {
1008                 LOG_ERROR("Target not halted");
1009                 return ERROR_TARGET_NOT_HALTED;
1010         }
1011
1012         if (!(kinfo->flash_support & FS_PROGRAM_SECTOR)) {
1013                 /* fallback to longword write */
1014                 fallback = 1;
1015                 LOG_WARNING("This device supports Program Longword execution only.");
1016                 LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
1017
1018         } else if (kinfo->flash_class == FC_FLEX_NVM) {
1019                 uint8_t ftfx_fstat;
1020
1021                 LOG_DEBUG("flash write into FlexNVM @%08" PRIX32, offset);
1022
1023                 /* make flex ram available */
1024                 result = kinetis_ftfx_command(bank, FTFx_CMD_SETFLEXRAM, 0x00ff0000, 0, 0, 0, 0,  0, 0, 0, 0,  &ftfx_fstat);
1025
1026                 if (result != ERROR_OK)
1027                         return ERROR_FLASH_OPERATION_FAILED;
1028
1029                 /* check if ram ready */
1030                 result = target_read_memory(bank->target, FTFx_FCNFG, 1, 1, buf);
1031
1032                 if (result != ERROR_OK)
1033                         return result;
1034
1035                 if (!(buf[0] & (1 << 1))) {
1036                         /* fallback to longword write */
1037                         fallback = 1;
1038
1039                         LOG_WARNING("ram not ready, fallback to slow longword write (FCNFG: %02X)", buf[0]);
1040                 }
1041         } else {
1042                 LOG_DEBUG("flash write into PFLASH @08%" PRIX32, offset);
1043         }
1044
1045
1046         /* program section command */
1047         if (fallback == 0) {
1048                 /*
1049                  * Kinetis uses different terms for the granularity of
1050                  * sector writes, e.g. "phrase" or "128 bits".  We use
1051                  * the generic term "chunk". The largest possible
1052                  * Kinetis "chunk" is 16 bytes (128 bits).
1053                  */
1054                 unsigned prog_section_chunk_bytes = kinfo->sector_size >> 8;
1055                 unsigned prog_size_bytes = kinfo->max_flash_prog_size;
1056                 for (i = 0; i < count; i += prog_size_bytes) {
1057                         uint8_t residual_buffer[16];
1058                         uint8_t ftfx_fstat;
1059                         uint32_t section_count = prog_size_bytes / prog_section_chunk_bytes;
1060                         uint32_t residual_wc = 0;
1061
1062                         /*
1063                          * Assume the word count covers an entire
1064                          * sector.
1065                          */
1066                         wc = prog_size_bytes / 4;
1067
1068                         /*
1069                          * If bytes to be programmed are less than the
1070                          * full sector, then determine the number of
1071                          * full-words to program, and put together the
1072                          * residual buffer so that a full "section"
1073                          * may always be programmed.
1074                          */
1075                         if ((count - i) < prog_size_bytes) {
1076                                 /* number of bytes to program beyond full section */
1077                                 unsigned residual_bc = (count-i) % prog_section_chunk_bytes;
1078
1079                                 /* number of complete words to copy directly from buffer */
1080                                 wc = (count - i - residual_bc) / 4;
1081
1082                                 /* number of total sections to write, including residual */
1083                                 section_count = DIV_ROUND_UP((count-i), prog_section_chunk_bytes);
1084
1085                                 /* any residual bytes delivers a whole residual section */
1086                                 residual_wc = (residual_bc ? prog_section_chunk_bytes : 0)/4;
1087
1088                                 /* clear residual buffer then populate residual bytes */
1089                                 (void) memset(residual_buffer, 0xff, prog_section_chunk_bytes);
1090                                 (void) memcpy(residual_buffer, &buffer[i+4*wc], residual_bc);
1091                         }
1092
1093                         LOG_DEBUG("write section @ %08" PRIX32 " with length %" PRIu32 " bytes",
1094                                   offset + i, (uint32_t)wc*4);
1095
1096                         /* write data to flexram as whole-words */
1097                         result = target_write_memory(bank->target, FLEXRAM, 4, wc,
1098                                         buffer + i);
1099
1100                         if (result != ERROR_OK) {
1101                                 LOG_ERROR("target_write_memory failed");
1102                                 return result;
1103                         }
1104
1105                         /* write the residual words to the flexram */
1106                         if (residual_wc) {
1107                                 result = target_write_memory(bank->target,
1108                                                 FLEXRAM+4*wc,
1109                                                 4, residual_wc,
1110                                                 residual_buffer);
1111
1112                                 if (result != ERROR_OK) {
1113                                         LOG_ERROR("target_write_memory failed");
1114                                         return result;
1115                                 }
1116                         }
1117
1118                         /* execute section-write command */
1119                         result = kinetis_ftfx_command(bank, FTFx_CMD_SECTWRITE, bank->base + offset + i,
1120                                         section_count>>8, section_count, 0, 0,
1121                                         0, 0, 0, 0,  &ftfx_fstat);
1122
1123                         if (result != ERROR_OK)
1124                                 return ERROR_FLASH_OPERATION_FAILED;
1125                 }
1126         }
1127         /* program longword command, not supported in "SF3" devices */
1128         else if (kinfo->flash_support & FS_PROGRAM_LONGWORD) {
1129                 if (count & 0x3) {
1130                         uint32_t old_count = count;
1131                         count = (old_count | 3) + 1;
1132                         new_buffer = malloc(count);
1133                         if (new_buffer == NULL) {
1134                                 LOG_ERROR("odd number of bytes to write and no memory "
1135                                         "for padding buffer");
1136                                 return ERROR_FAIL;
1137                         }
1138                         LOG_INFO("odd number of bytes to write (%" PRIu32 "), extending to %" PRIu32 " "
1139                                 "and padding with 0xff", old_count, count);
1140                         memset(new_buffer, 0xff, count);
1141                         buffer = memcpy(new_buffer, buffer, old_count);
1142                 }
1143
1144                 uint32_t words_remaining = count / 4;
1145
1146                 kinetis_disable_wdog(bank->target, kinfo->sim_sdid);
1147
1148                 /* try using a block write */
1149                 int retval = kinetis_write_block(bank, buffer, offset, words_remaining);
1150
1151                 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
1152                         /* if block write failed (no sufficient working area),
1153                          * we use normal (slow) single word accesses */
1154                         LOG_WARNING("couldn't use block writes, falling back to single "
1155                                 "memory accesses");
1156
1157                         for (i = 0; i < count; i += 4) {
1158                                 uint8_t ftfx_fstat;
1159
1160                                 LOG_DEBUG("write longword @ %08" PRIX32, (uint32_t)(offset + i));
1161
1162                                 uint8_t padding[4] = {0xff, 0xff, 0xff, 0xff};
1163                                 memcpy(padding, buffer + i, MIN(4, count-i));
1164
1165                                 result = kinetis_ftfx_command(bank, FTFx_CMD_LWORDPROG, bank->base + offset + i,
1166                                                 padding[3], padding[2], padding[1], padding[0],
1167                                                 0, 0, 0, 0,  &ftfx_fstat);
1168
1169                                 if (result != ERROR_OK)
1170                                         return ERROR_FLASH_OPERATION_FAILED;
1171                         }
1172                 }
1173         } else {
1174                 LOG_ERROR("Flash write strategy not implemented");
1175                 return ERROR_FLASH_OPERATION_FAILED;
1176         }
1177
1178         return ERROR_OK;
1179 }
1180
1181 static int kinetis_read_part_info(struct flash_bank *bank)
1182 {
1183         int result, i;
1184         uint32_t offset = 0;
1185         uint8_t fcfg1_nvmsize, fcfg1_pfsize, fcfg1_eesize, fcfg2_pflsh;
1186         uint32_t nvm_size = 0, pf_size = 0, ee_size = 0;
1187         unsigned num_blocks = 0, num_pflash_blocks = 0, num_nvm_blocks = 0, first_nvm_bank = 0,
1188                         reassign = 0, pflash_sector_size_bytes = 0, nvm_sector_size_bytes = 0;
1189         struct target *target = bank->target;
1190         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1191
1192         result = target_read_u32(target, SIM_SDID, &kinfo->sim_sdid);
1193         if (result != ERROR_OK)
1194                 return result;
1195
1196         if ((kinfo->sim_sdid & (~KINETIS_SDID_K_SERIES_MASK)) == 0) {
1197                 /* older K-series MCU */
1198                 uint32_t mcu_type = kinfo->sim_sdid & KINETIS_K_SDID_TYPE_MASK;
1199
1200                 switch (mcu_type) {
1201                 case KINETIS_K_SDID_K10_M50:
1202                 case KINETIS_K_SDID_K20_M50:
1203                         /* 1kB sectors */
1204                         pflash_sector_size_bytes = 1<<10;
1205                         nvm_sector_size_bytes = 1<<10;
1206                         num_blocks = 2;
1207                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1208                         break;
1209                 case KINETIS_K_SDID_K10_M72:
1210                 case KINETIS_K_SDID_K20_M72:
1211                 case KINETIS_K_SDID_K30_M72:
1212                 case KINETIS_K_SDID_K30_M100:
1213                 case KINETIS_K_SDID_K40_M72:
1214                 case KINETIS_K_SDID_K40_M100:
1215                 case KINETIS_K_SDID_K50_M72:
1216                         /* 2kB sectors, 1kB FlexNVM sectors */
1217                         pflash_sector_size_bytes = 2<<10;
1218                         nvm_sector_size_bytes = 1<<10;
1219                         num_blocks = 2;
1220                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1221                         kinfo->max_flash_prog_size = 1<<10;
1222                         break;
1223                 case KINETIS_K_SDID_K10_M100:
1224                 case KINETIS_K_SDID_K20_M100:
1225                 case KINETIS_K_SDID_K11:
1226                 case KINETIS_K_SDID_K12:
1227                 case KINETIS_K_SDID_K21_M50:
1228                 case KINETIS_K_SDID_K22_M50:
1229                 case KINETIS_K_SDID_K51_M72:
1230                 case KINETIS_K_SDID_K53:
1231                 case KINETIS_K_SDID_K60_M100:
1232                         /* 2kB sectors */
1233                         pflash_sector_size_bytes = 2<<10;
1234                         nvm_sector_size_bytes = 2<<10;
1235                         num_blocks = 2;
1236                         kinfo->flash_support = FS_PROGRAM_LONGWORD | FS_PROGRAM_SECTOR;
1237                         break;
1238                 case KINETIS_K_SDID_K21_M120:
1239                 case KINETIS_K_SDID_K22_M120:
1240                         /* 4kB sectors (MK21FN1M0, MK21FX512, MK22FN1M0, MK22FX512) */
1241                         pflash_sector_size_bytes = 4<<10;
1242                         kinfo->max_flash_prog_size = 1<<10;
1243                         nvm_sector_size_bytes = 4<<10;
1244                         num_blocks = 2;
1245                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1246                         break;
1247                 case KINETIS_K_SDID_K10_M120:
1248                 case KINETIS_K_SDID_K20_M120:
1249                 case KINETIS_K_SDID_K60_M150:
1250                 case KINETIS_K_SDID_K70_M150:
1251                         /* 4kB sectors */
1252                         pflash_sector_size_bytes = 4<<10;
1253                         nvm_sector_size_bytes = 4<<10;
1254                         num_blocks = 4;
1255                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1256                         break;
1257                 default:
1258                         LOG_ERROR("Unsupported K-family FAMID");
1259                 }
1260         } else {
1261                 /* Newer K-series or KL series MCU */
1262                 switch (kinfo->sim_sdid & KINETIS_SDID_SERIESID_MASK) {
1263                 case KINETIS_SDID_SERIESID_K:
1264                         switch (kinfo->sim_sdid & (KINETIS_SDID_FAMILYID_MASK | KINETIS_SDID_SUBFAMID_MASK)) {
1265                         case KINETIS_SDID_FAMILYID_K0X | KINETIS_SDID_SUBFAMID_KX2:
1266                                 /* K02FN64, K02FN128: FTFA, 2kB sectors */
1267                                 pflash_sector_size_bytes = 2<<10;
1268                                 num_blocks = 1;
1269                                 kinfo->flash_support = FS_PROGRAM_LONGWORD;
1270                                 break;
1271
1272                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX2: {
1273                                 /* MK24FN1M reports as K22, this should detect it (according to errata note 1N83J) */
1274                                 uint32_t sopt1;
1275                                 result = target_read_u32(target, SIM_SOPT1, &sopt1);
1276                                 if (result != ERROR_OK)
1277                                         return result;
1278
1279                                 if (((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN1M) &&
1280                                                 ((sopt1 & KINETIS_SOPT1_RAMSIZE_MASK) == KINETIS_SOPT1_RAMSIZE_K24FN1M)) {
1281                                         /* MK24FN1M */
1282                                         pflash_sector_size_bytes = 4<<10;
1283                                         num_blocks = 2;
1284                                         kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1285                                         kinfo->max_flash_prog_size = 1<<10;
1286                                         break;
1287                                 }
1288                                 if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN128
1289                                         || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN256
1290                                         || (kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K22FN512) {
1291                                         /* K22 with new-style SDID - smaller pflash with FTFA, 2kB sectors */
1292                                         pflash_sector_size_bytes = 2<<10;
1293                                         num_blocks = 2;         /* 1 or 2 blocks */
1294                                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1295                                         break;
1296                                 }
1297                                 LOG_ERROR("Unsupported Kinetis K22 DIEID");
1298                                 break;
1299                         }
1300                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX4:
1301                                 pflash_sector_size_bytes = 4<<10;
1302                                 if ((kinfo->sim_sdid & (KINETIS_SDID_DIEID_MASK)) == KINETIS_SDID_DIEID_K24FN256) {
1303                                         /* K24FN256 - smaller pflash with FTFA */
1304                                         num_blocks = 1;
1305                                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1306                                         break;
1307                                 }
1308                                 /* K24FN1M without errata 7534 */
1309                                 num_blocks = 2;
1310                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1311                                 kinfo->max_flash_prog_size = 1<<10;
1312                                 break;
1313
1314                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX3:
1315                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX1:     /* errata 7534 - should be K63 */
1316                                 /* K63FN1M0 */
1317                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX4:
1318                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX2:     /* errata 7534 - should be K64 */
1319                                 /* K64FN1M0, K64FX512 */
1320                                 pflash_sector_size_bytes = 4<<10;
1321                                 nvm_sector_size_bytes = 4<<10;
1322                                 kinfo->max_flash_prog_size = 1<<10;
1323                                 num_blocks = 2;
1324                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1325                                 break;
1326
1327                         case KINETIS_SDID_FAMILYID_K2X | KINETIS_SDID_SUBFAMID_KX6:
1328                                 /* K26FN2M0 */
1329                         case KINETIS_SDID_FAMILYID_K6X | KINETIS_SDID_SUBFAMID_KX6:
1330                                 /* K66FN2M0, K66FX1M0 */
1331                                 pflash_sector_size_bytes = 4<<10;
1332                                 nvm_sector_size_bytes = 4<<10;
1333                                 kinfo->max_flash_prog_size = 1<<10;
1334                                 num_blocks = 4;
1335                                 kinfo->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
1336                                 break;
1337                         default:
1338                                 LOG_ERROR("Unsupported Kinetis FAMILYID SUBFAMID");
1339                         }
1340                         break;
1341                 case KINETIS_SDID_SERIESID_KL:
1342                         /* KL-series */
1343                         pflash_sector_size_bytes = 1<<10;
1344                         nvm_sector_size_bytes = 1<<10;
1345                         num_blocks = 1;
1346                         kinfo->flash_support = FS_PROGRAM_LONGWORD;
1347                         break;
1348                 default:
1349                         LOG_ERROR("Unsupported K-series");
1350                 }
1351         }
1352
1353         if (pflash_sector_size_bytes == 0) {
1354                 LOG_ERROR("MCU is unsupported, SDID 0x%08" PRIx32, kinfo->sim_sdid);
1355                 return ERROR_FLASH_OPER_UNSUPPORTED;
1356         }
1357
1358         result = target_read_u32(target, SIM_FCFG1, &kinfo->sim_fcfg1);
1359         if (result != ERROR_OK)
1360                 return result;
1361
1362         result = target_read_u32(target, SIM_FCFG2, &kinfo->sim_fcfg2);
1363         if (result != ERROR_OK)
1364                 return result;
1365         fcfg2_pflsh = (kinfo->sim_fcfg2 >> 23) & 0x01;
1366
1367         LOG_DEBUG("SDID: 0x%08" PRIX32 " FCFG1: 0x%08" PRIX32 " FCFG2: 0x%08" PRIX32, kinfo->sim_sdid,
1368                         kinfo->sim_fcfg1, kinfo->sim_fcfg2);
1369
1370         fcfg1_nvmsize = (uint8_t)((kinfo->sim_fcfg1 >> 28) & 0x0f);
1371         fcfg1_pfsize = (uint8_t)((kinfo->sim_fcfg1 >> 24) & 0x0f);
1372         fcfg1_eesize = (uint8_t)((kinfo->sim_fcfg1 >> 16) & 0x0f);
1373
1374         /* when the PFLSH bit is set, there is no FlexNVM/FlexRAM */
1375         if (!fcfg2_pflsh) {
1376                 switch (fcfg1_nvmsize) {
1377                 case 0x03:
1378                 case 0x07:
1379                 case 0x09:
1380                 case 0x0b:
1381                         nvm_size = 1 << (14 + (fcfg1_nvmsize >> 1));
1382                         break;
1383                 case 0x0f:
1384                         if (pflash_sector_size_bytes >= 4<<10)
1385                                 nvm_size = 512<<10;
1386                         else
1387                                 /* K20_100 */
1388                                 nvm_size = 256<<10;
1389                         break;
1390                 default:
1391                         nvm_size = 0;
1392                         break;
1393                 }
1394
1395                 switch (fcfg1_eesize) {
1396                 case 0x00:
1397                 case 0x01:
1398                 case 0x02:
1399                 case 0x03:
1400                 case 0x04:
1401                 case 0x05:
1402                 case 0x06:
1403                 case 0x07:
1404                 case 0x08:
1405                 case 0x09:
1406                         ee_size = (16 << (10 - fcfg1_eesize));
1407                         break;
1408                 default:
1409                         ee_size = 0;
1410                         break;
1411                 }
1412         }
1413
1414         switch (fcfg1_pfsize) {
1415         case 0x03:
1416         case 0x05:
1417         case 0x07:
1418         case 0x09:
1419         case 0x0b:
1420         case 0x0d:
1421                 pf_size = 1 << (14 + (fcfg1_pfsize >> 1));
1422                 break;
1423         case 0x0f:
1424                 if (pflash_sector_size_bytes >= 4<<10)
1425                         pf_size = 1024<<10;
1426                 else if (fcfg2_pflsh)
1427                         pf_size = 512<<10;
1428                 else
1429                         pf_size = 256<<10;
1430                 break;
1431         default:
1432                 pf_size = 0;
1433                 break;
1434         }
1435
1436         LOG_DEBUG("FlexNVM: %" PRIu32 " PFlash: %" PRIu32 " FlexRAM: %" PRIu32 " PFLSH: %d",
1437                   nvm_size, pf_size, ee_size, fcfg2_pflsh);
1438
1439         num_pflash_blocks = num_blocks / (2 - fcfg2_pflsh);
1440         first_nvm_bank = num_pflash_blocks;
1441         num_nvm_blocks = num_blocks - num_pflash_blocks;
1442
1443         LOG_DEBUG("%d blocks total: %d PFlash, %d FlexNVM",
1444                         num_blocks, num_pflash_blocks, num_nvm_blocks);
1445
1446         /*
1447          * If the flash class is already assigned, verify the
1448          * parameters.
1449          */
1450         if (kinfo->flash_class != FC_AUTO) {
1451                 if (kinfo->bank_ordinal != (unsigned) bank->bank_number) {
1452                         LOG_WARNING("Flash ordinal/bank number mismatch");
1453                         reassign = 1;
1454                 } else {
1455                         switch (kinfo->flash_class) {
1456                         case FC_PFLASH:
1457                                 if (kinfo->bank_ordinal >= first_nvm_bank) {
1458                                         LOG_WARNING("Class mismatch, bank %d is not PFlash", bank->bank_number);
1459                                         reassign = 1;
1460                                 } else if (bank->size != (pf_size / num_pflash_blocks)) {
1461                                         LOG_WARNING("PFlash size mismatch");
1462                                         reassign = 1;
1463                                 } else if (bank->base !=
1464                                          (0x00000000 + bank->size * kinfo->bank_ordinal)) {
1465                                         LOG_WARNING("PFlash address range mismatch");
1466                                         reassign = 1;
1467                                 } else if (kinfo->sector_size != pflash_sector_size_bytes) {
1468                                         LOG_WARNING("PFlash sector size mismatch");
1469                                         reassign = 1;
1470                                 } else {
1471                                         LOG_DEBUG("PFlash bank %d already configured okay",
1472                                                   kinfo->bank_ordinal);
1473                                 }
1474                                 break;
1475                         case FC_FLEX_NVM:
1476                                 if ((kinfo->bank_ordinal >= num_blocks) ||
1477                                                 (kinfo->bank_ordinal < first_nvm_bank)) {
1478                                         LOG_WARNING("Class mismatch, bank %d is not FlexNVM", bank->bank_number);
1479                                         reassign = 1;
1480                                 } else if (bank->size != (nvm_size / num_nvm_blocks)) {
1481                                         LOG_WARNING("FlexNVM size mismatch");
1482                                         reassign = 1;
1483                                 } else if (bank->base !=
1484                                                 (0x10000000 + bank->size * kinfo->bank_ordinal)) {
1485                                         LOG_WARNING("FlexNVM address range mismatch");
1486                                         reassign = 1;
1487                                 } else if (kinfo->sector_size != nvm_sector_size_bytes) {
1488                                         LOG_WARNING("FlexNVM sector size mismatch");
1489                                         reassign = 1;
1490                                 } else {
1491                                         LOG_DEBUG("FlexNVM bank %d already configured okay",
1492                                                   kinfo->bank_ordinal);
1493                                 }
1494                                 break;
1495                         case FC_FLEX_RAM:
1496                                 if (kinfo->bank_ordinal != num_blocks) {
1497                                         LOG_WARNING("Class mismatch, bank %d is not FlexRAM", bank->bank_number);
1498                                         reassign = 1;
1499                                 } else if (bank->size != ee_size) {
1500                                         LOG_WARNING("FlexRAM size mismatch");
1501                                         reassign = 1;
1502                                 } else if (bank->base != FLEXRAM) {
1503                                         LOG_WARNING("FlexRAM address mismatch");
1504                                         reassign = 1;
1505                                 } else if (kinfo->sector_size != nvm_sector_size_bytes) {
1506                                         LOG_WARNING("FlexRAM sector size mismatch");
1507                                         reassign = 1;
1508                                 } else {
1509                                         LOG_DEBUG("FlexRAM bank %d already configured okay", kinfo->bank_ordinal);
1510                                 }
1511                                 break;
1512
1513                         default:
1514                                 LOG_WARNING("Unknown or inconsistent flash class");
1515                                 reassign = 1;
1516                                 break;
1517                         }
1518                 }
1519         } else {
1520                 LOG_INFO("Probing flash info for bank %d", bank->bank_number);
1521                 reassign = 1;
1522         }
1523
1524         if (!reassign)
1525                 return ERROR_OK;
1526
1527         if ((unsigned)bank->bank_number < num_pflash_blocks) {
1528                 /* pflash, banks start at address zero */
1529                 kinfo->flash_class = FC_PFLASH;
1530                 bank->size = (pf_size / num_pflash_blocks);
1531                 bank->base = 0x00000000 + bank->size * bank->bank_number;
1532                 kinfo->sector_size = pflash_sector_size_bytes;
1533                 kinfo->protection_size = pf_size / 32;
1534         } else if ((unsigned)bank->bank_number < num_blocks) {
1535                 /* nvm, banks start at address 0x10000000 */
1536                 kinfo->flash_class = FC_FLEX_NVM;
1537                 bank->size = (nvm_size / num_nvm_blocks);
1538                 bank->base = 0x10000000 + bank->size * (bank->bank_number - first_nvm_bank);
1539                 kinfo->sector_size = nvm_sector_size_bytes;
1540                 kinfo->protection_size = 0; /* FIXME: TODO: depends on DEPART bits, chip */
1541         } else if ((unsigned)bank->bank_number == num_blocks) {
1542                 LOG_ERROR("FlexRAM support not yet implemented");
1543                 return ERROR_FLASH_OPER_UNSUPPORTED;
1544         } else {
1545                 LOG_ERROR("Cannot determine parameters for bank %d, only %d banks on device",
1546                                 bank->bank_number, num_blocks);
1547                 return ERROR_FLASH_BANK_INVALID;
1548         }
1549
1550         if (bank->sectors) {
1551                 free(bank->sectors);
1552                 bank->sectors = NULL;
1553         }
1554
1555         if (kinfo->sector_size == 0) {
1556                 LOG_ERROR("Unknown sector size for bank %d", bank->bank_number);
1557                 return ERROR_FLASH_BANK_INVALID;
1558         }
1559
1560         if (kinfo->flash_support & FS_PROGRAM_SECTOR
1561                          && kinfo->max_flash_prog_size == 0) {
1562                 kinfo->max_flash_prog_size = kinfo->sector_size;
1563                 /* Program section size is equal to sector size by default */
1564         }
1565
1566         bank->num_sectors = bank->size / kinfo->sector_size;
1567         assert(bank->num_sectors > 0);
1568         bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
1569
1570         for (i = 0; i < bank->num_sectors; i++) {
1571                 bank->sectors[i].offset = offset;
1572                 bank->sectors[i].size = kinfo->sector_size;
1573                 offset += kinfo->sector_size;
1574                 bank->sectors[i].is_erased = -1;
1575                 bank->sectors[i].is_protected = 1;
1576         }
1577
1578         return ERROR_OK;
1579 }
1580
1581 static int kinetis_probe(struct flash_bank *bank)
1582 {
1583         if (bank->target->state != TARGET_HALTED) {
1584                 LOG_WARNING("Cannot communicate... target not halted.");
1585                 return ERROR_TARGET_NOT_HALTED;
1586         }
1587
1588         return kinetis_read_part_info(bank);
1589 }
1590
1591 static int kinetis_auto_probe(struct flash_bank *bank)
1592 {
1593         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1594
1595         if (kinfo->sim_sdid)
1596                 return ERROR_OK;
1597
1598         return kinetis_probe(bank);
1599 }
1600
1601 static int kinetis_info(struct flash_bank *bank, char *buf, int buf_size)
1602 {
1603         const char *bank_class_names[] = {
1604                 "(ANY)", "PFlash", "FlexNVM", "FlexRAM"
1605         };
1606
1607         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1608
1609         (void) snprintf(buf, buf_size,
1610                         "%s driver for %s flash bank %s at 0x%8.8" PRIx32 "",
1611                         bank->driver->name, bank_class_names[kinfo->flash_class],
1612                         bank->name, bank->base);
1613
1614         return ERROR_OK;
1615 }
1616
1617 static int kinetis_blank_check(struct flash_bank *bank)
1618 {
1619         struct kinetis_flash_bank *kinfo = bank->driver_priv;
1620
1621         if (bank->target->state != TARGET_HALTED) {
1622                 LOG_ERROR("Target not halted");
1623                 return ERROR_TARGET_NOT_HALTED;
1624         }
1625
1626         if (kinfo->flash_class == FC_PFLASH) {
1627                 int result;
1628                 uint8_t ftfx_fstat;
1629
1630                 /* check if whole bank is blank */
1631                 result = kinetis_ftfx_command(bank, FTFx_CMD_BLOCKSTAT, bank->base, 0, 0, 0, 0,  0, 0, 0, 0, &ftfx_fstat);
1632
1633                 if (result != ERROR_OK)
1634                         return result;
1635
1636                 if (ftfx_fstat & 0x01) {
1637                         /* the whole bank is not erased, check sector-by-sector */
1638                         int i;
1639                         for (i = 0; i < bank->num_sectors; i++) {
1640                                 /* normal margin */
1641                                 result = kinetis_ftfx_command(bank, FTFx_CMD_SECTSTAT, bank->base + bank->sectors[i].offset,
1642                                                 1, 0, 0, 0,  0, 0, 0, 0, &ftfx_fstat);
1643
1644                                 if (result == ERROR_OK) {
1645                                         bank->sectors[i].is_erased = !(ftfx_fstat & 0x01);
1646                                 } else {
1647                                         LOG_DEBUG("Ignoring errored PFlash sector blank-check");
1648                                         bank->sectors[i].is_erased = -1;
1649                                 }
1650                         }
1651                 } else {
1652                         /* the whole bank is erased, update all sectors */
1653                         int i;
1654                         for (i = 0; i < bank->num_sectors; i++)
1655                                 bank->sectors[i].is_erased = 1;
1656                 }
1657         } else {
1658                 LOG_WARNING("kinetis_blank_check not supported yet for FlexNVM");
1659                 return ERROR_FLASH_OPERATION_FAILED;
1660         }
1661
1662         return ERROR_OK;
1663 }
1664
1665 static const struct command_registration kinetis_securtiy_command_handlers[] = {
1666         {
1667                 .name = "check_security",
1668                 .mode = COMMAND_EXEC,
1669                 .help = "",
1670                 .usage = "",
1671                 .handler = kinetis_check_flash_security_status,
1672         },
1673         {
1674                 .name = "mass_erase",
1675                 .mode = COMMAND_EXEC,
1676                 .help = "",
1677                 .usage = "",
1678                 .handler = kinetis_mdm_mass_erase,
1679         },
1680         {
1681                 .name = "test_securing",
1682                 .mode = COMMAND_EXEC,
1683                 .help = "",
1684                 .usage = "",
1685                 .handler = kinetis_securing_test,
1686         },
1687         COMMAND_REGISTRATION_DONE
1688 };
1689
1690 static const struct command_registration kinetis_exec_command_handlers[] = {
1691         {
1692                 .name = "mdm",
1693                 .mode = COMMAND_ANY,
1694                 .help = "",
1695                 .usage = "",
1696                 .chain = kinetis_securtiy_command_handlers,
1697         },
1698         {
1699                 .name = "disable_wdog",
1700                 .mode = COMMAND_EXEC,
1701                 .help = "Disable the watchdog timer",
1702                 .usage = "",
1703                 .handler = kinetis_disable_wdog_handler,
1704         },
1705         COMMAND_REGISTRATION_DONE
1706 };
1707
1708 static const struct command_registration kinetis_command_handler[] = {
1709         {
1710                 .name = "kinetis",
1711                 .mode = COMMAND_ANY,
1712                 .help = "kinetis NAND flash controller commands",
1713                 .usage = "",
1714                 .chain = kinetis_exec_command_handlers,
1715         },
1716         COMMAND_REGISTRATION_DONE
1717 };
1718
1719
1720
1721 struct flash_driver kinetis_flash = {
1722         .name = "kinetis",
1723         .commands = kinetis_command_handler,
1724         .flash_bank_command = kinetis_flash_bank_command,
1725         .erase = kinetis_erase,
1726         .protect = kinetis_protect,
1727         .write = kinetis_write,
1728         .read = default_flash_read,
1729         .probe = kinetis_probe,
1730         .auto_probe = kinetis_auto_probe,
1731         .erase_check = kinetis_blank_check,
1732         .protect_check = kinetis_protect_check,
1733         .info = kinetis_info,
1734 };