git.gag.com Git - fw/openocd/blob - src/flash/nor/avrf.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2009 by Simon Qian                                      *
   5  *   SimonQian@SimonQian.com                                               *
   6  ***************************************************************************/
   7
   8 #ifdef HAVE_CONFIG_H
   9 #include "config.h"
  10 #endif
  11
  12 #include "imp.h"
  13 #include <target/avrt.h>
  14
  15 /* AVR_JTAG_Instructions */
  16 #define AVR_JTAG_INS_LEN                                        4
  17 /* Public Instructions: */
  18 #define AVR_JTAG_INS_EXTEST                                     0x00
  19 #define AVR_JTAG_INS_IDCODE                                     0x01
  20 #define AVR_JTAG_INS_SAMPLE_PRELOAD                             0x02
  21 #define AVR_JTAG_INS_BYPASS                                     0x0F
  22 /* AVR Specified Public Instructions: */
  23 #define AVR_JTAG_INS_AVR_RESET                                  0x0C
  24 #define AVR_JTAG_INS_PROG_ENABLE                                0x04
  25 #define AVR_JTAG_INS_PROG_COMMANDS                              0x05
  26 #define AVR_JTAG_INS_PROG_PAGELOAD                              0x06
  27 #define AVR_JTAG_INS_PROG_PAGEREAD                              0x07
  28
  29 /* Data Registers: */
  30 #define AVR_JTAG_REG_BYPASS_LEN                                 1
  31 #define AVR_JTAG_REG_DEVICEID_LEN                               32
  32
  33 #define AVR_JTAG_REG_RESET_LEN                                  1
  34 #define AVR_JTAG_REG_JTAGID_LEN                                 32
  35 #define AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN                     16
  36 #define AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN                    15
  37 #define AVR_JTAG_REG_FLASH_DATA_BYTE_LEN                        16
  38
  39 struct avrf_type {
  40         char name[15];
  41         uint16_t chip_id;
  42         int flash_page_size;
  43         int flash_page_num;
  44         int eeprom_page_size;
  45         int eeprom_page_num;
  46 };
  47
  48 struct avrf_flash_bank {
  49         int ppage_size;
  50         bool probed;
  51 };
  52
  53 static const struct avrf_type avft_chips_info[] = {
  54 /*      name, chip_id,  flash_page_size, flash_page_num,
  55  *                      eeprom_page_size, eeprom_page_num
  56  */
  57         {"atmega128", 0x9702, 256, 512, 8, 512},
  58         {"atmega128rfa1", 0xa701, 128, 512, 8, 512},
  59         {"atmega256rfr2", 0xa802, 256, 1024, 8, 1024},
  60         {"at90can128", 0x9781, 256, 512, 8, 512},
  61         {"at90usb128", 0x9782, 256, 512, 8, 512},
  62         {"atmega164p", 0x940a, 128, 128, 4, 128},
  63         {"atmega324p", 0x9508, 128, 256, 4, 256},
  64         {"atmega324pa", 0x9511, 128, 256, 4, 256},
  65         {"atmega644p", 0x960a, 256, 256, 8, 256},
  66         {"atmega1284p", 0x9705, 256, 512, 8, 512},
  67 };
  68
  69 /* avr program functions */
  70 static int avr_jtag_reset(struct avr_common *avr, uint32_t reset)
  71 {
  72         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_AVR_RESET);
  73         avr_jtag_senddat(avr->jtag_info.tap, NULL, reset, AVR_JTAG_REG_RESET_LEN);
  74
  75         return ERROR_OK;
  76 }
  77
  78 static int avr_jtag_read_jtagid(struct avr_common *avr, uint32_t *id)
  79 {
  80         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_IDCODE);
  81         avr_jtag_senddat(avr->jtag_info.tap, id, 0, AVR_JTAG_REG_JTAGID_LEN);
  82
  83         return ERROR_OK;
  84 }
  85
  86 static int avr_jtagprg_enterprogmode(struct avr_common *avr)
  87 {
  88         avr_jtag_reset(avr, 1);
  89
  90         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
  91         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xA370, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
  92
  93         return ERROR_OK;
  94 }
  95
  96 static int avr_jtagprg_leaveprogmode(struct avr_common *avr)
  97 {
  98         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
  99         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 100         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3300, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 101
 102         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_ENABLE);
 103         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0, AVR_JTAG_REG_PROGRAMMING_ENABLE_LEN);
 104
 105         avr_jtag_reset(avr, 0);
 106
 107         return ERROR_OK;
 108 }
 109
 110 static int avr_jtagprg_chiperase(struct avr_common *avr)
 111 {
 112         uint32_t poll_value;
 113
 114         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 115         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 116         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3180, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 117         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 118         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3380, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 119
 120         do {
 121                 poll_value = 0;
 122                 avr_jtag_senddat(avr->jtag_info.tap,
 123                         &poll_value,
 124                         0x3380,
 125                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 126                 if (mcu_execute_queue() != ERROR_OK)
 127                         return ERROR_FAIL;
 128                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 129         } while (!(poll_value & 0x0200));
 130
 131         return ERROR_OK;
 132 }
 133
 134 static int avr_jtagprg_writeflashpage(struct avr_common *avr,
 135         const bool ext_addressing,
 136         const uint8_t *page_buf,
 137         uint32_t buf_size,
 138         uint32_t addr,
 139         uint32_t page_size)
 140 {
 141         uint32_t poll_value;
 142
 143         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 144         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x2310, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 145
 146         /* load extended high byte */
 147         if (ext_addressing)
 148                 avr_jtag_senddat(avr->jtag_info.tap,
 149                         NULL,
 150                         0x0b00 | ((addr >> 17) & 0xFF),
 151                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 152
 153         /* load addr high byte */
 154         avr_jtag_senddat(avr->jtag_info.tap,
 155                 NULL,
 156                 0x0700 | ((addr >> 9) & 0xFF),
 157                 AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 158
 159         /* load addr low byte */
 160         avr_jtag_senddat(avr->jtag_info.tap,
 161                 NULL,
 162                 0x0300 | ((addr >> 1) & 0xFF),
 163                 AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 164
 165         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_PAGELOAD);
 166
 167         for (uint32_t i = 0; i < page_size; i++) {
 168                 if (i < buf_size)
 169                         avr_jtag_senddat(avr->jtag_info.tap, NULL, page_buf[i], 8);
 170                 else
 171                         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0xFF, 8);
 172         }
 173
 174         avr_jtag_sendinstr(avr->jtag_info.tap, NULL, AVR_JTAG_INS_PROG_COMMANDS);
 175
 176         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 177         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3500, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 178         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 179         avr_jtag_senddat(avr->jtag_info.tap, NULL, 0x3700, AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 180
 181         do {
 182                 poll_value = 0;
 183                 avr_jtag_senddat(avr->jtag_info.tap,
 184                         &poll_value,
 185                         0x3700,
 186                         AVR_JTAG_REG_PROGRAMMING_COMMAND_LEN);
 187                 if (mcu_execute_queue() != ERROR_OK)
 188                         return ERROR_FAIL;
 189                 LOG_DEBUG("poll_value = 0x%04" PRIx32 "", poll_value);
 190         } while (!(poll_value & 0x0200));
 191
 192         return ERROR_OK;
 193 }
 194
 195 FLASH_BANK_COMMAND_HANDLER(avrf_flash_bank_command)
 196 {
 197         struct avrf_flash_bank *avrf_info;
 198
 199         if (CMD_ARGC < 6)
 200                 return ERROR_COMMAND_SYNTAX_ERROR;
 201
 202         avrf_info = malloc(sizeof(struct avrf_flash_bank));
 203         bank->driver_priv = avrf_info;
 204
 205         avrf_info->probed = false;
 206
 207         return ERROR_OK;
 208 }
 209
 210 static int avrf_erase(struct flash_bank *bank, unsigned int first,
 211                 unsigned int last)
 212 {
 213         struct target *target = bank->target;
 214         struct avr_common *avr = target->arch_info;
 215         int status;
 216
 217         LOG_DEBUG("%s", __func__);
 218
 219         if (target->state != TARGET_HALTED) {
 220                 LOG_ERROR("Target not halted");
 221                 return ERROR_TARGET_NOT_HALTED;
 222         }
 223
 224         status = avr_jtagprg_enterprogmode(avr);
 225         if (status != ERROR_OK)
 226                 return status;
 227
 228         status = avr_jtagprg_chiperase(avr);
 229         if (status != ERROR_OK)
 230                 return status;
 231
 232         return avr_jtagprg_leaveprogmode(avr);
 233 }
 234
 235 static int avrf_write(struct flash_bank *bank, const uint8_t *buffer, uint32_t offset, uint32_t count)
 236 {
 237         struct target *target = bank->target;
 238         struct avr_common *avr = target->arch_info;
 239         uint32_t cur_size, cur_buffer_size, page_size;
 240         bool ext_addressing;
 241
 242         if (bank->target->state != TARGET_HALTED) {
 243                 LOG_ERROR("Target not halted");
 244                 return ERROR_TARGET_NOT_HALTED;
 245         }
 246
 247         page_size = bank->sectors[0].size;
 248         if ((offset % page_size) != 0) {
 249                 LOG_WARNING("offset 0x%" PRIx32 " breaks required %" PRIu32 "-byte alignment",
 250                         offset,
 251                         page_size);
 252                 return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
 253         }
 254
 255         LOG_DEBUG("offset is 0x%08" PRIx32 "", offset);
 256         LOG_DEBUG("count is %" PRIu32 "", count);
 257
 258         if (avr_jtagprg_enterprogmode(avr) != ERROR_OK)
 259                 return ERROR_FAIL;
 260
 261         if (bank->size > 0x20000)
 262                 ext_addressing = true;
 263         else
 264                 ext_addressing = false;
 265
 266         cur_size = 0;
 267         while (count > 0) {
 268                 if (count > page_size)
 269                         cur_buffer_size = page_size;
 270                 else
 271                         cur_buffer_size = count;
 272                 avr_jtagprg_writeflashpage(avr,
 273                         ext_addressing,
 274                         buffer + cur_size,
 275                         cur_buffer_size,
 276                         offset + cur_size,
 277                         page_size);
 278                 count -= cur_buffer_size;
 279                 cur_size += cur_buffer_size;
 280
 281                 keep_alive();
 282         }
 283
 284         return avr_jtagprg_leaveprogmode(avr);
 285 }
 286
 287 #define EXTRACT_MFG(X)  (((X) & 0xffe) >> 1)
 288 #define EXTRACT_PART(X) (((X) & 0xffff000) >> 12)
 289 #define EXTRACT_VER(X)  (((X) & 0xf0000000) >> 28)
 290
 291 static int avrf_probe(struct flash_bank *bank)
 292 {
 293         struct target *target = bank->target;
 294         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 295         struct avr_common *avr = target->arch_info;
 296         const struct avrf_type *avr_info = NULL;
 297         uint32_t device_id;
 298
 299         if (bank->target->state != TARGET_HALTED) {
 300                 LOG_ERROR("Target not halted");
 301                 return ERROR_TARGET_NOT_HALTED;
 302         }
 303
 304         avrf_info->probed = false;
 305
 306         avr_jtag_read_jtagid(avr, &device_id);
 307         if (mcu_execute_queue() != ERROR_OK)
 308                 return ERROR_FAIL;
 309
 310         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 311         if (EXTRACT_MFG(device_id) != 0x1F)
 312                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 313                         EXTRACT_MFG(device_id),
 314                         0x1F);
 315
 316         for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
 317                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 318                         avr_info = &avft_chips_info[i];
 319                         LOG_INFO("target device is %s", avr_info->name);
 320                         break;
 321                 }
 322         }
 323
 324         if (avr_info) {
 325                 free(bank->sectors);
 326
 327                 /* chip found */
 328                 bank->base = 0x00000000;
 329                 bank->size = (avr_info->flash_page_size * avr_info->flash_page_num);
 330                 bank->num_sectors = avr_info->flash_page_num;
 331                 bank->sectors = malloc(sizeof(struct flash_sector) * avr_info->flash_page_num);
 332
 333                 for (int i = 0; i < avr_info->flash_page_num; i++) {
 334                         bank->sectors[i].offset = i * avr_info->flash_page_size;
 335                         bank->sectors[i].size = avr_info->flash_page_size;
 336                         bank->sectors[i].is_erased = -1;
 337                         bank->sectors[i].is_protected = -1;
 338                 }
 339
 340                 avrf_info->probed = true;
 341                 return ERROR_OK;
 342         } else {
 343                 /* chip not supported */
 344                 LOG_ERROR("0x%" PRIx32 " is not support for avr", EXTRACT_PART(device_id));
 345
 346                 avrf_info->probed = true;
 347                 return ERROR_FAIL;
 348         }
 349 }
 350
 351 static int avrf_auto_probe(struct flash_bank *bank)
 352 {
 353         struct avrf_flash_bank *avrf_info = bank->driver_priv;
 354         if (avrf_info->probed)
 355                 return ERROR_OK;
 356         return avrf_probe(bank);
 357 }
 358
 359 static int avrf_info(struct flash_bank *bank, struct command_invocation *cmd)
 360 {
 361         struct target *target = bank->target;
 362         struct avr_common *avr = target->arch_info;
 363         const struct avrf_type *avr_info = NULL;
 364         uint32_t device_id;
 365
 366         if (bank->target->state != TARGET_HALTED) {
 367                 LOG_ERROR("Target not halted");
 368                 return ERROR_TARGET_NOT_HALTED;
 369         }
 370
 371         avr_jtag_read_jtagid(avr, &device_id);
 372         if (mcu_execute_queue() != ERROR_OK)
 373                 return ERROR_FAIL;
 374
 375         LOG_INFO("device id = 0x%08" PRIx32 "", device_id);
 376         if (EXTRACT_MFG(device_id) != 0x1F)
 377                 LOG_ERROR("0x%" PRIx32 " is invalid Manufacturer for avr, 0x%X is expected",
 378                         EXTRACT_MFG(device_id),
 379                         0x1F);
 380
 381         for (size_t i = 0; i < ARRAY_SIZE(avft_chips_info); i++) {
 382                 if (avft_chips_info[i].chip_id == EXTRACT_PART(device_id)) {
 383                         avr_info = &avft_chips_info[i];
 384                         LOG_INFO("target device is %s", avr_info->name);
 385
 386                         break;
 387                 }
 388         }
 389
 390         if (avr_info) {
 391                 /* chip found */
 392                 command_print_sameline(cmd, "%s - Rev: 0x%" PRIx32 "", avr_info->name,
 393                         EXTRACT_VER(device_id));
 394                 return ERROR_OK;
 395         } else {
 396                 /* chip not supported */
 397                 command_print_sameline(cmd, "Cannot identify target as a avr\n");
 398                 return ERROR_FLASH_OPERATION_FAILED;
 399         }
 400 }
 401
 402 static int avrf_mass_erase(struct flash_bank *bank)
 403 {
 404         struct target *target = bank->target;
 405         struct avr_common *avr = target->arch_info;
 406
 407         if (target->state != TARGET_HALTED) {
 408                 LOG_ERROR("Target not halted");
 409                 return ERROR_TARGET_NOT_HALTED;
 410         }
 411
 412         if ((avr_jtagprg_enterprogmode(avr) != ERROR_OK)
 413             || (avr_jtagprg_chiperase(avr) != ERROR_OK)
 414             || (avr_jtagprg_leaveprogmode(avr) != ERROR_OK))
 415                 return ERROR_FAIL;
 416
 417         return ERROR_OK;
 418 }
 419
 420 COMMAND_HANDLER(avrf_handle_mass_erase_command)
 421 {
 422         if (CMD_ARGC < 1)
 423                 return ERROR_COMMAND_SYNTAX_ERROR;
 424
 425         struct flash_bank *bank;
 426         int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
 427         if (retval != ERROR_OK)
 428                 return retval;
 429
 430         if (avrf_mass_erase(bank) == ERROR_OK)
 431                 command_print(CMD, "avr mass erase complete");
 432         else
 433                 command_print(CMD, "avr mass erase failed");
 434
 435         LOG_DEBUG("%s", __func__);
 436         return ERROR_OK;
 437 }
 438
 439 static const struct command_registration avrf_exec_command_handlers[] = {
 440         {
 441                 .name = "mass_erase",
 442                 .usage = "<bank>",
 443                 .handler = avrf_handle_mass_erase_command,
 444                 .mode = COMMAND_EXEC,
 445                 .help = "erase entire device",
 446         },
 447         COMMAND_REGISTRATION_DONE
 448 };
 449 static const struct command_registration avrf_command_handlers[] = {
 450         {
 451                 .name = "avrf",
 452                 .mode = COMMAND_ANY,
 453                 .help = "AVR flash command group",
 454                 .usage = "",
 455                 .chain = avrf_exec_command_handlers,
 456         },
 457         COMMAND_REGISTRATION_DONE
 458 };
 459
 460 const struct flash_driver avr_flash = {
 461         .name = "avr",
 462         .commands = avrf_command_handlers,
 463         .flash_bank_command = avrf_flash_bank_command,
 464         .erase = avrf_erase,
 465         .write = avrf_write,
 466         .read = default_flash_read,
 467         .probe = avrf_probe,
 468         .auto_probe = avrf_auto_probe,
 469         .erase_check = default_flash_blank_check,
 470         .info = avrf_info,
 471         .free_driver_priv = default_flash_free_driver_priv,
 472 };