dce6a5e4e5762ff72169c927ef5e57757cb53009
[fw/openocd] / src / flash / nor / aduc702x.c
1 /***************************************************************************
2  *   Copyright (C) 2008 by Kevin McGuire                                   *
3  *   Copyright (C) 2008 by Marcel Wijlaars                                 *
4  *   Copyright (C) 2009 by Michael Ashton                                  *
5  *                                                                         *
6  *   This program is free software; you can redistribute it and/or modify  *
7  *   it under the terms of the GNU General Public License as published by  *
8  *   the Free Software Foundation; either version 2 of the License, or     *
9  *   (at your option) any later version.                                   *
10  *                                                                         *
11  *   This program is distributed in the hope that it will be useful,       *
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
14  *   GNU General Public License for more details.                          *
15  *                                                                         *
16  *   You should have received a copy of the GNU General Public License     *
17  *   along with this program; if not, write to the                         *
18  *   Free Software Foundation, Inc.,                                       *
19  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
20  ***************************************************************************/
21
22 #ifdef HAVE_CONFIG_H
23 #include "config.h"
24 #endif
25
26 #include "imp.h"
27 #include <helper/binarybuffer.h>
28 #include <helper/time_support.h>
29 #include <target/algorithm.h>
30 #include <target/arm.h>
31
32 static int aduc702x_build_sector_list(struct flash_bank *bank);
33 static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms);
34 static int aduc702x_set_write_enable(struct target *target, int enable);
35
36 #define ADUC702x_FLASH                          0xfffff800
37 #define ADUC702x_FLASH_FEESTA           (0*4)
38 #define ADUC702x_FLASH_FEEMOD           (1*4)
39 #define ADUC702x_FLASH_FEECON           (2*4)
40 #define ADUC702x_FLASH_FEEDAT           (3*4)
41 #define ADUC702x_FLASH_FEEADR           (4*4)
42 #define ADUC702x_FLASH_FEESIGN          (5*4)
43 #define ADUC702x_FLASH_FEEPRO           (6*4)
44 #define ADUC702x_FLASH_FEEHIDE          (7*4)
45
46 struct aduc702x_flash_bank {
47         struct working_area *write_algorithm;
48 };
49
50 /* flash bank aduc702x 0 0 0 0 <target#>
51  * The ADC7019-28 devices all have the same flash layout */
52 FLASH_BANK_COMMAND_HANDLER(aduc702x_flash_bank_command)
53 {
54         struct aduc702x_flash_bank *nbank;
55
56         nbank = malloc(sizeof(struct aduc702x_flash_bank));
57
58         bank->base = 0x80000;
59         bank->size = 0xF800;    /* top 4k not accessible */
60         bank->driver_priv = nbank;
61
62         aduc702x_build_sector_list(bank);
63
64         return ERROR_OK;
65 }
66
67 static int aduc702x_build_sector_list(struct flash_bank *bank)
68 {
69         /* aduc7026_struct flash_bank *aduc7026_info = bank->driver_priv; */
70
71         int i = 0;
72         uint32_t offset = 0;
73
74         /* sector size is 512 */
75         bank->num_sectors = bank->size / 512;
76         bank->sectors = malloc(sizeof(struct flash_sector) * bank->num_sectors);
77         for (i = 0; i < bank->num_sectors; ++i) {
78                 bank->sectors[i].offset = offset;
79                 bank->sectors[i].size = 512;
80                 offset += bank->sectors[i].size;
81                 bank->sectors[i].is_erased = -1;
82                 bank->sectors[i].is_protected = 0;
83         }
84
85         return ERROR_OK;
86 }
87
88 static int aduc702x_protect_check(struct flash_bank *bank)
89 {
90         printf("aduc702x_protect_check not implemented yet.\n");
91         return ERROR_OK;
92 }
93
94 static int aduc702x_erase(struct flash_bank *bank, int first, int last)
95 {
96         /* int res; */
97         int x;
98         int count;
99         /* uint32_t v; */
100         struct target *target = bank->target;
101
102         aduc702x_set_write_enable(target, 1);
103
104         /* mass erase */
105         if (((first | last) == 0) || ((first == 0) && (last >= bank->num_sectors))) {
106                 LOG_DEBUG("performing mass erase.");
107                 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, 0x3cff);
108                 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, 0xffc3);
109                 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x06);
110
111                 if (aduc702x_check_flash_completion(target, 3500) != ERROR_OK) {
112                         LOG_ERROR("mass erase failed");
113                         aduc702x_set_write_enable(target, 0);
114                         return ERROR_FLASH_OPERATION_FAILED;
115                 }
116
117                 LOG_DEBUG("mass erase successful.");
118                 return ERROR_OK;
119         } else {
120                 unsigned long adr;
121
122                 count = last - first + 1;
123                 for (x = 0; x < count; ++x) {
124                         adr = bank->base + ((first + x) * 512);
125
126                         target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, adr);
127                         target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x05);
128
129                         if (aduc702x_check_flash_completion(target, 50) != ERROR_OK) {
130                                 LOG_ERROR("failed to erase sector at address 0x%08lX", adr);
131                                 aduc702x_set_write_enable(target, 0);
132                                 return ERROR_FLASH_SECTOR_NOT_ERASED;
133                         }
134
135                         LOG_DEBUG("erased sector at address 0x%08lX", adr);
136                 }
137         }
138
139         aduc702x_set_write_enable(target, 0);
140
141         return ERROR_OK;
142 }
143
144 static int aduc702x_protect(struct flash_bank *bank, int set, int first, int last)
145 {
146         printf("aduc702x_protect not implemented yet.\n");
147         return ERROR_FLASH_OPERATION_FAILED;
148 }
149
150 /* If this fn returns ERROR_TARGET_RESOURCE_NOT_AVAILABLE, then the caller can fall
151  * back to another mechanism that does not require onboard RAM
152  *
153  * Caller should not check for other return values specifically
154  */
155 static int aduc702x_write_block(struct flash_bank *bank,
156         uint8_t *buffer,
157         uint32_t offset,
158         uint32_t count)
159 {
160         struct aduc702x_flash_bank *aduc702x_info = bank->driver_priv;
161         struct target *target = bank->target;
162         uint32_t buffer_size = 7000;
163         struct working_area *source;
164         uint32_t address = bank->base + offset;
165         struct reg_param reg_params[6];
166         struct arm_algorithm arm_algo;
167         int retval = ERROR_OK;
168
169         if (((count%2) != 0) || ((offset%2) != 0)) {
170                 LOG_ERROR("write block must be multiple of two bytes in offset & length");
171                 return ERROR_FAIL;
172         }
173
174         /* parameters:
175
176         r0 - address of source data (absolute)
177         r1 - number of halfwords to be copied
178         r2 - start address in flash (offset from beginning of flash memory)
179         r3 - exit code
180         r4 - base address of flash controller (0xFFFFF800)
181
182         registers:
183
184         r5 - scratch
185         r6 - set to 2, used to write flash command
186
187         */
188         static const uint32_t aduc702x_flash_write_code[] = {
189                 /* <_start>: */
190                 0xe3a05008,     /* mov  r5, #8  ; 0x8 */
191                 0xe5845004,     /* str  r5, [r4, #4] */
192                 0xe3a06002,     /* mov  r6, #2  ; 0x2 */
193                 /* <next>: */
194                 0xe1c421b0,     /* strh r2, [r4, #16] */
195                 0xe0d050b2,     /* ldrh r5, [r0], #2 */
196                 0xe1c450bc,     /* strh r5, [r4, #12] */
197                 0xe5c46008,     /* strb r6, [r4, #8] */
198                 /* <wait_complete>: */
199                 0xe1d430b0,     /* ldrh r3, [r4] */
200                 0xe3130004,     /* tst  r3, #4  ; 0x4 */
201                 0x1afffffc,     /* bne  1001c <wait_complete> */
202                 0xe2822002,     /* add  r2, r2, #2      ; 0x2 */
203                 0xe2511001,     /* subs r1, r1, #1      ; 0x1 */
204                 0x0a000001,     /* beq  1003c <done> */
205                 0xe3130001,     /* tst  r3, #1  ; 0x1 */
206                 0x1afffff3,     /* bne  1000c <next> */
207                 /* <done>: */
208                 0xeafffffe      /* b    1003c <done> */
209         };
210
211         /* flash write code */
212         if (target_alloc_working_area(target, sizeof(aduc702x_flash_write_code),
213                         &aduc702x_info->write_algorithm) != ERROR_OK) {
214                 LOG_WARNING("no working area available, can't do block memory writes");
215                 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
216         }
217
218         retval = target_write_buffer(target, aduc702x_info->write_algorithm->address,
219                         sizeof(aduc702x_flash_write_code), (uint8_t *)aduc702x_flash_write_code);
220         if (retval != ERROR_OK)
221                 return retval;
222
223         /* memory buffer */
224         while (target_alloc_working_area_try(target, buffer_size, &source) != ERROR_OK) {
225                 buffer_size /= 2;
226                 if (buffer_size <= 256) {
227                         /* if we already allocated the writing code, but failed to get a buffer,
228                          *free the algorithm */
229                         if (aduc702x_info->write_algorithm)
230                                 target_free_working_area(target, aduc702x_info->write_algorithm);
231
232                         LOG_WARNING("no large enough working area available, can't do block memory writes");
233                         return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
234                 }
235         }
236
237         arm_algo.common_magic = ARM_COMMON_MAGIC;
238         arm_algo.core_mode = ARM_MODE_SVC;
239         arm_algo.core_state = ARM_STATE_ARM;
240
241         init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
242         init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
243         init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
244         init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
245         init_reg_param(&reg_params[4], "r4", 32, PARAM_OUT);
246
247         while (count > 0) {
248                 uint32_t thisrun_count = (count > buffer_size) ? buffer_size : count;
249
250                 retval = target_write_buffer(target, source->address, thisrun_count, buffer);
251                 if (retval != ERROR_OK)
252                         break;
253
254                 buf_set_u32(reg_params[0].value, 0, 32, source->address);
255                 buf_set_u32(reg_params[1].value, 0, 32, thisrun_count/2);
256                 buf_set_u32(reg_params[2].value, 0, 32, address);
257                 buf_set_u32(reg_params[4].value, 0, 32, 0xFFFFF800);
258
259                 retval = target_run_algorithm(target, 0, NULL, 5,
260                                 reg_params, aduc702x_info->write_algorithm->address,
261                                 aduc702x_info->write_algorithm->address +
262                                 sizeof(aduc702x_flash_write_code) - 4,
263                                 10000, &arm_algo);
264                 if (retval != ERROR_OK) {
265                         LOG_ERROR("error executing aduc702x flash write algorithm");
266                         break;
267                 }
268
269                 if ((buf_get_u32(reg_params[3].value, 0, 32) & 1) != 1) {
270                         /* FIX!!!! what does this mean??? replace w/sensible error message */
271                         LOG_ERROR("aduc702x detected error writing flash");
272                         retval = ERROR_FAIL;
273                         break;
274                 }
275
276                 buffer += thisrun_count;
277                 address += thisrun_count;
278                 count -= thisrun_count;
279         }
280
281         target_free_working_area(target, source);
282         target_free_working_area(target, aduc702x_info->write_algorithm);
283
284         destroy_reg_param(&reg_params[0]);
285         destroy_reg_param(&reg_params[1]);
286         destroy_reg_param(&reg_params[2]);
287         destroy_reg_param(&reg_params[3]);
288         destroy_reg_param(&reg_params[4]);
289
290         return retval;
291 }
292
293 /* All-JTAG, single-access method.  Very slow.  Used only if there is no
294  * working area available. */
295 static int aduc702x_write_single(struct flash_bank *bank,
296         uint8_t *buffer,
297         uint32_t offset,
298         uint32_t count)
299 {
300         uint32_t x;
301         uint8_t b;
302         struct target *target = bank->target;
303
304         aduc702x_set_write_enable(target, 1);
305
306         for (x = 0; x < count; x += 2) {
307                 /* FEEADR = address */
308                 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEADR, offset + x);
309
310                 /* set up data */
311                 if ((x + 1) == count) {
312                         /* last byte */
313                         target_read_u8(target, offset + x + 1, &b);
314                 } else
315                         b = buffer[x + 1];
316
317                 target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEDAT, buffer[x] | (b << 8));
318
319                 /* do single-write command */
320                 target_write_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEECON, 0x02);
321
322                 if (aduc702x_check_flash_completion(target, 1) != ERROR_OK) {
323                         LOG_ERROR("single write failed for address 0x%08lX",
324                                 (unsigned long)(offset + x));
325                         aduc702x_set_write_enable(target, 0);
326                         return ERROR_FLASH_OPERATION_FAILED;
327                 }
328
329         }
330         LOG_DEBUG("wrote %d bytes at address 0x%08lX", (int)count, (unsigned long)(offset + x));
331
332         aduc702x_set_write_enable(target, 0);
333
334         return ERROR_OK;
335 }
336
337 static int aduc702x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
338 {
339         int retval;
340
341         /* try using a block write */
342         retval = aduc702x_write_block(bank, buffer, offset, count);
343         if (retval != ERROR_OK) {
344                 if (retval == ERROR_TARGET_RESOURCE_NOT_AVAILABLE) {
345                         /* if block write failed (no sufficient working area),
346                          * use normal (slow) JTAG method */
347                         LOG_WARNING("couldn't use block writes, falling back to single memory accesses");
348
349                         retval = aduc702x_write_single(bank, buffer, offset, count);
350                         if (retval != ERROR_OK) {
351                                 LOG_ERROR("slow write failed");
352                                 return ERROR_FLASH_OPERATION_FAILED;
353                         }
354                 }
355         }
356
357         return retval;
358 }
359
360 static int aduc702x_probe(struct flash_bank *bank)
361 {
362         return ERROR_OK;
363 }
364
365 static int aduc702x_info(struct flash_bank *bank, char *buf, int buf_size)
366 {
367         snprintf(buf, buf_size, "aduc702x flash driver info");
368         return ERROR_OK;
369 }
370
371 /* sets FEEMOD bit 3
372  * enable = 1 enables writes & erases, 0 disables them */
373 static int aduc702x_set_write_enable(struct target *target, int enable)
374 {
375         /* don't bother to preserve int enable bit here */
376         target_write_u16(target, ADUC702x_FLASH + ADUC702x_FLASH_FEEMOD, enable ? 8 : 0);
377
378         return ERROR_OK;
379 }
380
381 /* wait up to timeout_ms for controller to not be busy,
382  * then check whether the command passed or failed.
383  *
384  * this function sleeps 1ms between checks (after the first one),
385  * so in some cases may slow things down without a usleep after the first read */
386 static int aduc702x_check_flash_completion(struct target *target, unsigned int timeout_ms)
387 {
388         uint8_t v = 4;
389
390         long long endtime = timeval_ms() + timeout_ms;
391         while (1) {
392                 target_read_u8(target, ADUC702x_FLASH + ADUC702x_FLASH_FEESTA, &v);
393                 if ((v & 4) == 0)
394                         break;
395                 alive_sleep(1);
396                 if (timeval_ms() >= endtime)
397                         break;
398         }
399
400         if (v & 2)
401                 return ERROR_FAIL;
402         /* if a command is ignored, both the success and fail bits may be 0 */
403         else if ((v & 3) == 0)
404                 return ERROR_FAIL;
405         else
406                 return ERROR_OK;
407 }
408
409 struct flash_driver aduc702x_flash = {
410         .name = "aduc702x",
411         .flash_bank_command = aduc702x_flash_bank_command,
412         .erase = aduc702x_erase,
413         .protect = aduc702x_protect,
414         .write = aduc702x_write,
415         .read = default_flash_read,
416         .probe = aduc702x_probe,
417         .auto_probe = aduc702x_probe,
418         .erase_check = default_flash_blank_check,
419         .protect_check = aduc702x_protect_check,
420         .info = aduc702x_info
421 };