git.gag.com Git - fw/openocd/blob - src/flash/nand/core.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /***************************************************************************
   4  *   Copyright (C) 2007 by Dominic Rath <Dominic.Rath@gmx.de>              *
   5  *   Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de>               *
   6  *   Copyright (C) 2009 Zachary T Welch <zw@superlucidity.net>             *
   7  *                                                                         *
   8  *   Partially based on drivers/mtd/nand_ids.c from Linux.                 *
   9  ***************************************************************************/
  10
  11 #ifdef HAVE_CONFIG_H
  12 #include "config.h"
  13 #endif
  14
  15 #include "imp.h"
  16
  17 /* configured NAND devices and NAND Flash command handler */
  18 struct nand_device *nand_devices;
  19
  20 void nand_device_add(struct nand_device *c)
  21 {
  22         if (nand_devices) {
  23                 struct nand_device *p = nand_devices;
  24                 while (p && p->next)
  25                         p = p->next;
  26                 p->next = c;
  27         } else
  28                 nand_devices = c;
  29 }
  30
  31
  32 /*      Chip ID list
  33  *
  34  *      Manufacturer, ID code, pagesize, chipsize in MegaByte, eraseblock size,
  35  *      options, name
  36  *
  37  *      Pagesize; 0, 256, 512
  38  *      0       get this information from the extended chip ID
  39  *      256     256 Byte page size
  40  *      512     512 Byte page size
  41  */
  42 static struct nand_info nand_flash_ids[] = {
  43         /* Vendor Specific Entries */
  44         { NAND_MFR_SAMSUNG,     0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
  45           "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
  46         { NAND_MFR_SAMSUNG,     0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
  47           "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
  48
  49         /* start "museum" IDs */
  50         { 0x0,                  0x6e, 256, 1, 0x1000, 0,                "NAND 1MiB 5V 8-bit"},
  51         { 0x0,                  0x64, 256, 2, 0x1000, 0,                "NAND 2MiB 5V 8-bit"},
  52         { 0x0,                  0x6b, 512, 4, 0x2000, 0,                "NAND 4MiB 5V 8-bit"},
  53         { 0x0,                  0xe8, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
  54         { 0x0,                  0xec, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
  55         { 0x0,                  0xea, 256, 2, 0x1000, 0,                "NAND 2MiB 3.3V 8-bit"},
  56         { 0x0,                  0xd5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  57         { 0x0,                  0xe3, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  58         { 0x0,                  0xe5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
  59         { 0x0,                  0xd6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
  60
  61         { 0x0,                  0x39, 512, 8, 0x2000, 0,                "NAND 8MiB 1.8V 8-bit"},
  62         { 0x0,                  0xe6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
  63         { 0x0,                  0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
  64         { 0x0,                  0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
  65         /* end "museum" IDs */
  66
  67         { 0x0,                  0x33, 512, 16, 0x4000, 0,               "NAND 16MiB 1.8V 8-bit"},
  68         { 0x0,                  0x73, 512, 16, 0x4000, 0,               "NAND 16MiB 3.3V 8-bit"},
  69         { 0x0,                  0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
  70         { 0x0,                  0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
  71
  72         { 0x0,                  0x35, 512, 32, 0x4000, 0,               "NAND 32MiB 1.8V 8-bit"},
  73         { 0x0,                  0x75, 512, 32, 0x4000, 0,               "NAND 32MiB 3.3V 8-bit"},
  74         { 0x0,                  0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
  75         { 0x0,                  0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
  76
  77         { 0x0,                  0x36, 512, 64, 0x4000, 0,               "NAND 64MiB 1.8V 8-bit"},
  78         { 0x0,                  0x76, 512, 64, 0x4000, 0,               "NAND 64MiB 3.3V 8-bit"},
  79         { 0x0,                  0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
  80         { 0x0,                  0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
  81
  82         { 0x0,                  0x78, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
  83         { 0x0,                  0x39, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
  84         { 0x0,                  0x79, 512, 128, 0x4000, 0,              "NAND 128MiB 3.3V 8-bit"},
  85         { 0x0,                  0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
  86         { 0x0,                  0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
  87         { 0x0,                  0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
  88         { 0x0,                  0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
  89
  90         { 0x0,                  0x71, 512, 256, 0x4000, 0,              "NAND 256MiB 3.3V 8-bit"},
  91
  92         { 0x0,                  0xA2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 1.8V 8-bit"},
  93         { 0x0,                  0xF2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 3.3V 8-bit"},
  94         { 0x0,                  0xB2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 1.8V 16-bit"},
  95         { 0x0,                  0xC2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 3.3V 16-bit"},
  96
  97         { 0x0,                  0xA1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 1.8V 8-bit"},
  98         { 0x0,                  0xF1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 3.3V 8-bit"},
  99         { 0x0,                  0xB1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 1.8V 16-bit"},
 100         { 0x0,                  0xC1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 3.3V 16-bit"},
 101
 102         { 0x0,                  0xAA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 1.8V 8-bit"},
 103         { 0x0,                  0xDA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 3.3V 8-bit"},
 104         { 0x0,                  0xBA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 1.8V 16-bit"},
 105         { 0x0,                  0xCA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 3.3V 16-bit"},
 106
 107         { 0x0,                  0xAC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 1.8V 8-bit"},
 108         { 0x0,                  0xDC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 3.3V 8-bit"},
 109         { 0x0,                  0xBC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 1.8V 16-bit"},
 110         { 0x0,                  0xCC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 3.3V 16-bit"},
 111
 112         { 0x0,                  0xA3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 1.8V 8-bit"},
 113         { 0x0,                  0xD3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 3.3V 8-bit"},
 114         { 0x0,                  0xB3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 1.8V 16-bit"},
 115         { 0x0,                  0xC3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 3.3V 16-bit"},
 116
 117         { 0x0,                  0xA5, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 1.8V 8-bit"},
 118         { 0x0,                  0xD5, 0, 8192, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 119         { 0x0,                  0xB5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 1.8V 16-bit"},
 120         { 0x0,                  0xC5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 3.3V 16-bit"},
 121
 122         { 0x0,                  0x48, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 123
 124         {0, 0, 0, 0, 0, 0, NULL}
 125 };
 126
 127 /* Manufacturer ID list
 128  */
 129 static struct nand_manufacturer nand_manuf_ids[] = {
 130         {0x0, "unknown"},
 131         {NAND_MFR_TOSHIBA, "Toshiba"},
 132         {NAND_MFR_SAMSUNG, "Samsung"},
 133         {NAND_MFR_FUJITSU, "Fujitsu"},
 134         {NAND_MFR_NATIONAL, "National"},
 135         {NAND_MFR_RENESAS, "Renesas"},
 136         {NAND_MFR_STMICRO, "ST Micro"},
 137         {NAND_MFR_HYNIX, "Hynix"},
 138         {NAND_MFR_MICRON, "Micron"},
 139         {0x0, NULL},
 140 };
 141
 142 /*
 143  * Define default oob placement schemes for large and small page devices
 144  */
 145
 146 #if 0
 147 static struct nand_ecclayout nand_oob_8 = {
 148         .eccbytes = 3,
 149         .eccpos = {0, 1, 2},
 150         .oobfree = {
 151                 {.offset = 3,
 152                  .length = 2},
 153                 {.offset = 6,
 154                  .length = 2}
 155         }
 156 };
 157 #endif
 158
 159 /**
 160  * Returns the flash bank specified by @a name, which matches the
 161  * driver name and a suffix (option) specify the driver-specific
 162  * bank number. The suffix consists of the '.' and the driver-specific
 163  * bank number: when two davinci banks are defined, then 'davinci.1' refers
 164  * to the second (e.g. DM355EVM).
 165  */
 166 static struct nand_device *get_nand_device_by_name(const char *name)
 167 {
 168         unsigned requested = get_flash_name_index(name);
 169         unsigned found = 0;
 170
 171         struct nand_device *nand;
 172         for (nand = nand_devices; nand; nand = nand->next) {
 173                 if (strcmp(nand->name, name) == 0)
 174                         return nand;
 175                 if (!flash_driver_name_matches(nand->controller->name, name))
 176                         continue;
 177                 if (++found < requested)
 178                         continue;
 179                 return nand;
 180         }
 181         return NULL;
 182 }
 183
 184 struct nand_device *get_nand_device_by_num(int num)
 185 {
 186         struct nand_device *p;
 187         int i = 0;
 188
 189         for (p = nand_devices; p; p = p->next) {
 190                 if (i++ == num)
 191                         return p;
 192         }
 193
 194         return NULL;
 195 }
 196
 197 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
 198         struct nand_device **nand)
 199 {
 200         const char *str = CMD_ARGV[name_index];
 201         *nand = get_nand_device_by_name(str);
 202         if (*nand)
 203                 return ERROR_OK;
 204
 205         unsigned num;
 206         COMMAND_PARSE_NUMBER(uint, str, num);
 207         *nand = get_nand_device_by_num(num);
 208         if (!*nand) {
 209                 command_print(CMD, "NAND flash device '%s' not found", str);
 210                 return ERROR_COMMAND_SYNTAX_ERROR;
 211         }
 212         return ERROR_OK;
 213 }
 214
 215 int nand_build_bbt(struct nand_device *nand, int first, int last)
 216 {
 217         uint32_t page;
 218         int i;
 219         int pages_per_block = (nand->erase_size / nand->page_size);
 220         uint8_t oob[6];
 221         int ret;
 222
 223         if ((first < 0) || (first >= nand->num_blocks))
 224                 first = 0;
 225
 226         if ((last >= nand->num_blocks) || (last == -1))
 227                 last = nand->num_blocks - 1;
 228
 229         page = first * pages_per_block;
 230         for (i = first; i <= last; i++) {
 231                 ret = nand_read_page(nand, page, NULL, 0, oob, 6);
 232                 if (ret != ERROR_OK)
 233                         return ret;
 234
 235                 if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
 236                                 || (((nand->page_size == 512) && (oob[5] != 0xff)) ||
 237                                 ((nand->page_size == 2048) && (oob[0] != 0xff)))) {
 238                         LOG_WARNING("bad block: %i", i);
 239                         nand->blocks[i].is_bad = 1;
 240                 } else
 241                         nand->blocks[i].is_bad = 0;
 242
 243                 page += pages_per_block;
 244         }
 245
 246         return ERROR_OK;
 247 }
 248
 249 int nand_read_status(struct nand_device *nand, uint8_t *status)
 250 {
 251         if (!nand->device)
 252                 return ERROR_NAND_DEVICE_NOT_PROBED;
 253
 254         /* Send read status command */
 255         /* FIXME: errors returned from nand->controller are mostly ignored! */
 256         nand->controller->command(nand, NAND_CMD_STATUS);
 257
 258         alive_sleep(1);
 259
 260         /* read status */
 261         if (nand->device->options & NAND_BUSWIDTH_16) {
 262                 uint16_t data;
 263                 nand->controller->read_data(nand, &data);
 264                 *status = data & 0xff;
 265         } else
 266                 nand->controller->read_data(nand, status);
 267
 268         return ERROR_OK;
 269 }
 270
 271 static int nand_poll_ready(struct nand_device *nand, int timeout)
 272 {
 273         uint8_t status;
 274
 275         nand->controller->command(nand, NAND_CMD_STATUS);
 276         do {
 277                 if (nand->device->options & NAND_BUSWIDTH_16) {
 278                         uint16_t data;
 279                         nand->controller->read_data(nand, &data);
 280                         status = data & 0xff;
 281                 } else
 282                         nand->controller->read_data(nand, &status);
 283                 if (status & NAND_STATUS_READY)
 284                         break;
 285                 alive_sleep(1);
 286         } while (timeout--);
 287
 288         return (status & NAND_STATUS_READY) != 0;
 289 }
 290
 291 int nand_probe(struct nand_device *nand)
 292 {
 293         uint8_t manufacturer_id, device_id;
 294         uint8_t id_buff[6] = { 0 };     /* zero buff to silence false warning
 295                                          * from clang static analyzer */
 296         int retval;
 297         int i;
 298
 299         /* clear device data */
 300         nand->device = NULL;
 301         nand->manufacturer = NULL;
 302
 303         /* clear device parameters */
 304         nand->bus_width = 0;
 305         nand->address_cycles = 0;
 306         nand->page_size = 0;
 307         nand->erase_size = 0;
 308
 309         /* initialize controller (device parameters are zero, use controller default) */
 310         retval = nand->controller->init(nand);
 311         if (retval != ERROR_OK) {
 312                 switch (retval) {
 313                         case ERROR_NAND_OPERATION_FAILED:
 314                                 LOG_DEBUG("controller initialization failed");
 315                                 return ERROR_NAND_OPERATION_FAILED;
 316                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 317                                 LOG_ERROR(
 318                                 "BUG: controller reported that it doesn't support default parameters");
 319                                 return ERROR_NAND_OPERATION_FAILED;
 320                         default:
 321                                 LOG_ERROR("BUG: unknown controller initialization failure");
 322                                 return ERROR_NAND_OPERATION_FAILED;
 323                 }
 324         }
 325
 326         nand->controller->command(nand, NAND_CMD_RESET);
 327         nand->controller->reset(nand);
 328
 329         nand->controller->command(nand, NAND_CMD_READID);
 330         nand->controller->address(nand, 0x0);
 331
 332         if (nand->bus_width == 8) {
 333                 nand->controller->read_data(nand, &manufacturer_id);
 334                 nand->controller->read_data(nand, &device_id);
 335         } else {
 336                 uint16_t data_buf;
 337                 nand->controller->read_data(nand, &data_buf);
 338                 manufacturer_id = data_buf & 0xff;
 339                 nand->controller->read_data(nand, &data_buf);
 340                 device_id = data_buf & 0xff;
 341         }
 342
 343         for (i = 0; nand_flash_ids[i].name; i++) {
 344                 if (nand_flash_ids[i].id == device_id &&
 345                                 (nand_flash_ids[i].mfr_id == manufacturer_id ||
 346                                 nand_flash_ids[i].mfr_id == 0)) {
 347                         nand->device = &nand_flash_ids[i];
 348                         break;
 349                 }
 350         }
 351
 352         for (i = 0; nand_manuf_ids[i].name; i++) {
 353                 if (nand_manuf_ids[i].id == manufacturer_id) {
 354                         nand->manufacturer = &nand_manuf_ids[i];
 355                         break;
 356                 }
 357         }
 358
 359         if (!nand->manufacturer) {
 360                 nand->manufacturer = &nand_manuf_ids[0];
 361                 nand->manufacturer->id = manufacturer_id;
 362         }
 363
 364         if (!nand->device) {
 365                 LOG_ERROR(
 366                         "unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
 367                         manufacturer_id,
 368                         device_id);
 369                 return ERROR_NAND_OPERATION_FAILED;
 370         }
 371
 372         LOG_DEBUG("found %s (%s)", nand->device->name, nand->manufacturer->name);
 373
 374         /* initialize device parameters */
 375
 376         /* bus width */
 377         if (nand->device->options & NAND_BUSWIDTH_16)
 378                 nand->bus_width = 16;
 379         else
 380                 nand->bus_width = 8;
 381
 382         /* Do we need extended device probe information? */
 383         if (nand->device->page_size == 0 ||
 384                         nand->device->erase_size == 0) {
 385                 if (nand->bus_width == 8) {
 386                         retval = nand->controller->read_data(nand, id_buff + 3);
 387                         if (retval != ERROR_OK)
 388                                 return retval;
 389
 390                         retval = nand->controller->read_data(nand, id_buff + 4);
 391                         if (retval != ERROR_OK)
 392                                 return retval;
 393
 394                         retval = nand->controller->read_data(nand, id_buff + 5);
 395                         if (retval != ERROR_OK)
 396                                 return retval;
 397
 398                 } else {
 399                         uint16_t data_buf;
 400
 401                         retval = nand->controller->read_data(nand, &data_buf);
 402                         if (retval != ERROR_OK)
 403                                 return retval;
 404                         id_buff[3] = data_buf;
 405
 406                         retval = nand->controller->read_data(nand, &data_buf);
 407                         if (retval != ERROR_OK)
 408                                 return retval;
 409                         id_buff[4] = data_buf;
 410
 411                         retval = nand->controller->read_data(nand, &data_buf);
 412                         if (retval != ERROR_OK)
 413                                 return retval;
 414                         id_buff[5] = data_buf >> 8;
 415                 }
 416         }
 417
 418         /* page size */
 419         if (nand->device->page_size == 0)
 420                 nand->page_size = 1 << (10 + (id_buff[4] & 3));
 421         else if (nand->device->page_size == 256) {
 422                 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
 423                 return ERROR_NAND_OPERATION_FAILED;
 424         } else
 425                 nand->page_size = nand->device->page_size;
 426
 427         /* number of address cycles */
 428         if (nand->page_size <= 512) {
 429                 /* small page devices */
 430                 if (nand->device->chip_size <= 32)
 431                         nand->address_cycles = 3;
 432                 else if (nand->device->chip_size <= 8*1024)
 433                         nand->address_cycles = 4;
 434                 else {
 435                         LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
 436                         nand->address_cycles = 5;
 437                 }
 438         } else {
 439                 /* large page devices */
 440                 if (nand->device->chip_size <= 128)
 441                         nand->address_cycles = 4;
 442                 else if (nand->device->chip_size <= 32*1024)
 443                         nand->address_cycles = 5;
 444                 else {
 445                         LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
 446                         nand->address_cycles = 6;
 447                 }
 448         }
 449
 450         /* erase size */
 451         if (nand->device->erase_size == 0) {
 452                 switch ((id_buff[4] >> 4) & 3) {
 453                         case 0:
 454                                 nand->erase_size = 64 << 10;
 455                                 break;
 456                         case 1:
 457                                 nand->erase_size = 128 << 10;
 458                                 break;
 459                         case 2:
 460                                 nand->erase_size = 256 << 10;
 461                                 break;
 462                         case 3:
 463                                 nand->erase_size = 512 << 10;
 464                                 break;
 465                 }
 466         } else
 467                 nand->erase_size = nand->device->erase_size;
 468
 469         /* initialize controller, but leave parameters at the controllers default */
 470         retval = nand->controller->init(nand);
 471         if (retval != ERROR_OK) {
 472                 switch (retval) {
 473                         case ERROR_NAND_OPERATION_FAILED:
 474                                 LOG_DEBUG("controller initialization failed");
 475                                 return ERROR_NAND_OPERATION_FAILED;
 476                         case ERROR_NAND_OPERATION_NOT_SUPPORTED:
 477                                 LOG_ERROR(
 478                                 "controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
 479                                 nand->bus_width,
 480                                 nand->address_cycles,
 481                                 nand->page_size);
 482                                 return ERROR_NAND_OPERATION_FAILED;
 483                         default:
 484                                 LOG_ERROR("BUG: unknown controller initialization failure");
 485                                 return ERROR_NAND_OPERATION_FAILED;
 486                 }
 487         }
 488
 489         nand->num_blocks = (nand->device->chip_size * 1024) / (nand->erase_size / 1024);
 490         nand->blocks = malloc(sizeof(struct nand_block) * nand->num_blocks);
 491
 492         for (i = 0; i < nand->num_blocks; i++) {
 493                 nand->blocks[i].size = nand->erase_size;
 494                 nand->blocks[i].offset = i * nand->erase_size;
 495                 nand->blocks[i].is_erased = -1;
 496                 nand->blocks[i].is_bad = -1;
 497         }
 498
 499         return ERROR_OK;
 500 }
 501
 502 int nand_erase(struct nand_device *nand, int first_block, int last_block)
 503 {
 504         int i;
 505         uint32_t page;
 506         uint8_t status;
 507         int retval;
 508
 509         if (!nand->device)
 510                 return ERROR_NAND_DEVICE_NOT_PROBED;
 511
 512         if ((first_block < 0) || (last_block >= nand->num_blocks))
 513                 return ERROR_COMMAND_SYNTAX_ERROR;
 514
 515         /* make sure we know if a block is bad before erasing it */
 516         for (i = first_block; i <= last_block; i++) {
 517                 if (nand->blocks[i].is_bad == -1) {
 518                         nand_build_bbt(nand, i, last_block);
 519                         break;
 520                 }
 521         }
 522
 523         for (i = first_block; i <= last_block; i++) {
 524                 /* Send erase setup command */
 525                 nand->controller->command(nand, NAND_CMD_ERASE1);
 526
 527                 page = i * (nand->erase_size / nand->page_size);
 528
 529                 /* Send page address */
 530                 if (nand->page_size <= 512) {
 531                         /* row */
 532                         nand->controller->address(nand, page & 0xff);
 533                         nand->controller->address(nand, (page >> 8) & 0xff);
 534
 535                         /* 3rd cycle only on devices with more than 32 MiB */
 536                         if (nand->address_cycles >= 4)
 537                                 nand->controller->address(nand, (page >> 16) & 0xff);
 538
 539                         /* 4th cycle only on devices with more than 8 GiB */
 540                         if (nand->address_cycles >= 5)
 541                                 nand->controller->address(nand, (page >> 24) & 0xff);
 542                 } else {
 543                         /* row */
 544                         nand->controller->address(nand, page & 0xff);
 545                         nand->controller->address(nand, (page >> 8) & 0xff);
 546
 547                         /* 3rd cycle only on devices with more than 128 MiB */
 548                         if (nand->address_cycles >= 5)
 549                                 nand->controller->address(nand, (page >> 16) & 0xff);
 550                 }
 551
 552                 /* Send erase confirm command */
 553                 nand->controller->command(nand, NAND_CMD_ERASE2);
 554
 555                 retval = nand->controller->nand_ready ?
 556                         nand->controller->nand_ready(nand, 1000) :
 557                         nand_poll_ready(nand, 1000);
 558                 if (!retval) {
 559                         LOG_ERROR("timeout waiting for NAND flash block erase to complete");
 560                         return ERROR_NAND_OPERATION_TIMEOUT;
 561                 }
 562
 563                 retval = nand_read_status(nand, &status);
 564                 if (retval != ERROR_OK) {
 565                         LOG_ERROR("couldn't read status");
 566                         return ERROR_NAND_OPERATION_FAILED;
 567                 }
 568
 569                 if (status & 0x1) {
 570                         LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
 571                                 (nand->blocks[i].is_bad == 1)
 572                                 ? "bad " : "",
 573                                 i, status);
 574                         /* continue; other blocks might still be erasable */
 575                 }
 576
 577                 nand->blocks[i].is_erased = 1;
 578         }
 579
 580         return ERROR_OK;
 581 }
 582
 583 #if 0
 584 static int nand_read_plain(struct nand_device *nand,
 585         uint32_t address,
 586         uint8_t *data,
 587         uint32_t data_size)
 588 {
 589         uint8_t *page;
 590
 591         if (!nand->device)
 592                 return ERROR_NAND_DEVICE_NOT_PROBED;
 593
 594         if (address % nand->page_size) {
 595                 LOG_ERROR("reads need to be page aligned");
 596                 return ERROR_NAND_OPERATION_FAILED;
 597         }
 598
 599         page = malloc(nand->page_size);
 600
 601         while (data_size > 0) {
 602                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 603                 uint32_t page_address;
 604
 605
 606                 page_address = address / nand->page_size;
 607
 608                 nand_read_page(nand, page_address, page, nand->page_size, NULL, 0);
 609
 610                 memcpy(data, page, thisrun_size);
 611
 612                 address += thisrun_size;
 613                 data += thisrun_size;
 614                 data_size -= thisrun_size;
 615         }
 616
 617         free(page);
 618
 619         return ERROR_OK;
 620 }
 621
 622 static int nand_write_plain(struct nand_device *nand,
 623         uint32_t address,
 624         uint8_t *data,
 625         uint32_t data_size)
 626 {
 627         uint8_t *page;
 628
 629         if (!nand->device)
 630                 return ERROR_NAND_DEVICE_NOT_PROBED;
 631
 632         if (address % nand->page_size) {
 633                 LOG_ERROR("writes need to be page aligned");
 634                 return ERROR_NAND_OPERATION_FAILED;
 635         }
 636
 637         page = malloc(nand->page_size);
 638
 639         while (data_size > 0) {
 640                 uint32_t thisrun_size = (data_size > nand->page_size) ? nand->page_size : data_size;
 641                 uint32_t page_address;
 642
 643                 memset(page, 0xff, nand->page_size);
 644                 memcpy(page, data, thisrun_size);
 645
 646                 page_address = address / nand->page_size;
 647
 648                 nand_write_page(nand, page_address, page, nand->page_size, NULL, 0);
 649
 650                 address += thisrun_size;
 651                 data += thisrun_size;
 652                 data_size -= thisrun_size;
 653         }
 654
 655         free(page);
 656
 657         return ERROR_OK;
 658 }
 659 #endif
 660
 661 int nand_write_page(struct nand_device *nand, uint32_t page,
 662         uint8_t *data, uint32_t data_size,
 663         uint8_t *oob, uint32_t oob_size)
 664 {
 665         uint32_t block;
 666
 667         if (!nand->device)
 668                 return ERROR_NAND_DEVICE_NOT_PROBED;
 669
 670         block = page / (nand->erase_size / nand->page_size);
 671         if (nand->blocks[block].is_erased == 1)
 672                 nand->blocks[block].is_erased = 0;
 673
 674         if (nand->use_raw || !nand->controller->write_page)
 675                 return nand_write_page_raw(nand, page, data, data_size, oob, oob_size);
 676         else
 677                 return nand->controller->write_page(nand, page, data, data_size, oob, oob_size);
 678 }
 679
 680 int nand_read_page(struct nand_device *nand, uint32_t page,
 681         uint8_t *data, uint32_t data_size,
 682         uint8_t *oob, uint32_t oob_size)
 683 {
 684         if (!nand->device)
 685                 return ERROR_NAND_DEVICE_NOT_PROBED;
 686
 687         if (nand->use_raw || !nand->controller->read_page)
 688                 return nand_read_page_raw(nand, page, data, data_size, oob, oob_size);
 689         else
 690                 return nand->controller->read_page(nand, page, data, data_size, oob, oob_size);
 691 }
 692
 693 int nand_page_command(struct nand_device *nand, uint32_t page,
 694         uint8_t cmd, bool oob_only)
 695 {
 696         if (!nand->device)
 697                 return ERROR_NAND_DEVICE_NOT_PROBED;
 698
 699         if (oob_only && NAND_CMD_READ0 == cmd && nand->page_size <= 512)
 700                 cmd = NAND_CMD_READOOB;
 701
 702         nand->controller->command(nand, cmd);
 703
 704         if (nand->page_size <= 512) {
 705                 /* small page device */
 706
 707                 /* column (always 0, we start at the beginning of a page/OOB area) */
 708                 nand->controller->address(nand, 0x0);
 709
 710                 /* row */
 711                 nand->controller->address(nand, page & 0xff);
 712                 nand->controller->address(nand, (page >> 8) & 0xff);
 713
 714                 /* 4th cycle only on devices with more than 32 MiB */
 715                 if (nand->address_cycles >= 4)
 716                         nand->controller->address(nand, (page >> 16) & 0xff);
 717
 718                 /* 5th cycle only on devices with more than 8 GiB */
 719                 if (nand->address_cycles >= 5)
 720                         nand->controller->address(nand, (page >> 24) & 0xff);
 721         } else {
 722                 /* large page device */
 723
 724                 /* column (0 when we start at the beginning of a page,
 725                  * or 2048 for the beginning of OOB area)
 726                  */
 727                 nand->controller->address(nand, 0x0);
 728                 if (oob_only)
 729                         nand->controller->address(nand, 0x8);
 730                 else
 731                         nand->controller->address(nand, 0x0);
 732
 733                 /* row */
 734                 nand->controller->address(nand, page & 0xff);
 735                 nand->controller->address(nand, (page >> 8) & 0xff);
 736
 737                 /* 5th cycle only on devices with more than 128 MiB */
 738                 if (nand->address_cycles >= 5)
 739                         nand->controller->address(nand, (page >> 16) & 0xff);
 740
 741                 /* large page devices need a start command if reading */
 742                 if (cmd == NAND_CMD_READ0)
 743                         nand->controller->command(nand, NAND_CMD_READSTART);
 744         }
 745
 746         if (nand->controller->nand_ready) {
 747                 if (!nand->controller->nand_ready(nand, 100))
 748                         return ERROR_NAND_OPERATION_TIMEOUT;
 749         } else {
 750                 /* nand_poll_read() cannot be used during nand read */
 751                 alive_sleep(1);
 752         }
 753
 754         return ERROR_OK;
 755 }
 756
 757 int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 758 {
 759         int retval = ERROR_NAND_NO_BUFFER;
 760
 761         if (nand->controller->read_block_data)
 762                 retval = (nand->controller->read_block_data)(nand, data, size);
 763
 764         if (retval == ERROR_NAND_NO_BUFFER) {
 765                 uint32_t i;
 766                 int incr = (nand->device->options & NAND_BUSWIDTH_16) ? 2 : 1;
 767
 768                 retval = ERROR_OK;
 769                 for (i = 0; retval == ERROR_OK && i < size; i += incr) {
 770                         retval = nand->controller->read_data(nand, data);
 771                         data += incr;
 772                 }
 773         }
 774
 775         return retval;
 776 }
 777
 778 int nand_read_page_raw(struct nand_device *nand, uint32_t page,
 779         uint8_t *data, uint32_t data_size,
 780         uint8_t *oob, uint32_t oob_size)
 781 {
 782         int retval;
 783
 784         retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
 785         if (retval != ERROR_OK)
 786                 return retval;
 787
 788         if (data)
 789                 nand_read_data_page(nand, data, data_size);
 790
 791         if (oob)
 792                 nand_read_data_page(nand, oob, oob_size);
 793
 794         return ERROR_OK;
 795 }
 796
 797 int nand_write_data_page(struct nand_device *nand, uint8_t *data, uint32_t size)
 798 {
 799         int retval = ERROR_NAND_NO_BUFFER;
 800
 801         if (nand->controller->write_block_data)
 802                 retval = (nand->controller->write_block_data)(nand, data, size);
 803
 804         if (retval == ERROR_NAND_NO_BUFFER) {
 805                 bool is16bit = nand->device->options & NAND_BUSWIDTH_16;
 806                 uint32_t incr = is16bit ? 2 : 1;
 807                 uint16_t write_data;
 808                 uint32_t i;
 809
 810                 for (i = 0; i < size; i += incr) {
 811                         if (is16bit)
 812                                 write_data = le_to_h_u16(data);
 813                         else
 814                                 write_data = *data;
 815
 816                         retval = nand->controller->write_data(nand, write_data);
 817                         if (retval != ERROR_OK)
 818                                 break;
 819
 820                         data += incr;
 821                 }
 822         }
 823
 824         return retval;
 825 }
 826
 827 int nand_write_finish(struct nand_device *nand)
 828 {
 829         int retval;
 830         uint8_t status;
 831
 832         nand->controller->command(nand, NAND_CMD_PAGEPROG);
 833
 834         retval = nand->controller->nand_ready ?
 835                 nand->controller->nand_ready(nand, 100) :
 836                 nand_poll_ready(nand, 100);
 837         if (!retval)
 838                 return ERROR_NAND_OPERATION_TIMEOUT;
 839
 840         retval = nand_read_status(nand, &status);
 841         if (retval != ERROR_OK) {
 842                 LOG_ERROR("couldn't read status");
 843                 return ERROR_NAND_OPERATION_FAILED;
 844         }
 845
 846         if (status & NAND_STATUS_FAIL) {
 847                 LOG_ERROR("write operation didn't pass, status: 0x%2.2x",
 848                         status);
 849                 return ERROR_NAND_OPERATION_FAILED;
 850         }
 851
 852         return ERROR_OK;
 853 }
 854
 855 int nand_write_page_raw(struct nand_device *nand, uint32_t page,
 856         uint8_t *data, uint32_t data_size,
 857         uint8_t *oob, uint32_t oob_size)
 858 {
 859         int retval;
 860
 861         retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
 862         if (retval != ERROR_OK)
 863                 return retval;
 864
 865         if (data) {
 866                 retval = nand_write_data_page(nand, data, data_size);
 867                 if (retval != ERROR_OK) {
 868                         LOG_ERROR("Unable to write data to NAND device");
 869                         return retval;
 870                 }
 871         }
 872
 873         if (oob) {
 874                 retval = nand_write_data_page(nand, oob, oob_size);
 875                 if (retval != ERROR_OK) {
 876                         LOG_ERROR("Unable to write OOB data to NAND device");
 877                         return retval;
 878                 }
 879         }
 880
 881         return nand_write_finish(nand);
 882 }