1 /* SPDX-License-Identifier: BSD-3-Clause */
3 /******************************************************************************
5 * Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
7 ******************************************************************************/
9 #ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
10 #define OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
18 #define __MCU_HAS_FLCTL__ /* Module FLCTL is available */
20 /* Device and peripheral memory map */
21 #define FLASH_BASE ((uint32_t)0x00000000) /* Flash memory start address */
22 #define SRAM_BASE ((uint32_t)0x20000000) /* SRAM memory start address */
23 #define PERIPH_BASE ((uint32_t)0x40000000) /* Peripherals start address */
24 #define CS_BASE (PERIPH_BASE + 0x00010400) /* Address of module CS regs. */
25 #define DIO_BASE (PERIPH_BASE + 0x00004C00) /* Address of module DIO regs. */
27 /* Register map for Clock Signal peripheral (CS) */
29 volatile uint32_t KEY; /* Key Register */
30 volatile uint32_t CTL0; /* Control 0 Register */
31 volatile uint32_t CTL1; /* Control 1 Register */
32 volatile uint32_t CTL2; /* Control 2 Register */
33 volatile uint32_t CTL3; /* Control 3 Register */
36 /* Register map for DIO port (odd interrupt) */
37 struct dio_port_odd_int {
38 volatile uint8_t IN; /* Port Input */
40 volatile uint8_t OUT; /* Port Output */
43 /* Register map for DIO port (even interrupt) */
44 struct dio_port_even_int {
46 volatile uint8_t IN; /* Port Input */
48 volatile uint8_t OUT; /* Port Output */
51 /* Peripheral declarations */
52 #define CS ((struct cs *) CS_BASE)
53 #define P3 ((struct dio_port_odd_int *) (DIO_BASE + 0x0020))
54 #define P6 ((struct dio_port_even_int *) (DIO_BASE + 0x0040))
56 /* Peripheral bit definitions */
58 /* DCORSEL Bit Mask */
59 #define CS_CTL0_DCORSEL_MASK ((uint32_t)0x00070000)
60 /* Nominal DCO Frequency Range (MHz): 2 to 4 */
61 #define CS_CTL0_DCORSEL_1 ((uint32_t)0x00010000)
62 /* Nominal DCO Frequency Range (MHz): 16 to 32 */
63 #define CS_CTL0_DCORSEL_4 ((uint32_t)0x00040000)
64 /* CS control key value */
65 #define CS_KEY_VAL ((uint32_t)0x0000695A)
67 /* Protects Sector 0 from program or erase */
68 #define FLCTL_BANK0_MAIN_WEPROT_PROT0 ((uint32_t)0x00000001)
69 /* Protects Sector 1 from program or erase */
70 #define FLCTL_BANK0_MAIN_WEPROT_PROT1 ((uint32_t)0x00000002)
76 #endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H */