1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2017 by Texas Instruments, Inc. *
5 ***************************************************************************/
8 * r0 = buffer start address (in)
9 * r1 = flash destination address (in)
10 * r2 = number of words to write (in/out)
22 * r4 = buffer word counter
23 * r10 = flash programming key
24 * r11 = base FWB address
25 * r12 = base flash regs address
29 ldr r10, =0xa4420001 /* flash programming key */
30 ldr r11, =0x400fd100 /* base of FWB */
31 ldr r12, =0x400fd000 /* base of flash regs */
32 and r3, r1, #0x7f /* is the dest address 32 word aligned? */
34 bne program_word /* if not aligned do one word at a time */
36 /* program using the write buffers */
38 mov r4, #0 /* start the buffer word counter at 0 */
39 str r1, [r12] /* store the dest addr in FMA */
41 ldr r3, [r0] /* get the word to write to FWB */
42 str r3, [r11] /* store the word in the FWB */
43 add r11, r11, #4 /* increment the FWB pointer */
44 add r0, r0, #4 /* increment the source pointer */
45 sub r2, r2, #1 /* decrement the total word counter */
46 add r4, r4, #1 /* increment the buffer word counter */
47 add r1, r1, #4 /* increment the dest pointer */
48 cmp r2, #0 /* is the total word counter now 0? */
49 beq buffer_ready /* go to end if total word counter is 0 */
50 cmp r4, #32 /* is the buffer word counter now 32? */
51 bne fill_buffer /* go to continue to fill buffer */
53 str r10, [r12, #0x20] /* store the key and write bit to FMC2 */
55 ldr r3, [r12, #0x20] /* read FMC2 */
56 tst r3, #1 /* see if the write bit is cleared */
57 bne wait_buffer_done /* go to read FMC2 if bit not cleared */
58 cmp r2, #0 /* is the total word counter now 0? */
59 bne start /* go if there is more to program */
62 /* program just one word */
64 str r1, [r12] /* store the dest addr in FMA */
65 ldr r3, [r0] /* get the word to write to FMD */
66 str r3, [r12, #0x4] /* store the word in FMD */
67 str r10, [r12, #0x8] /* store the key and write bit to FMC */
69 ldr r3, [r12, #0x8] /* read FMC */
70 tst r3, #1 /* see if the write bit is cleared */
71 bne wait_word_done /* go to read FMC if bit not cleared */
72 sub r2, r2, #1 /* decrement the total word counter */
73 add r0, r0, #4 /* increment the source pointer */
74 add r1, r1, #4 /* increment the dest pointer */
75 cmp r2, #0 /* is the total word counter now 0 */
76 bne start /* go if there is more to program */