d4915a78c3e7751024657b547773651cb483d336
[fw/openocd] / contrib / loaders / flash / armv7m_cfi_span_16.s
1 /***************************************************************************
2  *   Copyright (C) 2005, 2007 by Dominic Rath                              *
3  *   Dominic.Rath@gmx.de                                                   *
4  *   Copyright (C) 2010 Spencer Oliver                                     *
5  *   spen@spen-soft.co.uk                                                  *
6  *                                                                         *
7  *   This program is free software; you can redistribute it and/or modify  *
8  *   it under the terms of the GNU General Public License as published by  *
9  *   the Free Software Foundation; either version 2 of the License, or     *
10  *   (at your option) any later version.                                   *
11  *                                                                         *
12  *   This program is distributed in the hope that it will be useful,       *
13  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
14  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
15  *   GNU General Public License for more details.                          *
16  *                                                                         *
17  *   You should have received a copy of the GNU General Public License     *
18  *   along with this program; if not, write to the                         *
19  *   Free Software Foundation, Inc.,                                       *
20  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
21  ***************************************************************************/
22
23         .text
24         .syntax unified
25         .arch armv7-m
26         .thumb
27         .thumb_func
28
29         .align 2
30
31 /* input parameters - */
32 /*      R0 = source address */
33 /*      R1 = destination address */
34 /*      R2 = number of writes */
35 /*      R3 = flash write command */
36 /*      R4 = constant to mask DQ7 bits (also used for Dq5 with shift) */
37 /* output parameters - */
38 /*      R5 = 0x80 ok 0x00 bad */
39 /* temp registers - */
40 /*      R6 = value read from flash to test status */
41 /*      R7 = holding register */
42 /* unlock registers - */
43 /*  R8 = unlock1_addr */
44 /*  R9 = unlock1_cmd */
45 /*  R10 = unlock2_addr */
46 /*  R11 = unlock2_cmd */
47
48 code:
49         ldrh    r5, [r0], #2
50         strh    r9, [r8]
51         strh    r11, [r10]
52         strh    r3, [r8]
53         strh    r5, [r1]
54         nop
55 busy:
56         ldrh    r6, [r1]
57         eor             r7, r5, r6
58         ands    r7, r4, r7
59         beq             cont                    /* b if DQ7 == Data7 */
60         ands    r6, r6, r4, lsr #2
61         beq             busy                    /* b if DQ5 low */
62         ldrh    r6, [r1]
63         eor             r7, r5, r6
64         ands    r7, r4, r7
65         beq             cont                    /* b if DQ7 == Data7 */
66         mov             r5, #0                  /* 0x0 - return 0x00, error */
67         bne             done
68 cont:
69         subs    r2, r2, #1              /* 0x1 */
70         beq     success
71         add             r1, r1, #2              /* 0x2 */
72         b               code
73
74 success:
75         mov     r5, #128                /* 0x80 */
76         b       done
77
78 done:
79         bkpt #0
80
81         .end