1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /***************************************************************************
4 * Copyright (C) 2006 by Dominic Rath *
5 * Dominic.Rath@gmx.de *
6 ***************************************************************************/
15 @ send word to debugger
16 .macro m_send_to_debugger reg
18 mrc p14, 0, r15, c14, c0, 0
20 mcr p14, 0, \reg, c8, c0, 0
23 @ receive word from debugger
24 .macro m_receive_from_debugger reg
26 mrc p14, 0, r15, c14, c0, 0
28 mrc p14, 0, \reg, c9, c0, 0
31 @ save register on debugger, small
32 .macro m_small_save_reg reg
37 @ save status register on debugger, small
38 .macro m_small_save_psr
43 @ wait for all outstanding coprocessor accesses to complete
45 mrc p15, 0, r0, c2, c0, 0
53 .global prefetch_abort_handler
54 .global data_abort_handler
58 .section .part1 , "ax"
62 mrc p14, 0, r13, c10, c0
63 @ check if global enable bit (GE) is set
64 ands r13, r13, #0x80000000
68 @ set global enable bit (GE)
70 mcr p14, 0, r13, c10, c0
74 @ save r0 without modifying other registers
77 @ save lr (program PC) without branching (use macro)
78 m_send_to_debugger r14
80 @ save non-banked registers and spsr (program CPSR)
92 @ prepare program PSR for debug use (clear Thumb, set I/F to disable interrupts)
94 orr r0, r0, #(PSR_I | PSR_F)
97 and r1, r0, #MODE_MASK
102 @ replace USR mode with SYS
103 bic r0, r0, #MODE_MASK
104 orr r0, r0, #MODE_SYS
108 b save_banked_registers
111 @ wait for command from debugger, than execute desired function
113 bl receive_from_debugger
115 @ 0x0n - register access
117 beq get_banked_registers
120 beq set_banked_registers
132 @ 0x2n - write memory
142 @ 0x3n - program execution
149 @ 0x4n - coprocessor access
156 @ 0x5n - cache and mmu functions
161 beq invalidate_d_cache
164 beq invalidate_i_cache
169 @ 0x6n - misc functions
174 beq read_trace_buffer
177 beq clean_trace_buffer
179 @ return (back to get_command)
184 @ resume program execution
186 @ restore CPSR (SPSR_dbg)
187 bl receive_from_debugger
190 @ restore registers (r7 - r0)
191 bl receive_from_debugger @ r7
193 bl receive_from_debugger @ r6
195 bl receive_from_debugger @ r5
197 bl receive_from_debugger @ r4
199 bl receive_from_debugger @ r3
201 bl receive_from_debugger @ r2
203 bl receive_from_debugger @ r1
205 bl receive_from_debugger @ r0
208 m_receive_from_debugger lr
210 @ branch back to application code, restoring CPSR
213 @ get banked registers
214 @ receive mode bits from host, then run into save_banked_registers to
216 get_banked_registers:
217 bl receive_from_debugger
219 @ save banked registers
220 @ r0[4:0]: desired mode bits
221 save_banked_registers:
227 @ keep current mode bits in r1 for later use
228 and r1, r0, #MODE_MASK
230 @ backup banked registers
231 m_send_to_debugger r8
232 m_send_to_debugger r9
233 m_send_to_debugger r10
234 m_send_to_debugger r11
235 m_send_to_debugger r12
236 m_send_to_debugger r13
237 m_send_to_debugger r14
239 @ if not in SYS mode (or USR, which we replaced with SYS before)
246 m_send_to_debugger r0
250 @ restore CPSR for SDS
260 @ set banked registers
261 @ receive mode bits from host, then run into save_banked_registers to
263 set_banked_registers:
264 bl receive_from_debugger
266 @ restore banked registers
267 @ r0[4:0]: desired mode bits
268 restore_banked_registers:
274 @ keep current mode bits in r1 for later use
275 and r1, r0, #MODE_MASK
277 @ set banked registers
278 m_receive_from_debugger r8
279 m_receive_from_debugger r9
280 m_receive_from_debugger r10
281 m_receive_from_debugger r11
282 m_receive_from_debugger r12
283 m_receive_from_debugger r13
284 m_receive_from_debugger r14
286 @ if not in SYS mode (or USR, which we replaced with SYS before)
289 beq no_spsr_to_restore
292 m_receive_from_debugger r0
297 @ restore CPSR for SDS
308 bl receive_from_debugger
312 bl receive_from_debugger
318 @ drain write- (and fill-) buffer to work around XScale errata
319 mcr p15, 0, r8, c7, c10, 4
333 bl receive_from_debugger
337 bl receive_from_debugger
343 @ drain write- (and fill-) buffer to work around XScale errata
344 mcr p15, 0, r8, c7, c10, 4
358 bl receive_from_debugger
362 bl receive_from_debugger
368 @ drain write- (and fill-) buffer to work around XScale errata
369 mcr p15, 0, r8, c7, c10, 4
383 bl receive_from_debugger
387 bl receive_from_debugger
391 bl receive_from_debugger
394 @ drain write- (and fill-) buffer to work around XScale errata
395 mcr p15, 0, r8, c7, c10, 4
407 bl receive_from_debugger
411 bl receive_from_debugger
415 bl receive_from_debugger
418 @ drain write- (and fill-) buffer to work around XScale errata
419 mcr p15, 0, r8, c7, c10, 4
431 bl receive_from_debugger
435 bl receive_from_debugger
439 bl receive_from_debugger
442 @ drain write- (and fill-) buffer to work around XScale errata
443 mcr p15, 0, r8, c7, c10, 4
455 mrc p14, 0, r0, c10, c0
461 mcr p14, 0, r0, c10, c0
469 @ r0: cache clean area
470 bl receive_from_debugger
474 mcr p15, 0, r0, c7, c2, 5
485 mcr p15, 0, r0, c7, c6, 0
493 mcr p15, 0, r0, c7, c5, 0
508 .section .part2 , "ax"
511 @ requested cp register
512 bl receive_from_debugger
514 adr r1, read_cp_table
515 add pc, r1, r0, lsl #3
518 mrc p15, 0, r0, c0, c0, 0 @ XSCALE_MAINID
520 mrc p15, 0, r0, c0, c0, 1 @ XSCALE_CACHETYPE
522 mrc p15, 0, r0, c1, c0, 0 @ XSCALE_CTRL
524 mrc p15, 0, r0, c1, c0, 1 @ XSCALE_AUXCTRL
526 mrc p15, 0, r0, c2, c0, 0 @ XSCALE_TTB
528 mrc p15, 0, r0, c3, c0, 0 @ XSCALE_DAC
530 mrc p15, 0, r0, c5, c0, 0 @ XSCALE_FSR
532 mrc p15, 0, r0, c6, c0, 0 @ XSCALE_FAR
534 mrc p15, 0, r0, c13, c0, 0 @ XSCALE_PID
536 mrc p15, 0, r0, c15, c0, 0 @ XSCALE_CP_ACCESS
538 mrc p15, 0, r0, c14, c8, 0 @ XSCALE_IBCR0
540 mrc p15, 0, r0, c14, c9, 0 @ XSCALE_IBCR1
542 mrc p15, 0, r0, c14, c0, 0 @ XSCALE_DBR0
544 mrc p15, 0, r0, c14, c3, 0 @ XSCALE_DBR1
546 mrc p15, 0, r0, c14, c4, 0 @ XSCALE_DBCON
548 mrc p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG
550 mrc p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0
552 mrc p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1
554 mrc p14, 0, r0, c10, c0, 0 @ XSCALE_DCSR
566 @ requested cp register
567 bl receive_from_debugger
570 @ value to be written
571 bl receive_from_debugger
573 adr r2, write_cp_table
574 add pc, r2, r1, lsl #3
577 mcr p15, 0, r0, c0, c0, 0 @ XSCALE_MAINID (0x0)
579 mcr p15, 0, r0, c0, c0, 1 @ XSCALE_CACHETYPE (0x1)
581 mcr p15, 0, r0, c1, c0, 0 @ XSCALE_CTRL (0x2)
583 mcr p15, 0, r0, c1, c0, 1 @ XSCALE_AUXCTRL (0x3)
585 mcr p15, 0, r0, c2, c0, 0 @ XSCALE_TTB (0x4)
587 mcr p15, 0, r0, c3, c0, 0 @ XSCALE_DAC (0x5)
589 mcr p15, 0, r0, c5, c0, 0 @ XSCALE_FSR (0x6)
591 mcr p15, 0, r0, c6, c0, 0 @ XSCALE_FAR (0x7)
593 mcr p15, 0, r0, c13, c0, 0 @ XSCALE_PID (0x8)
595 mcr p15, 0, r0, c15, c0, 0 @ XSCALE_CP_ACCESS (0x9)
597 mcr p15, 0, r0, c14, c8, 0 @ XSCALE_IBCR0 (0xa)
599 mcr p15, 0, r0, c14, c9, 0 @ XSCALE_IBCR1 (0xb)
601 mcr p15, 0, r0, c14, c0, 0 @ XSCALE_DBR0 (0xc)
603 mcr p15, 0, r0, c14, c3, 0 @ XSCALE_DBR1 (0xd)
605 mcr p15, 0, r0, c14, c4, 0 @ XSCALE_DBCON (0xe)
607 mcr p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG (0xf)
609 mcr p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0 (0x10)
611 mcr p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1 (0x11)
613 mcr p14, 0, r0, c10, c0, 0 @ XSCALE_DCSR (0x12)
620 @ dump 256 entries from trace buffer
623 mrc p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG
628 @ dump checkpoint register 0
629 mrc p14, 0, r0, c12, c0, 0 @ XSCALE_CHKPT0 (0x10)
632 @ dump checkpoint register 1
633 mrc p14, 0, r0, c13, c0, 0 @ XSCALE_CHKPT1 (0x11)
643 @ clean 256 entries from trace buffer
646 mrc p14, 0, r0, c11, c0, 0 @ XSCALE_TBREG
656 @ resume program execution with trace buffer enabled
658 @ restore CPSR (SPSR_dbg)
659 bl receive_from_debugger
662 @ restore registers (r7 - r0)
663 bl receive_from_debugger @ r7
665 bl receive_from_debugger @ r6
667 bl receive_from_debugger @ r5
669 bl receive_from_debugger @ r4
671 bl receive_from_debugger @ r3
673 bl receive_from_debugger @ r2
675 bl receive_from_debugger @ r1
677 bl receive_from_debugger @ r0
680 m_receive_from_debugger lr
682 mrc p14, 0, r13, c10, c0, 0 @ XSCALE_DCSR
684 mcr p14, 0, r13, c10, c0, 0 @ XSCALE_DCSR
686 @ branch back to application code, restoring CPSR
691 prefetch_abort_handler:
699 m_send_to_debugger r0
702 receive_from_debugger:
703 m_receive_from_debugger r0